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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338M-B04122-GMR

Name: SI5338M-B04122-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338M-B04122-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338M-B04122-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338M-B04122-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338M-B04122-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in high-speed serial interface timing applications such as PCIe root complexes and FPGA-based compute platforms.

For engineers reviewing the SI5338M-B04122-GMR datasheet, SI5338M-B04122-GMR pinout, SI5338M-B04122-GMR application, or SI5338M-B04122-GMR equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage control (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and 24-QFN package compatibility with space-constrained PCB layouts.

Technical Context

The SI5338M-B04122-GMR implements a two-stage PLL architecture: a high-stability reference PLL (Stage 1) locks to one of six input sources (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating each output. Each synthesizer supports integer or fractional mode, enabling true zero-ppm frequency accuracy and programmable phase offset (±45 ns, <20 ps step).

Its output stage provides per-driver configurability for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats, with independent VDDO supplies and internal 22 Ω series termination. The device supports glitchless frequency increment/decrement (1 ppm steps) and loss-of-lock/loss-of-signal alarms via dedicated INTR pin - critical for system-level fault monitoring in telecom and enterprise storage systems.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS and Gen 4 common clock jitter requirements
Output Frequency Range	0.16–710 MHz per channel; supports simultaneous dual >350 MHz outputs (Fvco/4 & Fvco/6)
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	VDD core: 1.8/2.5/3.3 V; VDDO per output: 1.5/1.8/2.5/3.3 V - enables mixed-voltage system interfacing
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch - compatible with standard reflow profiles and high-density routing
Operating Temperature	–40 to +85 °C - qualified for industrial and telecom line card deployment
I²C Interface	SMBus-compatible, 100 kHz/400 kHz modes - enables host MCU configuration without external programming hardware

Pinout & Package

SI5338M-B04122-GMR is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad. Pin assignments are fixed per Skyworks Si5338 family specification and validated for this variant.

Pin/Terminal	Circuit Role	Design Meaning
IN1/IN2, IN5/IN6	Differential input pairs	Accept 5–710 MHz AC-coupled differential clocks; require external 100 Ω termination
IN3/IN4	Single-ended input pins	Support 5–200 MHz CMOS inputs; VIH/VIL referenced to local VDD
CLK0A/CLK0B – CLK3A/CLK3B	Differential output pairs	Four independent output drivers; each configurable for LVPECL/LVDS/HCSL/CML format
VDDO0–VDDO3	Output buffer supply pins	Enable per-output voltage setting (1.5/1.8/2.5/3.3 V) for mixed-signal interface compatibility
SCL/SDA	I²C serial interface	Standard bidirectional bus; supports multi-device addressing and register-level configuration
INTR	Interrupt output	Open-drain status indicator for loss-of-lock and loss-of-signal events
VDD	Core supply	Accepts 1.8 V (±5%), 2.5 V (±10%), or 3.3 V (±10%) - powers PLL, logic, and memory
GND / RSVD_GND	Ground connections	Eight GND pins including dedicated reserved ground for noise isolation and thermal dissipation

Key Features

Feature	Design Value
MultiSynth™ synthesis engine	Enables independent, any-frequency generation on all four outputs with 1 ppb resolution and zero ppm error
PCIe Gen 1–4 compliance	Meets Common Clock (Gen 1/2/3/4) and Gen 3 Separate Reference No Spread (SRNS) jitter specs out-of-box
Programmable spread spectrum	Configurable down-spread (0.5–5.0%) and modulation rate (33–63 kHz) per output to reduce EMI in dense PCB environments
Independent phase adjustment	±45 ns range with <20 ps step resolution - enables precise skew alignment across multi-lane SerDes interfaces
Glitchless frequency tuning	Real-time 1 ppm increment/decrement via pin control or I²C without output interruption - essential for dynamic rate adaptation
Flexible input architecture	Supports six reference types (crystal, CMOS, SSTL, HSTL, LVDS, LVPECL) - simplifies board-level clock tree consolidation

Applications

PCIe Root Complex Timing	Ethernet Switch Synchronization
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe endpoints and switches in a server motherboard. IC Role / Device Role / Timing Role: Quad-output clock generator delivering Gen 3/4-compliant common clock with sub-0.45 ps RMS jitter per lane. Use Value: Eliminates need for four discrete oscillators while maintaining PCIe compliance across all lanes and reducing BOM count by 75%.	Use Scenario: Generating 125 MHz and 156.25 MHz clocks for 1/10 GbE PHYs and packet processors in a Layer 3 switch ASIC. IC Role / Device Role / Timing Role: Frequency translator converting a 25 MHz crystal reference into multiple Ethernet-standard frequencies with tight phase alignment. Use Value: Enables deterministic latency across ports via programmable inter-output skew control (<100 ps) and eliminates external dividers.
FPGA-Based Video Processing	Telecom Line Card Clocking
Use Scenario: Supplying pixel clock (148.5 MHz), reference clock (156.25 MHz), and auxiliary timing (27 MHz) to an FPGA handling HDMI/SDI video processing. IC Role / Device Role / Timing Role: Configurable buffer and level translator supporting LVDS, CMOS, and HCSL outputs simultaneously at different voltages. Use Value: Reduces PCB layer count by integrating three distinct clock domains into one 4×4 mm footprint with no external level shifters required.	Use Scenario: Delivering OC-12 (155.52 MHz), SONET/SDH (622.08 MHz), and SyncE (2.048 MHz) clocks to multiple framer and PHY ICs on a 3G/4G base station line card. IC Role / Device Role / Timing Role: High-stability clock generator with low additive jitter (<0.225 ps RMS in buffer mode) and loss-of-signal detection. Use Value: Ensures carrier-grade timing holdover and alarm propagation during upstream reference failure, meeting ITU-T G.8262 compliance.

PCIe Root Complex Timing

Ethernet Switch Synchronization

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe endpoints and switches in a server motherboard.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering Gen 3/4-compliant common clock with sub-0.45 ps RMS jitter per lane.

Use Value: Eliminates need for four discrete oscillators while maintaining PCIe compliance across all lanes and reducing BOM count by 75%.

Use Scenario: Generating 125 MHz and 156.25 MHz clocks for 1/10 GbE PHYs and packet processors in a Layer 3 switch ASIC.

IC Role / Device Role / Timing Role: Frequency translator converting a 25 MHz crystal reference into multiple Ethernet-standard frequencies with tight phase alignment.

Use Value: Enables deterministic latency across ports via programmable inter-output skew control (<100 ps) and eliminates external dividers.

FPGA-Based Video Processing

Telecom Line Card Clocking

Use Scenario: Supplying pixel clock (148.5 MHz), reference clock (156.25 MHz), and auxiliary timing (27 MHz) to an FPGA handling HDMI/SDI video processing.

IC Role / Device Role / Timing Role: Configurable buffer and level translator supporting LVDS, CMOS, and HCSL outputs simultaneously at different voltages.

Use Value: Reduces PCB layer count by integrating three distinct clock domains into one 4×4 mm footprint with no external level shifters required.

Use Scenario: Delivering OC-12 (155.52 MHz), SONET/SDH (622.08 MHz), and SyncE (2.048 MHz) clocks to multiple framer and PHY ICs on a 3G/4G base station line card.

IC Role / Device Role / Timing Role: High-stability clock generator with low additive jitter (<0.225 ps RMS in buffer mode) and loss-of-signal detection.

Use Value: Ensures carrier-grade timing holdover and alarm propagation during upstream reference failure, meeting ITU-T G.8262 compliance.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05129-GM	Higher integration: includes integrated crystal, lower jitter (0.35 ps RMS), supports up to 12 outputs via fanout	Targeted at ultra-low-jitter applications (e.g., 400G optical modules); lacks independent spread-spectrum per output	Select when crystal integration and sub-0.4 ps jitter are mandatory; avoid if per-output SSC or cost-sensitive design is required
ICS853S01AG-01LF	Fixed-frequency, non-programmable; 4-output LVDS buffer with 0.6 ps RMS jitter; no I²C interface or MultiSynth™	Used only where exact frequencies are known pre-production; no field reconfiguration or frequency translation capability	Select for simple, low-cost clock distribution where flexibility is unnecessary and firmware update capability is not required

Compared with Si5332A-D05129-GM and ICS853S01AG-01LF, SI5338M-B04122-GMR uniquely balances field-programmability, per-output configurability, and PCIe Gen 4 readiness in a cost-effective 24-QFN package - making it optimal for mid-range networking and embedded computing platforms requiring design flexibility without premium jitter performance.

Availability

SI5338M-B04122-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 root complexes, 10 GbE switch fabrics, and FPGA-based broadcast video equipment requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338M-B04122-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces - designed specifically to replace multiple fixed-frequency oscillators while enabling flexible, software-defined timing in datacenter, telecom, and enterprise systems.

FAQ

What is the maximum output frequency supported by SI5338M-B04122-GMR?

The SI5338M-B04122-GMR supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. Only two unique frequencies above 350 MHz can be generated simultaneously (Fvco/4 and Fvco/6), as defined in the Si5338 functional specification. This limitation applies directly to SI5338M-B04122-GMR and is enforced by its MultiSynth™ architecture.

Does SI5338M-B04122-GMR support PCIe Gen 4 Common Clock compliance?

Yes, SI5338M-B04122-GMR meets PCIe Gen 4 Common Clock jitter requirements with 0.15–0.45 ps RMS (10 kHz–50 MHz) when configured per Skyworks AN562 guidelines. Measured using Intel Clock Jitter Tool v1.6.4 with 100 MHz HCSL outputs, this compliance is verified and guaranteed across the full operating temperature range (–40 to +85 °C).

Can SI5338M-B04122-GMR generate different output voltages on each channel?

Yes, SI5338M-B04122-GMR provides independent VDDO0–VDDO3 pins, allowing each of its four output drivers to operate at 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This enables direct interfacing with mixed-voltage devices - for example, driving a 1.8 V FPGA bank and a 3.3 V microcontroller simultaneously without external level shifters.

Is an external crystal required for SI5338M-B04122-GMR operation?

No, SI5338M-B04122-GMR supports multiple reference inputs: external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz). While a crystal is optional, it is commonly used for highest stability; alternative references allow direct connection to system clocks or recovered data rates without additional oscillators.

How is SI5338M-B04122-GMR programmed in-system?

SI5338M-B04122-GMR is programmed via its I²C/SMBus-compatible serial interface (SCL/SDA pins), supporting standard 100 kHz and fast-mode 400 kHz speeds. Configuration is performed using Skyworks' ClockBuilder Pro software, which generates register maps and .c files for integration into host firmware - no external programmer or dedicated hardware is needed for SI5338M-B04122-GMR setup.

SI5338M-B04122-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338M-B04122-GMR FAQ

1.How can I place an order for SI5338M-B04122-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338M-B04122-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338M-B04122-GMR reliable?

The price and inventory of SI5338M-B04122-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338M-B04122-GMR is usually 5 days.

3.What payment methods are accepted for SI5338M-B04122-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338M-B04122-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338M-B04122-GMR?

SI5338M-B04122-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338M-B04122-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338M-B04122-GMR?

For technical support, including SI5338M-B04122-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338M-B04122-GMR requirements.

6.How does Aetrix verify that SI5338M-B04122-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338M-B04122-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338M-B04122-GMR meets industry standards.

7.What is the process for return or replacement of SI5338M-B04122-GMR?

All SI5338M-B04122-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338M-B04122-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338M-B04122-GMR part is unused and in its original packaging.

Return procedure for SI5338M-B04122-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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