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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338M-B04372-GMR

Name: SI5338M-B04372-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338M-B04372-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338M-B04372-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338M-B04372-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338M-B04372-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338M-B04372-GMR datasheet, SI5338M-B04372-GMR pinout, SI5338M-B04372-GMR application, or SI5338M-B04372-GMR equivalent, key selection criteria include PCIe Gen 4 jitter compliance (0.15–0.45 ps RMS), independent output voltage per driver (1.5/1.8/2.5/3.3 V), MultiSynth™ frequency synthesis resolution (1 ppb), spread-spectrum control (0.5–5.0% spread, 33–63 kHz modulation), and loss-of-lock/loss-of-signal alarm support.

Technical Context

The SI5338M-B04372-GMR implements a two-stage PLL architecture: a high-stability reference stage (Phase Detector + Loop Filter + VCO) feeding four independent MultiSynth™ fractional-N synthesis blocks, each driving a configurable output buffer. Input flexibility includes external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) references.

Each output supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats with independent voltage selection (1.5–3.3 V), programmable phase offset (±45 ns, <20 ps step), and glitchless frequency increment/decrement (1 ppm steps). External feedback mode enables zero-delay operation, while INTR pin provides loss-of-lock and loss-of-signal status reporting.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 4 common clock jitter spec (≤0.45 ps RMS)
Output Count & Type	4 differential outputs (CLK0A/B–CLK3A/B) or up to 8 single-ended; supports mixed configurations
Frequency Range	0.16–710 MHz per output; LVPECL/LVDS up to 710 MHz, HCSL up to 250 MHz, CMOS up to 200 MHz
Synthesis Resolution	1 ppb; enables true zero-ppm accuracy on all outputs via MultiSynth™ fractional-N architecture
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; Output buffers: independently configurable 1.4–3.63 V per VDDOx rail
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, moisture sensitivity level 3
Operating Temp	–40 °C to +85 °C ambient; qualified for industrial and telecom line card environments

Pinout & Package

SI5338M-B04372-GMR is housed in a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin 1 is top-left corner (IN1), pin 24 is bottom-right (GND). The package supports standard reflow profiles per JEDEC J-STD-020 and requires controlled impedance PCB layout for optimal jitter performance.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential input pairs	Accept AC-coupled differential clocks up to 710 MHz; require external 100 Ω termination
IN3, IN4	Single-ended input pins	Support CMOS/SSTL/HSTL inputs (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A–CLK3B	Differential output pairs	Four independent output drivers; each configurable as LVPECL/LVDS/HCSL/CML/SSTL/HSTL
VDDO0–VDDO3	Output buffer supplies	Independent 1.4–3.63 V rails per output group; enable mixed-voltage system interfacing
VDD	Core supply	1.8/2.5/3.3 V ±10%; PSRR optimized for low-noise clock generation
SCL, SDA	I²C/SMBus interface	Standard 100/400 kHz operation; supports ClockBuilder Pro programming and runtime configuration
INTR	Interrupt output	Open-drain status pin asserting loss-of-lock (LOL) and loss-of-signal (LOS) alarms

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enabling any-frequency generation (0.16–710 MHz) with 1 ppb resolution and 0 ppm error
PCIe Gen 4 compliance	Meets PCIe Base Spec 4.0 common clock jitter requirement (≤0.45 ps RMS, 10 kHz–50 MHz) without external filtering
Glitchless frequency tuning	Hardware-supported frequency increment/decrement (1 ppm steps) with ≤667 ns update time and no output interruption
Programmable phase alignment	±45 ns phase offset per output with <20 ps step size and sub-cycle alignment for SerDes lane deskew
Spread-spectrum control	Configurable SSC on any output: 0.5–5.0% spread depth, 33–63 kHz modulation rate, selectable center/down-spread
Input reference flexibility	Supports crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) inputs-no external components required

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch Clocking
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ASICs in a data center fabric. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter PCIe-compliant clocks with matched skew and programmable phase alignment. Use Value: Eliminates need for four discrete oscillators; reduces board area by >60% and ensures Gen 4 link training success via 0.15–0.45 ps RMS jitter compliance.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs and packet processors in enterprise switches. IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact Ethernet-standard frequencies from a single 25 MHz crystal reference. Use Value: Enables single-crystal design across multi-rate ports; avoids external dividers/multipliers and maintains <1 ps RMS jitter at 156.25 MHz.
Broadcast Video Sync	FPGA Processor Clocking
Use Scenario: Delivering SMPTE ST 2059-2–compliant 27 MHz, 74.25 MHz, and 148.5 MHz clocks to video encoder/decoder FPGAs and serializer ICs. IC Role / Device Role / Timing Role: Precision clock generator with sub-ns phase adjust capability for frame-accurate genlock across multiple video processing paths. Use Value: Achieves <20 ps phase step resolution and ±45 ns range for real-time video sync correction; supports dual-reference redundancy via IN1/IN2 inputs.	Use Scenario: Supplying 500 MHz system clock, 250 MHz DDR4 memory clock, and 100 MHz peripheral clocks to Xilinx Versal or Intel Agilex FPGAs. IC Role / Device Role / Timing Role: Configurable quad clock source with independent voltage rails (1.8 V for I/O, 1.2 V-compatible via VDDO scaling) and spread-spectrum for EMI reduction. Use Value: Reduces FPGA power supply noise coupling via SSC; enables simultaneous high-speed logic and memory interfaces with <10 ps pk-pk cycle-cycle jitter.

PCIe Gen 4 Switch Timing

Ethernet Switch Clocking

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ASICs in a data center fabric.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter PCIe-compliant clocks with matched skew and programmable phase alignment.

Use Value: Eliminates need for four discrete oscillators; reduces board area by >60% and ensures Gen 4 link training success via 0.15–0.45 ps RMS jitter compliance.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs and packet processors in enterprise switches.

IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact Ethernet-standard frequencies from a single 25 MHz crystal reference.

Use Value: Enables single-crystal design across multi-rate ports; avoids external dividers/multipliers and maintains <1 ps RMS jitter at 156.25 MHz.

Broadcast Video Sync

FPGA Processor Clocking

Use Scenario: Delivering SMPTE ST 2059-2–compliant 27 MHz, 74.25 MHz, and 148.5 MHz clocks to video encoder/decoder FPGAs and serializer ICs.

IC Role / Device Role / Timing Role: Precision clock generator with sub-ns phase adjust capability for frame-accurate genlock across multiple video processing paths.

Use Value: Achieves <20 ps phase step resolution and ±45 ns range for real-time video sync correction; supports dual-reference redundancy via IN1/IN2 inputs.

Use Scenario: Supplying 500 MHz system clock, 250 MHz DDR4 memory clock, and 100 MHz peripheral clocks to Xilinx Versal or Intel Agilex FPGAs.

IC Role / Device Role / Timing Role: Configurable quad clock source with independent voltage rails (1.8 V for I/O, 1.2 V-compatible via VDDO scaling) and spread-spectrum for EMI reduction.

Use Value: Reduces FPGA power supply noise coupling via SSC; enables simultaneous high-speed logic and memory interfaces with <10 ps pk-pk cycle-cycle jitter.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06889-GM	Higher integration: 8 outputs, integrated LDOs, lower jitter (0.35 ps RMS), supports JESD204B deterministic latency	Targeted at JESD204B ADC/DAC timing and multi-channel RF systems; not pin-compatible	Select when needing >4 outputs, deterministic latency, or ultra-low jitter; requires PCB redesign
ICS8430I-01T	Fixed-frequency, non-programmable; 4 LVDS outputs; 0.9 ps RMS jitter; 3.3 V only; no I²C interface	Limited to static clock trees; no frequency or phase tuning; no spread spectrum or alarm features	Select only for cost-sensitive, fixed-frequency applications where programmability is unnecessary

Compared with SI5338M-B04372-GMR, Si5332A-D06889-GM offers superior jitter and scalability but demands full hardware revision, while ICS8430I-01T sacrifices configurability for lower unit cost and simpler validation-neither is pin- or firmware-compatible.

Availability

SI5338M-B04372-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, 10 GbE switch clocking, and broadcast video synchronization requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338M-B04372-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces-including PCIe, Ethernet, and broadcast video-enabling system-level timing consolidation and reduced BOM count.

FAQ

What is the maximum output frequency supported by SI5338M-B04372-GMR in LVPECL format?

The SI5338M-B04372-GMR supports LVPECL outputs up to 710 MHz, as confirmed in Table 6 of the datasheet. This applies when using integer-mode MultiSynth™ synthesis and proper load termination (100 Ω differential). Frequencies above 350 MHz are limited to two unique values simultaneously (Fvco/4 and Fvco/6) due to VCO constraints.

Does SI5338M-B04372-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338M-B04372-GMR is compliant with PCIe Gen 3 SRNS and Gen 4 common clock specifications. Its measured RMS jitter is 0.11–0.32 ps (Gen 3 SRNS) and 0.15–0.45 ps (Gen 4 common clock), meeting PCI-SIG requirements when configured with PLL bandwidth of 2–5 MHz and CDR = 10 MHz.

Can SI5338M-B04372-GMR generate different output voltages on its four channels simultaneously?

Yes, SI5338M-B04372-GMR supports independent output supply rails (VDDO0–VDDO3), allowing simultaneous operation at 1.5 V, 1.8 V, 2.5 V, and 3.3 V. Each output driver's voltage is set separately, enabling direct interfacing with mixed-voltage FPGAs, ASICs, and PHYs without level shifters.

How is the SI5338M-B04372-GMR programmed, and is external non-volatile memory required?

SI5338M-B04372-GMR is programmed via its I²C/SMBus interface using Skyworks' ClockBuilder Pro software. Configuration is stored in on-chip one-time-programmable (OTP) memory; no external EEPROM or flash is needed. Factory-programmed units boot with valid clocks in <2 ms after power-on.

What thermal performance can be expected from SI5338M-B04372-GMR in a 4-layer PCB design?

In still-air conditions, SI5338M-B04372-GMR has a junction-to-ambient thermal resistance (θJA) of 37 °C/W and junction-to-case (θJC) of 10 °C/W. With a properly designed 4-layer board including thermal vias under the exposed pad, junction temperature rise remains within specification (<150 °C) at 45 mA core current and 85 °C ambient.

SI5338M-B04372-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338M-B04372-GMR FAQ

1.How can I place an order for SI5338M-B04372-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338M-B04372-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338M-B04372-GMR reliable?

The price and inventory of SI5338M-B04372-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338M-B04372-GMR is usually 5 days.

3.What payment methods are accepted for SI5338M-B04372-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338M-B04372-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338M-B04372-GMR?

SI5338M-B04372-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338M-B04372-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338M-B04372-GMR?

For technical support, including SI5338M-B04372-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338M-B04372-GMR requirements.

6.How does Aetrix verify that SI5338M-B04372-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338M-B04372-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338M-B04372-GMR meets industry standards.

7.What is the process for return or replacement of SI5338M-B04372-GMR?

All SI5338M-B04372-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338M-B04372-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338M-B04372-GMR part is unused and in its original packaging.

Return procedure for SI5338M-B04372-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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