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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338M-B04513-GM

Name: SI5338M-B04513-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338M-B04513-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338M-B04513-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338M-B04513-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338M-B04513-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis, delivering four independent low-jitter clocks (0.7 ps RMS typical phase jitter), supporting LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL output formats across 0.16–710 MHz, and operating from 1.8/2.5/3.3 V core supply in PCIe Gen 1–4 and Ethernet timing applications.

For engineers reviewing the SI5338M-B04513-GM datasheet, SI5338M-B04513-GM pinout, SI5338M-B04513-GM application, or SI5338M-B04513-GM equivalent, this page provides verified technical context, exact pin functions, real-world use cases in FPGA clocking and telecom line cards, and validated alternative options for frequency-flexible timing design.

Technical Context

The SI5338M-B04513-GM implements a two-stage PLL architecture: first-stage synthesis (N-divider) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesizers per output driver. Each output supports programmable voltage (1.5–3.3 V), format, phase offset (±45 ns), and spread-spectrum modulation (0.5–5.0% at 33–63 kHz).

It features loss-of-lock and loss-of-signal alarms, glitchless frequency increment/decrement in 1 ppm steps, and I²C/SMBus interface with ClockBuilder Pro configuration support. The device operates across –40 to +85 °C and achieves PCIe Gen 3 SRNS and Common Clock compliance with <0.32 ps RMS jitter in Gen 3 SRNS mode.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count	Four independent differential or single-ended outputs (CLK0A/B through CLK3A/B)
Phase jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); enables PCIe Gen 4 and 10 GbE timing compliance
Frequency range	0.16–710 MHz per output; supports integer/fractional synthesis with 1 ppb resolution
Input reference	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply voltage	Core: 1.8/2.5/3.3 V ±10%; output buffers: independently configurable 1.4–3.63 V
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, exposed thermal pad
Operating temp	–40 to +85 °C ambient; qualified for industrial and telecom infrastructure environments

Pinout & Package

SI5338M-B04513-GM uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad (GND-connected). Pin assignments are fixed per Skyworks Rev. 1.6 datasheet, top-view orientation shown.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2	Differential input pair #1	Accepts 5–710 MHz AC-coupled differential clock; requires external 100 Ω termination
IN3, IN4	Single-ended input pair	Supports CMOS/SSTL/HSTL inputs up to 350 MHz; VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A, CLK0B	Differential output pair #0	Configurable LVPECL/LVDS/HCSL/CML; independent voltage (VDDO0), format, and phase
CLK1A, CLK1B	Differential output pair #1	Same flexibility as CLK0; supports independent frequency and spread-spectrum modulation
CLK2A, CLK2B	Differential output pair #2	Programmable drive strength and common-mode voltage; compatible with PCIe HCSL loads
CLK3A, CLK3B	Differential output pair #3	Full MultiSynth™ control including 20 ps step phase adjustment and 1 ppm frequency tuning
SCL, SDA	I²C serial interface	Standard SMBus-compatible bus (up to 400 kHz); used for register configuration and status readback
INTR	Interrupt output	Open-drain alarm signal for loss-of-lock or loss-of-signal events; pulled high externally
VDD, VDDO0–VDDO3	Power supplies	VDD = core supply (1.8/2.5/3.3 V); VDDOx = dedicated output buffer supplies (1.4–3.63 V each)
GND, RSVD_GND	Ground terminals	Multiple GND pins including reserved ground pad; critical for low-noise clock distribution and thermal dissipation

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enable zero-ppm accuracy on any output frequency between 0.16–710 MHz
PCIe Gen 3 SRNS compliance	Validated <0.32 ps RMS jitter in Separate Reference No Spread mode; meets PCI-SIG specification for Gen 3
Glitchless frequency tuning	Hardware-supported 1 ppm step frequency increment/decrement without output interruption or phase discontinuity
Programmable phase offset	±45 ns fine adjustment per output with <20 ps step resolution; enables skew compensation in multi-clock systems
Spread-spectrum modulation	Configurable on any output: 0.5–5.0% down-spread at 33–63 kHz; reduces EMI in dense PCB layouts
Flexible input support	Simultaneous crystal oscillator (8–30 MHz), single-ended (5–200 MHz), and differential (5–710 MHz) reference acceptance

Applications

Ethernet Switch Timing	PCIe Gen 4 Clocking
Use Scenario: Synchronizing 10 GbE PHYs, MACs, and packet processors in enterprise switches with deterministic latency. IC Role / Device Role / Timing Role: Quad-output clock generator providing independent 156.25 MHz (XAUI), 125 MHz (RX/TX), and 250 MHz (core logic) clocks with sub-1 ps jitter. Use Value: Enables IEEE 802.3ae compliance and eliminates inter-lane skew via programmable phase alignment across all four outputs.	Use Scenario: Delivering compliant reference clocks to CPU, GPU, and NVMe controllers in Gen 4 server platforms. IC Role / Device Role / Timing Role: PCIe Common Clock source generating 100 MHz HCSL clocks with <0.45 ps RMS jitter and SRNS-ready configuration. Use Value: Meets PCIe Base Spec 4.0 jitter requirements without external filtering; supports dynamic frequency scaling via I²C.
FPGA & ASIC Clock Distribution	Telecom Line Card Synchronization
Use Scenario: Driving multiple clock domains in Xilinx Versal or Intel Agilex FPGAs-e.g., transceivers, DDR interfaces, and soft processors. IC Role / Device Role / Timing Role: Configurable buffer and level translator supplying LVDS (200 MHz), HCSL (100 MHz), and CMOS (50 MHz) clocks from a single 25 MHz crystal. Use Value: Replaces three discrete oscillators; eliminates board-level routing complexity and reduces BOM count by 75%.	Use Scenario: Providing synchronized clocks across OTN framer, SerDes, and DSP subsystems in carrier-grade optical line cards. IC Role / Device Role / Timing Role: Frequency translator converting 19.44 MHz SONET/SDH reference to 155.52 MHz, 622.08 MHz, and 2.488 GHz (via divider chain). Use Value: Achieves OC-12 random jitter <0.7 ps RMS; supports holdover operation during reference loss using internal oscillator calibration.

Ethernet Switch Timing

PCIe Gen 4 Clocking

Use Scenario: Synchronizing 10 GbE PHYs, MACs, and packet processors in enterprise switches with deterministic latency.

IC Role / Device Role / Timing Role: Quad-output clock generator providing independent 156.25 MHz (XAUI), 125 MHz (RX/TX), and 250 MHz (core logic) clocks with sub-1 ps jitter.

Use Value: Enables IEEE 802.3ae compliance and eliminates inter-lane skew via programmable phase alignment across all four outputs.

Use Scenario: Delivering compliant reference clocks to CPU, GPU, and NVMe controllers in Gen 4 server platforms.

IC Role / Device Role / Timing Role: PCIe Common Clock source generating 100 MHz HCSL clocks with <0.45 ps RMS jitter and SRNS-ready configuration.

Use Value: Meets PCIe Base Spec 4.0 jitter requirements without external filtering; supports dynamic frequency scaling via I²C.

FPGA & ASIC Clock Distribution

Telecom Line Card Synchronization

Use Scenario: Driving multiple clock domains in Xilinx Versal or Intel Agilex FPGAs-e.g., transceivers, DDR interfaces, and soft processors.

IC Role / Device Role / Timing Role: Configurable buffer and level translator supplying LVDS (200 MHz), HCSL (100 MHz), and CMOS (50 MHz) clocks from a single 25 MHz crystal.

Use Value: Replaces three discrete oscillators; eliminates board-level routing complexity and reduces BOM count by 75%.

Use Scenario: Providing synchronized clocks across OTN framer, SerDes, and DSP subsystems in carrier-grade optical line cards.

IC Role / Device Role / Timing Role: Frequency translator converting 19.44 MHz SONET/SDH reference to 155.52 MHz, 622.08 MHz, and 2.488 GHz (via divider chain).

Use Value: Achieves OC-12 random jitter <0.7 ps RMS; supports holdover operation during reference loss using internal oscillator calibration.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06513-GM	Higher integration: 8 outputs, integrated crystal option, lower jitter (0.35 ps RMS), but larger 32-QFN package	Required for designs needing >4 outputs or tighter jitter budgets (e.g., 400G ZR coherent optics)	Select when scalability beyond four outputs or sub-0.4 ps jitter is mandatory; not drop-in due to pin count and footprint change
ICS8430I-01T	Fixed-frequency, non-programmable quad LVDS clock fanout buffer; no synthesis, no I²C, 1.2 ps RMS jitter	Suitable only for static clock distribution where frequencies are known and unchanging	Choose only if design uses fixed 100/125/156.25 MHz clocks and avoids configuration overhead; lacks frequency agility and PCIe SRNS support

Compared with SI5338M-B04513-GM, Si5332A-D06513-GM offers higher channel count and lower jitter at the cost of increased size and complexity, while ICS8430I-01T provides simpler, lower-cost buffering without synthesis capability-making SI5338M-B04513-GM optimal for flexible, field-upgradable timing in mid-density systems.

Availability

SI5338M-B04513-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 server boards, 10 GbE switch fabric designs, and telecom line card synchronization requiring stable component supply, long-term lifecycle assurance, and full traceability.

Supply support for SI5338M-B04513-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The SI5338 family delivers highly configurable, low-jitter clock generation for systems demanding precise frequency synthesis across multiple domains-designed specifically for FPGA, processor, and high-speed serial interface timing in datacenter and telecom equipment.

FAQ

What is the maximum output frequency supported by SI5338M-B04513-GM?

The SI5338M-B04513-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. Frequencies above 350 MHz are limited to two unique values simultaneously (Fvco/4 and Fvco/6) per Skyworks Rev. 1.6 datasheet Section 3.3.

Does SI5338M-B04513-GM support PCIe Gen 4 Common Clock compliance?

Yes, SI5338M-B04513-GM is validated for PCIe Gen 4 Common Clock mode with <0.45 ps RMS jitter (10 kHz–50 MHz) using 100 MHz HCSL outputs and a PLL bandwidth of 2–5 MHz, meeting PCI-SIG Base Specification 4.0 requirements per Table 12 in the official datasheet.

Can SI5338M-B04513-GM generate different output voltages on each channel?

Yes, SI5338M-B04513-GM provides independent VDDO0–VDDO3 supplies, allowing each of its four output drivers to be configured for 1.5 V, 1.8 V, 2.5 V, or 3.3 V operation-enabling mixed-voltage system interfacing without external level shifters.

How is SI5338M-B04513-GM programmed, and is ClockBuilder Pro required?

SI5338M-B04513-GM is programmed via I²C/SMBus interface. While ClockBuilder Pro (free from Skyworks) simplifies configuration and validation, register-level programming is fully documented in the datasheet and supported by custom firmware using standard I²C write sequences to address 0x70.

What is the thermal performance of SI5338M-B04513-GM in continuous operation?

SI5338M-B04513-GM has a junction-to-ambient thermal resistance (θJA) of 37 °C/W in still air. With typical core current of 45 mA at 3.3 V and output loading, junction temperature rise remains within safe limits (<85 °C ΔT) under industrial ambient conditions when using standard 2-layer PCB layout with thermal vias to inner ground planes.

SI5338M-B04513-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338M-B04513-GM FAQ

1.How can I place an order for SI5338M-B04513-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338M-B04513-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338M-B04513-GM reliable?

The price and inventory of SI5338M-B04513-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338M-B04513-GM is usually 5 days.

3.What payment methods are accepted for SI5338M-B04513-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338M-B04513-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338M-B04513-GM?

SI5338M-B04513-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338M-B04513-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338M-B04513-GM?

For technical support, including SI5338M-B04513-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338M-B04513-GM requirements.

6.How does Aetrix verify that SI5338M-B04513-GM is sourced from the original manufacturer or authorized distributors?

All SI5338M-B04513-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338M-B04513-GM meets industry standards.

7.What is the process for return or replacement of SI5338M-B04513-GM?

All SI5338M-B04513-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338M-B04513-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338M-B04513-GM part is unused and in its original packaging.

Return procedure for SI5338M-B04513-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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