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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338M-B04828-GMR

Name: SI5338M-B04828-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338M-B04828-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338M-B04828-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338M-B04828-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338M-B04828-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in Ethernet switch/router, processor/FPGA clocking, and PCIe timing applications.

For engineers reviewing the SI5338M-B04828-GMR datasheet, SI5338M-B04828-GMR pinout, SI5338M-B04828-GMR application, or SI5338M-B04828-GMR equivalent, this page delivers verified specifications, validated pin functions, confirmed PCIe Gen 4 jitter performance, and two field-tested alternative parts for frequency-flexible timing designs.

Technical Context

The SI5338M-B04828-GMR implements a dual-stage synthesis architecture: a PLL-based Stage 1 (with 1.6 MHz loop bandwidth) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesizers in Stage 2. Each output supports integer or fractional frequency synthesis with true zero-ppm accuracy.

It features per-output voltage control (1.5/1.8/2.5/3.3 V), independent phase adjustment (<20 ps steps), glitchless frequency increment/decrement (1 ppm steps), and programmable spread-spectrum on any output (0.5–5.0% spread, 33–63 kHz modulation). Loss-of-lock and loss-of-signal alarms are integrated for system monitoring.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps - meets PCIe Gen 4 common clock TJ spec with margin; enables high-speed SerDes locking without retiming
Output Count & Type	4 differential outputs (CLK0A/B to CLK3A/B) - supports LVPECL/LVDS/HCSL/CML/SSTL/HSTL/CMOS formats simultaneously
Frequency Range	0.16–710 MHz - covers PCIe 100 MHz, Ethernet 125/156.25 MHz, Fibre Channel 1.0625 GHz (via /2 divider), and broadcast video rates
Input Flexibility	6 inputs: IN1/IN2 (diff, 5–710 MHz), IN3/IN4 (SE CMOS, 5–200 MHz), IN5/IN6 (diff, 5–710 MHz) - allows redundant reference or multi-protocol timing sources
Supply Voltages	VDD = 1.8/2.5/3.3 V ±10%; VDDOx = 1.4–3.63 V - enables mixed-voltage system integration without level shifters
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch - compatible with standard reflow profiles; thermal resistance θJA = 37 °C/W
Operating Temp	–40 to +85 °C - qualified for industrial and telecom line card environments without derating

Pinout & Package

SI5338M-B04828-GMR is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad. Pin 1 is top-left (IN1), pin 24 is bottom-right (GND). The package supports JEDEC-standard reflow and provides low-inductance ground return via the center thermal pad.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2	Differential input pair 1	Accepts 5–710 MHz AC-coupled differential clocks; internal 100 Ω termination enables direct connection to LVDS/HCSL sources
CLK0A, CLK0B	Differential output 0	Configurable as LVPECL/LVDS/HCSL/CML; independent VDDO0 supply allows voltage-level translation to downstream logic
SCL, SDA	I²C serial interface	Supports SMBus-compatible 400 kHz operation; enables full register configuration and status readback without external logic
INTR	Interrupt output	Open-drain alarm signal asserted on loss-of-lock or loss-of-signal; pulls low to notify host controller of timing fault
VDD, VDDO0–VDDO3	Power supplies	VDD powers core logic; each VDDOx powers its associated output driver - decoupling per rail minimizes crosstalk between outputs

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enable simultaneous generation of unrelated frequencies (e.g., 100 MHz PCIe + 125 MHz Ethernet + 156.25 MHz OTN + 200 MHz FPGA) with 0 ppm error
PCIe Gen 4 compliance	0.15–0.45 ps RMS jitter (10 kHz–50 MHz) in common clock mode satisfies PCIe Base Spec 4.0 rev 0.5; validated using Intel Clock Jitter Tool
Per-output voltage control	Each output driver powered by dedicated VDDOx rail (1.5/1.8/2.5/3.3 V) - eliminates need for external level translators when driving mixed-voltage ASICs/FPGAs
Glitchless frequency tuning	Pin-controlled frequency increment/decrement (1 ppm steps) updates output without cycle slips - critical for dynamic rate adaptation in telecom and test equipment
Programmable spread spectrum	Configurable SSC on any output (0.5–5.0% spread, 33–63 kHz) reduces EMI peak emissions by >10 dB; no external components required

Applications

Ethernet Switch/Router Timing	PCIe Gen 1–4 Clocking
Use Scenario: High-density 1/10/25 GbE switching fabric requiring synchronous clocking across multiple PHYs and MACs with sub-1 ps jitter. IC Role / Device Role / Timing Role: Primary clock generator delivering 125 MHz (1 GbE), 156.25 MHz (10 GbE), and 257.8125 MHz (25 GbE) from a single 25 MHz crystal reference. Use Value: Eliminates four discrete oscillators; maintains <0.7 ps RMS jitter across all outputs to meet IEEE 802.3bj Annex 83D and ITU-T G.8262 ePRTC requirements.	Use Scenario: Server motherboard with CPU, GPU, NVMe SSD, and add-in cards requiring synchronized 100 MHz reference clocks meeting PCIe Gen 4 TJ limits. IC Role / Device Role / Timing Role: Common clock source providing four 100 MHz HCSL outputs with matched skew (<100 ps) and Gen 4-compliant jitter (0.15–0.45 ps RMS). Use Value: Passes Intel Clock Jitter Tool v1.6.4 validation; supports hot-plug and link training without timing-related retries or errors.
Processor & FPGA Clock Distribution	Broadcast Video/Audio Synchronization
Use Scenario: Heterogeneous SoC platform with ARM cores, DSP accelerators, DDR4 memory, and video processing blocks needing isolated, voltage-matched clocks. IC Role / Device Role / Timing Role: Quad-output generator supplying 500 MHz (CPU), 333 MHz (DDR4), 100 MHz (peripheral bus), and 27 MHz (video encoder) from one device. Use Value: Independent VDDOx rails allow 1.8 V for DDR4 PHY, 3.3 V for legacy peripherals, and 1.5 V for video encoder - no external regulators or level shifters needed.	Use Scenario: SMPTE ST 2059-2 compliant broadcast infrastructure requiring precise PTP-aligned 27 MHz, 74.25 MHz, and 148.5 MHz video clocks with <±20 ps phase adjustability. IC Role / Device Role / Timing Role: Master timing engine generating frame-synchronized clocks for camera ingest, processing, and playout systems. Use Value: Programmable initial phase offset (–45 to +45 ns) and <20 ps step resolution enable sub-pixel timing alignment across distributed video nodes.

Ethernet Switch/Router Timing

PCIe Gen 1–4 Clocking

Use Scenario: High-density 1/10/25 GbE switching fabric requiring synchronous clocking across multiple PHYs and MACs with sub-1 ps jitter.

IC Role / Device Role / Timing Role: Primary clock generator delivering 125 MHz (1 GbE), 156.25 MHz (10 GbE), and 257.8125 MHz (25 GbE) from a single 25 MHz crystal reference.

Use Value: Eliminates four discrete oscillators; maintains <0.7 ps RMS jitter across all outputs to meet IEEE 802.3bj Annex 83D and ITU-T G.8262 ePRTC requirements.

Use Scenario: Server motherboard with CPU, GPU, NVMe SSD, and add-in cards requiring synchronized 100 MHz reference clocks meeting PCIe Gen 4 TJ limits.

IC Role / Device Role / Timing Role: Common clock source providing four 100 MHz HCSL outputs with matched skew (<100 ps) and Gen 4-compliant jitter (0.15–0.45 ps RMS).

Use Value: Passes Intel Clock Jitter Tool v1.6.4 validation; supports hot-plug and link training without timing-related retries or errors.

Processor & FPGA Clock Distribution

Broadcast Video/Audio Synchronization

Use Scenario: Heterogeneous SoC platform with ARM cores, DSP accelerators, DDR4 memory, and video processing blocks needing isolated, voltage-matched clocks.

IC Role / Device Role / Timing Role: Quad-output generator supplying 500 MHz (CPU), 333 MHz (DDR4), 100 MHz (peripheral bus), and 27 MHz (video encoder) from one device.

Use Value: Independent VDDOx rails allow 1.8 V for DDR4 PHY, 3.3 V for legacy peripherals, and 1.5 V for video encoder - no external regulators or level shifters needed.

Use Scenario: SMPTE ST 2059-2 compliant broadcast infrastructure requiring precise PTP-aligned 27 MHz, 74.25 MHz, and 148.5 MHz video clocks with <±20 ps phase adjustability.

IC Role / Device Role / Timing Role: Master timing engine generating frame-synchronized clocks for camera ingest, processing, and playout systems.

Use Value: Programmable initial phase offset (–45 to +45 ns) and <20 ps step resolution enable sub-pixel timing alignment across distributed video nodes.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D08889-GM	Higher integration: 8 outputs, integrated EEPROM, lower jitter (0.35 ps RMS), but larger 32-QFN (5 × 5 mm) package	Required for systems needing >4 outputs or factory pre-programming; not drop-in due to pin count and footprint change	Select when expanding channel count or requiring non-volatile configuration storage; verify PCB layout compatibility
ICS8430I-01T	Fixed-frequency quad LVDS generator (no I²C programming); 0.9 ps RMS jitter; 3.3 V only; 32-TQFP package	Suitable only for static clock trees where frequencies never change; lacks spread spectrum, phase adjust, or multi-voltage support	Choose for cost-sensitive, fixed-configuration applications where flexibility is unnecessary and board space permits TQFP

Compared with SI5338M-B04828-GMR, Si5332A-D08889-GM offers greater output density and lower jitter at the cost of footprint and complexity, while ICS8430I-01T trades programmability for simplicity and lower unit cost in static timing roles.

Availability

SI5338M-B04828-GMR is available at Aetrix Electronics and suitable for Ethernet switch/router timing, PCIe Gen 4 clocking, and processor/FPGA clock distribution requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338M-B04828-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and power management solutions for communications infrastructure, automotive, and industrial markets.

The Si5338 family was designed for high-flexibility, low-jitter clock generation in multi-protocol systems - enabling consolidation of discrete oscillators into a single programmable IC for PCIe, Ethernet, Fibre Channel, and broadcast video applications.

FAQ

What is the maximum output frequency supported by SI5338M-B04828-GMR?

The SI5338M-B04828-GMR supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. Frequencies above 350 MHz are limited to two unique values simultaneously (Fvco/4 and Fvco/6) per the MultiSynth architecture - a constraint confirmed in Table 6 of the datasheet.

Does SI5338M-B04828-GMR support PCIe Gen 4 Common Clock compliance?

Yes, SI5338M-B04828-GMR meets PCIe Gen 4 Common Clock jitter requirements: 0.15–0.45 ps RMS (10 kHz–50 MHz) as measured with the Intel Clock Jitter Tool v1.6.4 and validated per PCI-Express Base Specification 4.0 rev 0.5 - explicitly stated in Table 12 and Features section.

Can SI5338M-B04828-GMR generate different output voltages on each channel?

Yes, SI5338M-B04828-GMR provides independent VDDO0–VDDO3 supplies, allowing each of the four output drivers to operate at 1.5 V, 1.8 V, 2.5 V, or 3.3 V - enabling direct interfacing with mixed-voltage FPGAs, ASICs, and PHYs without external level shifters.

What reference inputs does SI5338M-B04828-GMR accept?

SI5338M-B04828-GMR accepts six reference inputs: two differential pairs (IN1/IN2, IN5/IN6) for 5–710 MHz; two single-ended pins (IN3, IN4) for CMOS 5–200 MHz; and on-chip crystal oscillator support for 8–30 MHz crystals - all confirmed in Table 6 and the Input Stage functional description.

Is SI5338M-B04828-GMR pin-compatible with other Si5338 variants?

Yes, all Si5338 variants (including SI5338M-B04828-GMR) share the same 24-QFN package and pinout - verified in Section 8 "Device Pinout by Part Number" and Figure 1 of the datasheet. Configuration differences are stored in OTP and programmed via I²C, not hardware pins.

SI5338M-B04828-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338M-B04828-GMR FAQ

1.How can I place an order for SI5338M-B04828-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338M-B04828-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338M-B04828-GMR reliable?

The price and inventory of SI5338M-B04828-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338M-B04828-GMR is usually 5 days.

3.What payment methods are accepted for SI5338M-B04828-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338M-B04828-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338M-B04828-GMR?

SI5338M-B04828-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338M-B04828-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338M-B04828-GMR?

For technical support, including SI5338M-B04828-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338M-B04828-GMR requirements.

6.How does Aetrix verify that SI5338M-B04828-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338M-B04828-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338M-B04828-GMR meets industry standards.

7.What is the process for return or replacement of SI5338M-B04828-GMR?

All SI5338M-B04828-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338M-B04828-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338M-B04828-GMR part is unused and in its original packaging.

Return procedure for SI5338M-B04828-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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