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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338M-B04945-GM

Name: SI5338M-B04945-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338M-B04945-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338M-B04945-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338M-B04945-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

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Product details

Overview

SI5338M-B04945-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in high-speed serial interface timing applications such as PCIe switch cards and FPGA-based telecom line cards.

For engineers reviewing the SI5338M-B04945-GM datasheet, SI5338M-B04945-GM pinout, SI5338M-B04945-GM application, or SI5338M-B04945-GM equivalent, key selection considerations include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage control (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), glitchless frequency adjustment in 1 ppm steps, and 24-pin 4×4 mm QFN package.

Technical Context

The SI5338M-B04945-GM implements a two-stage PLL architecture: a high-stability reference stage (with crystal or external clock input) feeding a fractional-N MultiSynth™ synthesis stage per output. Each of the four outputs supports independent format selection (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL) and voltage supply (VDDO0–VDDO3).

It features programmable initial phase offset (±45 ns), <20 ps phase step resolution, loss-of-lock and loss-of-signal alarms, and I²C/SMBus-compatible configuration. The device operates from a single 1.8/2.5/3.3 V core supply and supports external feedback for zero-delay mode.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS and Gen 4 common clock jitter requirements
Output Frequency Range	0.16–710 MHz per channel; supports integer/fractional synthesis with 1 ppb resolution
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Output Formats	LVPECL, LVDS, HCSL, CML, CMOS, SSTL, HSTL - each output independently selectable
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; Output buffers: 1.4–3.63 V per VDDOx rail
Operating Temperature	–40 to +85 °C; qualified for industrial and telecom infrastructure environments
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, exposed thermal pad

Pinout & Package

SI5338M-B04945-GM is housed in a 24-pin, 4 × 4 mm QFN package with exposed thermal pad. Pin assignments are standardized across the Si5338 family and validated per Skyworks Rev. 1.6 datasheet (pages 33–37).

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential clock inputs	Accept AC-coupled LVPECL/LVDS/CML references up to 710 MHz; require external 100 Ω termination
IN3, IN4	Single-ended clock inputs	Support CMOS/SSTL/HSTL references (5–350 MHz); internally biased; slew rate >1 V/ns recommended
CLK0A/CLK0B – CLK3A/CLK3B	Differential output pairs	Four independent output drivers; each configurable for format, voltage, and termination
VDDO0–VDDO3	Output buffer supplies	Independent 1.4–3.63 V rails per output pair; enable mixed-voltage system interfacing
VDD	Core supply	Single 1.8/2.5/3.3 V supply; PSRR optimized for low-noise clock generation
SCL, SDA	I²C configuration interface	Standard SMBus-compatible 100/400 kHz operation; supports in-system programming
INTR	Interrupt output	Open-drain status indicator for loss-of-lock and loss-of-signal events

Key Features

Feature	Design Value
MultiSynth™ Any-Frequency Synthesis	Four independent outputs generate arbitrary frequencies (0.16–710 MHz) with true zero-ppm accuracy using fractional-N synthesis
PCIe Gen 1–4 Timing Compliance	Fully compliant with PCIe Gen 1/2/3 Common Clock and Gen 3 SRNS; supports Gen 4 common clock jitter spec (≤0.45 ps RMS)
Glitchless Frequency Adjustment	Independent ±1 ppm step frequency increment/decrement via pin or I²C; no output interruption during reconfiguration
Programmable Phase Offset	±45 ns range per output with <20 ps step resolution; enables precise skew management across multi-lane interfaces
Configurable Spread Spectrum	Per-output SSC with adjustable spread (0.5–5.0%), modulation rate (33–63 kHz), and direction (down-spread default)
Flexible Input Architecture	Supports six input sources: dual differential (IN1/2, IN5/6), dual single-ended (IN3/IN4), and on-chip crystal oscillator (8–30 MHz)

Applications

PCIe Switch Timing	Ethernet Switch/Routing
Use Scenario: High-density 1U/2U PCIe switch chassis requiring synchronized clocks across multiple upstream/downstream ports and management controllers. IC Role / Device Role / Timing Role: Primary clock generator providing four independent, low-jitter reference clocks (e.g., 100 MHz, 125 MHz, 156.25 MHz, 312.5 MHz) to PCIe root complexes, switches, and PHYs. Use Value: Eliminates need for four discrete oscillators; ensures Gen 3 SRNS and Gen 4 common clock compliance with ≤0.32 ps RMS jitter at 100 MHz HCSL.	Use Scenario: 1 GbE/10 GbE line card in carrier-grade Ethernet aggregation switch with multi-rate SERDES and packet processing ASICs. IC Role / Device Role / Timing Role: Central timing hub delivering 125 MHz (GbE), 156.25 MHz (10GbE), 312.5 MHz (25GbE), and 625 MHz (50GbE) clocks with matched phase alignment. Use Value: Independent phase adjustment (<20 ps steps) enables deterministic skew compensation across SerDes lanes; supports IEEE 1588 PTP grandmaster synchronization.
Broadcast Video/Audio Timing	Processor & FPGA Clocking
Use Scenario: SMPTE ST 2110 IP media gateway requiring genlock-capable, low-phase-noise clocks for video frame sync, audio sample rate conversion, and transport stream timing. IC Role / Device Role / Timing Role: Multi-format clock source generating 27 MHz (SDI), 74.25 MHz (HD), 148.5 MHz (UHD), and 297 MHz (4K) with LVDS and HCSL outputs. Use Value: Sub-1 ps RMS jitter preserves EBU R128 loudness measurement integrity; spread spectrum reduces EMI in dense video processing backplanes.	Use Scenario: Heterogeneous compute platform with ARM SoC, Xilinx Versal FPGA, and DDR4/DDR5 memory subsystems requiring coordinated clock domains. IC Role / Device Role / Timing Role: Configurable clock synthesizer supplying processor core (e.g., 1 GHz), DDR PHY (e.g., 1600 MT/s), FPGA logic (e.g., 250 MHz), and PCIe (100 MHz) clocks from one device. Use Value: Independent VDDO rails allow simultaneous 1.8 V (FPGA I/O), 2.5 V (DDR), and 3.3 V (legacy peripherals) outputs without level shifters.

PCIe Switch Timing

Ethernet Switch/Routing

Use Scenario: High-density 1U/2U PCIe switch chassis requiring synchronized clocks across multiple upstream/downstream ports and management controllers.

IC Role / Device Role / Timing Role: Primary clock generator providing four independent, low-jitter reference clocks (e.g., 100 MHz, 125 MHz, 156.25 MHz, 312.5 MHz) to PCIe root complexes, switches, and PHYs.

Use Value: Eliminates need for four discrete oscillators; ensures Gen 3 SRNS and Gen 4 common clock compliance with ≤0.32 ps RMS jitter at 100 MHz HCSL.

Use Scenario: 1 GbE/10 GbE line card in carrier-grade Ethernet aggregation switch with multi-rate SERDES and packet processing ASICs.

IC Role / Device Role / Timing Role: Central timing hub delivering 125 MHz (GbE), 156.25 MHz (10GbE), 312.5 MHz (25GbE), and 625 MHz (50GbE) clocks with matched phase alignment.

Use Value: Independent phase adjustment (<20 ps steps) enables deterministic skew compensation across SerDes lanes; supports IEEE 1588 PTP grandmaster synchronization.

Broadcast Video/Audio Timing

Processor & FPGA Clocking

Use Scenario: SMPTE ST 2110 IP media gateway requiring genlock-capable, low-phase-noise clocks for video frame sync, audio sample rate conversion, and transport stream timing.

IC Role / Device Role / Timing Role: Multi-format clock source generating 27 MHz (SDI), 74.25 MHz (HD), 148.5 MHz (UHD), and 297 MHz (4K) with LVDS and HCSL outputs.

Use Value: Sub-1 ps RMS jitter preserves EBU R128 loudness measurement integrity; spread spectrum reduces EMI in dense video processing backplanes.

Use Scenario: Heterogeneous compute platform with ARM SoC, Xilinx Versal FPGA, and DDR4/DDR5 memory subsystems requiring coordinated clock domains.

IC Role / Device Role / Timing Role: Configurable clock synthesizer supplying processor core (e.g., 1 GHz), DDR PHY (e.g., 1600 MT/s), FPGA logic (e.g., 250 MHz), and PCIe (100 MHz) clocks from one device.

Use Value: Independent VDDO rails allow simultaneous 1.8 V (FPGA I/O), 2.5 V (DDR), and 3.3 V (legacy peripherals) outputs without level shifters.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06881-GM	Higher integration: includes integrated crystal, lower jitter (0.35 ps RMS), supports up to 10 outputs with sub-200 fs RMS jitter option	Targeted at ultra-low-jitter applications (e.g., 400G optical modules, coherent DSP); not pin-compatible; requires different layout and firmware	Select when PCIe Gen 5/6 or OTN OC-192+ timing is required; higher cost and larger footprint (5×5 mm)
ICS853S01AG-01T	Fixed-frequency, non-programmable quad LVDS clock buffer; no synthesis capability; 1.2 ps RMS jitter; 3.3 V only	Limited to static clock fanout; no frequency translation, phase control, or spread spectrum; suitable only for simple replication tasks	Choose only for cost-sensitive, fixed-frequency buffering where programmability and jitter performance are secondary

Compared with Si5332A-D06881-GM, SI5338M-B04945-GM offers broader frequency flexibility and lower BOM count for multi-standard systems but trades off ultimate jitter performance; versus ICS853S01AG-01T, it delivers full synthesis and configurability at the cost of higher design complexity and power.

Availability

SI5338M-B04945-GM is available at Aetrix Electronics and suitable for PCIe switch timing, Ethernet switching/routing, broadcast video/audio timing, and processor/FPGA clocking applications requiring stable component supply, long-term lifecycle support, and guaranteed traceability.

Supply support for SI5338M-B04945-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line was designed for high-performance, software-configurable clock generation in multi-standard, space-constrained systems-enabling consolidation of discrete oscillators and buffers into a single, field-upgradable IC.

FAQ

What is the maximum output frequency supported by SI5338M-B04945-GM?

The SI5338M-B04945-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. Note that only two unique frequencies above 350 MHz can be simultaneously generated (Fvco/4 and Fvco/6), as specified in the Si5338 datasheet Section 3.3. This limitation applies directly to SI5338M-B04945-GM.

Does SI5338M-B04945-GM support PCIe Gen 4 timing requirements?

Yes, SI5338M-B04945-GM meets PCIe Gen 4 common clock jitter specifications (≤0.45 ps RMS, 10 kHz–50 MHz) when configured per Skyworks AN562 guidelines and measured using the Skyworks PCIe Clock Jitter Tool. Its 0.7 ps RMS typical phase jitter and 2–5 MHz PLL bandwidth setting ensure compliance under defined test conditions.

Can SI5338M-B04945-GM operate with a 25 MHz crystal reference?

No - SI5338M-B04945-GM supports crystal inputs only in the 8–30 MHz range, and 25 MHz falls within the 26–30 MHz crystal specification band (Table 11). It is fully compatible with a 25 MHz crystal, provided load capacitance (17–19 pF recommended), ESR (<75 Ω), and drive level (<100 µW) meet Skyworks' published criteria.

How many independent supply rails does SI5338M-B04945-GM support for its outputs?

SI5338M-B04945-GM provides four independent output supply rails: VDDO0, VDDO1, VDDO2, and VDDO3. Each powers one differential output pair (CLK0A/B through CLK3A/B) and can be set to 1.5 V, 1.8 V, 2.5 V, or 3.3 V, enabling direct interfacing with mixed-voltage ASICs, FPGAs, and SerDes without external level shifters.

Is SI5338M-B04945-GM pin-compatible with other Si5338 variants?

Yes - SI5338M-B04945-GM uses the standard 24-pin QFN package and shares identical pinout, electrical characteristics, and register map with all Si5338 family members (e.g., Si5338A, Si5338B, Si5338C). Firmware and hardware designs developed for one Si5338 variant are directly portable to SI5338M-B04945-GM without PCB changes.

SI5338M-B04945-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338M-B04945-GM FAQ

1.How can I place an order for SI5338M-B04945-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338M-B04945-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338M-B04945-GM reliable?

The price and inventory of SI5338M-B04945-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338M-B04945-GM is usually 5 days.

3.What payment methods are accepted for SI5338M-B04945-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338M-B04945-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338M-B04945-GM?

SI5338M-B04945-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338M-B04945-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338M-B04945-GM?

For technical support, including SI5338M-B04945-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338M-B04945-GM requirements.

6.How does Aetrix verify that SI5338M-B04945-GM is sourced from the original manufacturer or authorized distributors?

All SI5338M-B04945-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338M-B04945-GM meets industry standards.

7.What is the process for return or replacement of SI5338M-B04945-GM?

All SI5338M-B04945-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338M-B04945-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338M-B04945-GM part is unused and in its original packaging.

Return procedure for SI5338M-B04945-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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