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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338M-B05075-GM

Name: SI5338M-B05075-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338M-B05075-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338M-B05075-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338M-B05075-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338M-B05075-GM from Skyworks Solutions is an I²C-programmable quad clock generator IC with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in high-speed serial interface timing applications such as PCIe root complexes and FPGA clock trees.

For engineers reviewing the SI5338M-B05075-GM datasheet, SI5338M-B05075-GM pinout, SI5338M-B05075-GM application, or SI5338M-B05075-GM equivalent, key selection criteria include its MultiSynth™ fractional-N synthesis architecture, independent output voltage per driver (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and support for differential input frequencies up to 710 MHz.

Technical Context

The SI5338M-B05075-GM implements a two-stage PLL architecture: a high-stability integer-N Phase-Locked Loop (Stage 1) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesis blocks (Stage 2) generating each output. Each output supports programmable phase offset (<20 ps step resolution) and glitchless frequency increment/decrement in 1 ppm steps.

It features on-chip OTP NVM for factory programming, I²C/SMBus-compatible configuration interface, loss-of-lock and loss-of-signal alarms, and external feedback mode enabling zero-delay operation. The device operates from a single 1.8/2.5/3.3 V core supply with 45 mA typical core current and supports flexible output formats including LVPECL (0.16–710 MHz), LVDS (0.16–350 MHz), HCSL (0.16–250 MHz), CMOS (0.16–200 MHz), and SSTL/HSTL (0.16–350 MHz).

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps - meets PCIe Gen 4 common clock RMS jitter requirement (≤0.45 ps RMS) under optimized conditions and enables low-bit-error-rate serial link timing.
Output Count & Flexibility	4 independent outputs - supports up to four differential clocks, eight single-ended clocks, or mixed configurations without external logic.
Input Frequency Range	5–710 MHz differential - accepts PCIe reference, SerDes recovered clocks, or high-frequency crystals directly into IN1/IN2/IN5/IN6 pins.
Output Voltage Per Driver	1.5 / 1.8 / 2.5 / 3.3 V - allows direct interfacing with mixed-voltage SoCs, FPGAs, and PHYs without level-shifting components.
Spread Spectrum	0.5–5.0% down-spread, 33–63 kHz modulation - reduces EMI peak emissions in dense PCB layouts while maintaining timing margin.
Temperature Range	–40 to +85 °C - qualified for industrial and telecom line card environments with no derating required.
Core Supply Current	45 mA typ at 100 MHz on all outputs - enables low-power system-level clock distribution in thermally constrained designs.

Pinout & Package

SI5338M-B05075-GM is housed in a 4 × 4 mm, 24-lead QFN package with exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential clock inputs	Accept AC-coupled LVPECL/LVDS/CML references up to 710 MHz; require external 100 Ω termination.
IN3, IN4	Single-ended clock inputs	Support CMOS/SSTL/HSTL signals from 5–350 MHz; internally biased; no external pull-up needed.
CLK0A–CLK3B	Differential output pairs	Four fully independent output drivers; each pair configurable as LVPECL/LVDS/HCSL/CML with dedicated VDDOx supply.
VDDO0–VDDO3	Output buffer supplies	Independent 1.5/1.8/2.5/3.3 V supplies per output bank - enables mixed-signal voltage domain interfacing.
SCL, SDA, INTR	I²C control interface	Standard SMBus-compatible 3.3 V-tolerant bus; INTR asserts open-drain interrupt on LOS/LOL events.
VDD	Core supply	Single 1.8/2.5/3.3 V supply powering PLL, synthesizers, and control logic; PSRR >60 dB.
GND, RSVD_GND	Ground terminals	Multiple GND pins and reserved ground pad minimize ground bounce and improve jitter performance.

Key Features

Feature	Design Value
MultiSynth™ fractional-N synthesis	Enables true zero-ppm frequency accuracy on all four outputs simultaneously, eliminating need for multiple crystals or trimming.
Independent output phase adjustment	±45 ns range with <20 ps step resolution - supports precise skew alignment across multi-lane interfaces like PCIe x16 or DDR memory channels.
Glitchless frequency increment/decrement	1 ppm step size with hardware pin control (PINC/FDEC) - enables dynamic frequency scaling without clock interruption in adaptive systems.
PCIe Gen 1–4 and SRNS compliance	Validated against PCIe Base Spec 4.0 for common clock and Gen 3 separate reference modes - reduces qualification effort for server and storage platforms.
External feedback mode	Allows zero-delay clock forwarding by routing CLKOUT back to INx - essential for low-latency clock distribution in repeater or fanout applications.

Applications

PCIe Gen 4 Root Complex	Ethernet Switch Timing
Use Scenario: Provides four synchronized 100 MHz HCSL clocks to CPU, PCH, NVMe controller, and add-in card slots in a server motherboard. IC Role / Device Role / Timing Role: Quad-output clock generator delivering PCIe Gen 4-compliant common clock with ≤0.45 ps RMS jitter and matched skew. Use Value: Eliminates four discrete oscillators, reduces BOM count by 75%, and ensures simultaneous lock-to-reference across all domains.	Use Scenario: Generates 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10/25 GbE PHYs and switch fabric in a modular L2/L3 switch. IC Role / Device Role / Timing Role: Any-frequency clock synthesizer supporting IEEE 802.3bj/ck jitter masks via independent MultiSynth™ outputs. Use Value: Enables single-device timing for multi-rate Ethernet ports without external dividers or buffers, cutting layout area by 40%.
FPGA-Based Video Processing	Telecom Line Card Synchronization
Use Scenario: Supplies 148.5 MHz (SMPTE), 297 MHz (dual-link), and 74.25 MHz (HD-SDI) clocks to FPGA I/O banks and serializer/deserializer cores. IC Role / Device Role / Timing Role: Broadcast video timing generator with sub-20 ps phase step resolution for frame-accurate genlock and TPG synchronization. Use Value: Replaces three dedicated video clocks and eliminates manual trim capacitors, improving production yield and field calibration time.	Use Scenario: Distributes 154.5 MHz SyncE and 2.048 MHz E1/T1 clocks across DSP, framer, and packet processor ASICs in a 3G/4G baseband unit. IC Role / Device Role / Timing Role: Telecom-grade clock translator supporting ITU-T G.8262/G.8264 compliance with holdover stability via crystal reference. Use Value: Meets ±0.01 ppm frequency accuracy over temperature and aging, reducing need for external OCXO or GPS disciplining.

PCIe Gen 4 Root Complex

Ethernet Switch Timing

Use Scenario: Provides four synchronized 100 MHz HCSL clocks to CPU, PCH, NVMe controller, and add-in card slots in a server motherboard.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering PCIe Gen 4-compliant common clock with ≤0.45 ps RMS jitter and matched skew.

Use Value: Eliminates four discrete oscillators, reduces BOM count by 75%, and ensures simultaneous lock-to-reference across all domains.

Use Scenario: Generates 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10/25 GbE PHYs and switch fabric in a modular L2/L3 switch.

IC Role / Device Role / Timing Role: Any-frequency clock synthesizer supporting IEEE 802.3bj/ck jitter masks via independent MultiSynth™ outputs.

Use Value: Enables single-device timing for multi-rate Ethernet ports without external dividers or buffers, cutting layout area by 40%.

FPGA-Based Video Processing

Telecom Line Card Synchronization

Use Scenario: Supplies 148.5 MHz (SMPTE), 297 MHz (dual-link), and 74.25 MHz (HD-SDI) clocks to FPGA I/O banks and serializer/deserializer cores.

IC Role / Device Role / Timing Role: Broadcast video timing generator with sub-20 ps phase step resolution for frame-accurate genlock and TPG synchronization.

Use Value: Replaces three dedicated video clocks and eliminates manual trim capacitors, improving production yield and field calibration time.

Use Scenario: Distributes 154.5 MHz SyncE and 2.048 MHz E1/T1 clocks across DSP, framer, and packet processor ASICs in a 3G/4G baseband unit.

IC Role / Device Role / Timing Role: Telecom-grade clock translator supporting ITU-T G.8262/G.8264 compliance with holdover stability via crystal reference.

Use Value: Meets ±0.01 ppm frequency accuracy over temperature and aging, reducing need for external OCXO or GPS disciplining.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05089-GM	Higher integration: includes integrated crystal, lower jitter (0.35 ps RMS), but fixed 4-output LVDS-only; no HCSL or CMOS support.	Targeted at space-constrained, ultra-low-jitter PCIe Gen 5 applications; lacks flexible output format mixing.	Select when board area and jitter are critical, and all loads accept LVDS; avoid if HCSL or mixed-voltage outputs are required.
ICS853S02AGT	Non-programmable, fixed-frequency 4-output LVDS clock fanout buffer; no synthesis, no I²C, no spread spectrum.	Used only as a passive clock distributor after primary synthesis; requires upstream clock source.	Select only for simple fanout where frequency and format are static and pre-defined; not a functional replacement for SI5338M-B05075-GM's synthesis capability.

Compared with Si5332A-D05089-GM and ICS853S02AGT, SI5338M-B05075-GM uniquely combines full I²C programmability, multi-format output flexibility, and PCIe Gen 4 compliance in a single 4×4 mm QFN-making it the only option for field-upgradable, multi-standard timing in heterogeneous compute platforms.

Availability

SI5338M-B05075-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 server motherboards, 10/25/100 GbE switches, broadcast video processing systems, and telecom line cards requiring stable component supply and long-term lifecycle support.

Supply support for SI5338M-B05075-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces-including PCIe, Ethernet, Fibre Channel, and broadcast video-enabling consolidation of multiple timing sources into a single configurable IC.

FAQ

What is the maximum differential input frequency supported by the SI5338M-B05075-GM?

The SI5338M-B05075-GM supports differential input frequencies up to 710 MHz on pins IN1/IN2 and IN5/IN6. This enables direct connection to high-speed SerDes recovered clocks or OC-192/STM-64 references without prescaling. Operation above 350 MHz is limited to two unique frequencies simultaneously (Fvco/4 and Fvco/6), as specified in the Synthesis Stages section of the datasheet.

Does the SI5338M-B05075-GM support PCIe Gen 4 Common Clock compliance?

Yes, the SI5338M-B05075-GM is explicitly validated for PCIe Gen 4 Common Clock compliance with ≤0.45 ps RMS jitter (10 kHz–50 MHz) when configured per Skyworks AN562 guidelines. Its MultiSynth™ architecture and low-noise PLL design meet the PCI-SIG Base Specification 4.0 jitter mask for 100 MHz HCSL outputs.

Can the SI5338M-B05075-GM generate different output voltages on each channel?

Yes, the SI5338M-B05075-GM provides independent VDDO0–VDDO3 supplies, allowing each of its four output banks to be powered at 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This enables direct interface with mixed-voltage devices-for example, 1.8 V FPGA I/O banks and 3.3 V legacy PHYs-without external level shifters.

How is the SI5338M-B05075-GM programmed, and is factory programming available?

The SI5338M-B05075-GM is programmed via its I²C/SMBus interface using Skyworks' ClockBuilder Pro software. Factory programming is supported through OTP NVM; the "B05075" suffix indicates a pre-configured variant with specific frequency and format settings stored in on-chip memory, reducing boot-time initialization overhead.

What is the thermal performance of the SI5338M-B05075-GM in continuous operation?

The SI5338M-B05075-GM has a junction-to-ambient thermal resistance (θJA) of 37 °C/W in still air. At 45 mA core current and 3.3 V supply, power dissipation remains below 150 mW, keeping junction temperature within safe limits (<100 °C) even at +85 °C ambient-provided the exposed thermal pad is soldered to a minimum 100 mm² copper pour.

SI5338M-B05075-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338M-B05075-GM FAQ

1.How can I place an order for SI5338M-B05075-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338M-B05075-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338M-B05075-GM reliable?

The price and inventory of SI5338M-B05075-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338M-B05075-GM is usually 5 days.

3.What payment methods are accepted for SI5338M-B05075-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338M-B05075-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338M-B05075-GM?

SI5338M-B05075-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338M-B05075-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338M-B05075-GM?

For technical support, including SI5338M-B05075-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338M-B05075-GM requirements.

6.How does Aetrix verify that SI5338M-B05075-GM is sourced from the original manufacturer or authorized distributors?

All SI5338M-B05075-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338M-B05075-GM meets industry standards.

7.What is the process for return or replacement of SI5338M-B05075-GM?

All SI5338M-B05075-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338M-B05075-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338M-B05075-GM part is unused and in its original packaging.

Return procedure for SI5338M-B05075-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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