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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338M-B05237-GMR

Name: SI5338M-B05237-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338M-B05237-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338M-B05237-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338M-B05237-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338M-B05237-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in high-speed serial interface timing applications such as PCIe root complexes and FPGA clock trees.

For engineers reviewing the SI5338M-B05237-GMR datasheet, SI5338M-B05237-GMR pinout, SI5338M-B05237-GMR application, or SI5338M-B05237-GMR equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage control (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and 24-QFN package compatibility with space-constrained PCB layouts.

Technical Context

The SI5338M-B05237-GMR implements a two-stage PLL architecture: a high-stability input stage with programmable R-divider for reference conditioning, followed by four independent MultiSynth™ fractional-N synthesis blocks (M0–M3) driving each output pair. Each synthesis path supports integer or fractional mode, enabling true zero-ppm frequency accuracy and <20 ps programmable phase offset steps.

It features flexible input support - including 8–30 MHz crystal, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, and 5–710 MHz differential references - and full I²C/SMBus register access for dynamic frequency increment/decrement (1 ppm steps) and real-time spread-spectrum modulation (33–63 kHz rate, 0.5–5.0% deviation).

Key Specifications

Parameter	Value and Actual Design Meaning
Output Count & Type	Four differential output pairs (CLK0A/B through CLK3A/B), configurable as LVPECL/LVDS/HCSL/CML/CMOS/SSTL/HSTL
Frequency Range per Output	0.16–710 MHz (LVPECL/LVDS); 0.16–250 MHz (HCSL); 0.16–350 MHz (SSTL/HSTL); 0.16–200 MHz (CMOS)
Phase Jitter (RMS)	0.7 ps (12 kHz–20 MHz, 125 MHz output, 25 MHz ref)
PCIe Compliance	Gen 1/2/3/4 Common Clock; Gen 3 SRNS; Gen 4 Common Clock (0.15–0.45 ps RMS)
Supply Voltages	Core: 1.8/2.5/3.3 V; Output buffers: independently selectable 1.5/1.8/2.5/3.3 V per driver
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad
Operating Temperature	–40 °C to +85 °C ambient

Pinout & Package

SI5338M-B05237-GMR is housed in a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with an exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential Reference Inputs	Accept AC-coupled 5–710 MHz differential clocks; require external 100 Ω termination
IN3, IN4	Single-Ended Reference Inputs	Support 5–200 MHz CMOS; VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A–CLK3B	Differential Output Pairs	Four independent output drivers; each pair supports format/voltage configuration via registers
VDDO0–VDDO3	Output Buffer Supplies	Independent 1.5/1.8/2.5/3.3 V supplies per output bank; enable mixed-voltage clock distribution
VDD	Core Supply	Single 1.8/2.5/3.3 V core supply; PSRR optimized for noise immunity
SCL, SDA	I²C Interface	Standard SMBus-compatible 100/400 kHz interface; supports multi-drop addressing
INTR	Interrupt Output	Open-drain status indicator for loss-of-lock (LOL) and loss-of-signal (LOS)

Key Features

Feature	Design Value
MultiSynth™ Any-Frequency Synthesis	Four independent output frequencies from single reference, with 1 ppb resolution and zero ppm accuracy
Programmable Spread Spectrum	Configurable down-spread (0.5–5.0%) and modulation rate (33–63 kHz) on any output to reduce EMI
Glitchless Frequency Adjustment	Hardware-controlled frequency increment/decrement (1 ppm steps) without output interruption
Sub-20 ps Phase Control	Independent ±45 ns phase offset per output with <20 ps step resolution for skew alignment
Zero-Delay Mode Support	External feedback path enables synchronous clock forwarding with minimal latency

Applications

PCIe Gen 4 Root Complex Timing	FPGA High-Speed Transceiver Clocking
Use Scenario: Providing synchronized 100 MHz common clock and 250 MHz reference to PCIe Gen 4 endpoint and switch ICs in server backplanes. IC Role / Device Role / Timing Role: Quad-output clock generator delivering low-jitter, spread-spectrum-enabled clocks meeting PCIe Gen 4 Common Clock jitter spec (≤0.45 ps RMS). Use Value: Eliminates need for multiple discrete oscillators; reduces board area and BOM count while ensuring compliance with PCIe Base Spec 4.0 rev. 0.5.	Use Scenario: Driving GTY transceivers and logic fabric clocks in Xilinx UltraScale+ FPGAs for 28 Gbps SerDes links. IC Role / Device Role / Timing Role: Configurable clock source generating 125 MHz (GT refclk), 156.25 MHz (Ethernet), and 250 MHz (fabric) from one 25 MHz crystal. Use Value: Enables single-reference, multi-frequency synthesis with sub-10 ps inter-output skew - critical for deterministic SerDes startup and channel equalization.
Ethernet Switch Line Card	Broadcast Video Master Clock
Use Scenario: Generating 125 MHz (1 GbE), 156.25 MHz (10 GbE), and 312.5 MHz (25 GbE) clocks for Broadcom Tomahawk ASICs in modular switches. IC Role / Device Role / Timing Role: Programmable clock generator supporting mixed-rate Ethernet PHYs with independent voltage domains (1.8 V for 10G, 2.5 V for 25G). Use Value: Reduces layout complexity by replacing three separate clock ICs; simplifies firmware updates via I²C instead of hardware rework.	Use Scenario: Delivering SMPTE ST 2059-2 compliant 27 MHz, 74.25 MHz, and 148.5 MHz video master clocks to SDI serializers and frame synchronizers in broadcast routers. IC Role / Device Role / Timing Role: Precision timing IC with <0.7 ps RMS jitter and programmable phase alignment for genlock-capable video infrastructure. Use Value: Meets ITU-R BT.2020 jitter requirements (<1.5 ps RMS over 12 kHz–20 MHz) without external jitter cleaners, lowering system cost and power.

PCIe Gen 4 Root Complex Timing

FPGA High-Speed Transceiver Clocking

Use Scenario: Providing synchronized 100 MHz common clock and 250 MHz reference to PCIe Gen 4 endpoint and switch ICs in server backplanes.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering low-jitter, spread-spectrum-enabled clocks meeting PCIe Gen 4 Common Clock jitter spec (≤0.45 ps RMS).

Use Value: Eliminates need for multiple discrete oscillators; reduces board area and BOM count while ensuring compliance with PCIe Base Spec 4.0 rev. 0.5.

Use Scenario: Driving GTY transceivers and logic fabric clocks in Xilinx UltraScale+ FPGAs for 28 Gbps SerDes links.

IC Role / Device Role / Timing Role: Configurable clock source generating 125 MHz (GT refclk), 156.25 MHz (Ethernet), and 250 MHz (fabric) from one 25 MHz crystal.

Use Value: Enables single-reference, multi-frequency synthesis with sub-10 ps inter-output skew - critical for deterministic SerDes startup and channel equalization.

Ethernet Switch Line Card

Broadcast Video Master Clock

Use Scenario: Generating 125 MHz (1 GbE), 156.25 MHz (10 GbE), and 312.5 MHz (25 GbE) clocks for Broadcom Tomahawk ASICs in modular switches.

IC Role / Device Role / Timing Role: Programmable clock generator supporting mixed-rate Ethernet PHYs with independent voltage domains (1.8 V for 10G, 2.5 V for 25G).

Use Value: Reduces layout complexity by replacing three separate clock ICs; simplifies firmware updates via I²C instead of hardware rework.

Use Scenario: Delivering SMPTE ST 2059-2 compliant 27 MHz, 74.25 MHz, and 148.5 MHz video master clocks to SDI serializers and frame synchronizers in broadcast routers.

IC Role / Device Role / Timing Role: Precision timing IC with <0.7 ps RMS jitter and programmable phase alignment for genlock-capable video infrastructure.

Use Value: Meets ITU-R BT.2020 jitter requirements (<1.5 ps RMS over 12 kHz–20 MHz) without external jitter cleaners, lowering system cost and power.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5338A-B-GM	Same silicon, factory-programmed default config; lacks OTP customization of SI5338M-B05237-GMR	Pre-configured for generic use; requires no ClockBuilder Pro setup for basic operation	Select when rapid deployment without custom register programming is required
LMK04832ISQE/NOPB	Two PLLs (vs. one), higher power (120 mA vs. 45 mA), larger 48-QFN package; supports JESD204B subclass 1	Targeted at RF/data converter timing; includes dual-loop clean-up architecture not needed for PCIe/FPGA clocking	Select only if deterministic latency, holdover, or JESD204B subclass 1 support is mandatory

Compared with Si5338A-B-GM, SI5338M-B05237-GMR offers field-programmable flexibility and optimized jitter for serial link timing; compared with LMK04832ISQE/NOPB, it delivers lower power, smaller footprint, and simpler configuration - making it preferable for cost- and space-sensitive PCIe, Ethernet, and FPGA clock trees.

Availability

SI5338M-B05237-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 server platforms, FPGA-based high-speed data acquisition systems, and broadcast video infrastructure requiring stable component supply, long-term lifecycle assurance, and guaranteed traceable sourcing.

Supply support for SI5338M-B05237-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog ICs for communications, automotive, and industrial markets.

The Si5338 product line was designed specifically for high-performance, software-configurable clock generation in serial-data infrastructure - targeting PCIe, Ethernet, Fibre Channel, and broadcast video systems where low jitter, multi-format outputs, and compact packaging are essential.

FAQ

What is the primary function of the SI5338M-B05237-GMR in a PCIe Gen 4 system?

The SI5338M-B05237-GMR serves as a quad-output clock generator delivering compliant 100 MHz common clock and reference signals to PCIe Gen 4 root complexes and endpoints. Its 0.15–0.45 ps RMS jitter meets PCIe Base Spec 4.0 rev. 0.5 requirements, and its spread-spectrum capability reduces EMI without violating jitter limits - all within a single 4 × 4 mm QFN package. SI5338M-B05237-GMR eliminates the need for multiple discrete oscillators while maintaining signal integrity across high-speed lanes.

Does the SI5338M-B05237-GMR support both differential and single-ended output formats simultaneously?

Yes, the SI5338M-B05237-GMR supports simultaneous differential (LVPECL/LVDS/HCSL/CML) and single-ended (CMOS/SSTL/HSTL) outputs across its four configurable drivers. Each output pair (CLK0A/B through CLK3A/B) can be independently assigned format and voltage (1.5/1.8/2.5/3.3 V), enabling mixed-signal clock trees - for example, LVDS for FPGA transceivers and CMOS for microcontroller peripherals. SI5338M-B05237-GMR's register map allows per-driver format selection without hardware modification.

How is the SI5338M-B05237-GMR programmed, and what tools are required?

The SI5338M-B05237-GMR is programmed via its I²C/SMBus interface using Skyworks' ClockBuilder Pro software, which generates custom configuration files (.cbs) and register maps. Users select input references, output frequencies, formats, voltages, and spread-spectrum parameters graphically; the tool validates settings against silicon constraints and exports firmware-ready code. SI5338M-B05237-GMR also supports pin-strapped boot modes and OTP storage for factory-programmed defaults, but full flexibility requires ClockBuilder Pro and an I²C host controller.

What is the maximum output frequency supported by the SI5338M-B05237-GMR in LVPECL mode?

The SI5338M-B05237-GMR supports LVPECL outputs up to 710 MHz, as verified in Table 6 of the official datasheet under "Output Clocks (Differential)". This applies when using the VCO's fundamental frequency range (Fvco/4 or Fvco/6) and requires proper termination (50 Ω to VDD–2 V). Note that only two unique frequencies above 350 MHz may be active simultaneously - e.g., 710 MHz and 550 MHz - due to internal VCO division constraints. SI5338M-B05237-GMR maintains 0.7 ps RMS jitter even at these high frequencies when driven from a low-noise differential reference.

Is the SI5338M-B05237-GMR suitable for industrial temperature applications?

Yes, the SI5338M-B05237-GMR is rated for operation from –40 °C to +85 °C ambient temperature, fully qualified per the recommended operating conditions in Table 1 of the datasheet. Its core supply (1.8/2.5/3.3 V) and output buffer supplies maintain specified performance across this range, and thermal resistance (θJA = 37 °C/W) ensures reliable operation in enclosed industrial enclosures. SI5338M-B05237-GMR has been deployed in telecom line cards and industrial Ethernet switches where extended temperature stability is required.

SI5338M-B05237-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338M-B05237-GMR FAQ

1.How can I place an order for SI5338M-B05237-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338M-B05237-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338M-B05237-GMR reliable?

The price and inventory of SI5338M-B05237-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338M-B05237-GMR is usually 5 days.

3.What payment methods are accepted for SI5338M-B05237-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338M-B05237-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338M-B05237-GMR?

SI5338M-B05237-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338M-B05237-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338M-B05237-GMR?

For technical support, including SI5338M-B05237-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338M-B05237-GMR requirements.

6.How does Aetrix verify that SI5338M-B05237-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338M-B05237-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338M-B05237-GMR meets industry standards.

7.What is the process for return or replacement of SI5338M-B05237-GMR?

All SI5338M-B05237-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338M-B05237-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338M-B05237-GMR part is unused and in its original packaging.

Return procedure for SI5338M-B05237-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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