Skyworks Solutions Inc. SI5338M-B05693-GM
- Part No.:
- SI5338M-B05693-GM
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Application Specific Clock/Timing
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
SI5338M-B05693-GM.pdf
- Description:
- I2C CONTROL, 4-OUTPUT, ANY FREQU
- Quantity:
- Payment:

- Shipping:

Inventory:1,780
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Product details
Overview
SI5338M-B05693-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in high-speed serial interface timing applications such as PCIe root complexes and FPGA clock trees.
For engineers reviewing the SI5338M-B05693-GM datasheet, SI5338M-B05693-GM pinout, SI5338M-B05693-GM application, or SI5338M-B05693-GM equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage control (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and 24-QFN package compatibility with space-constrained PCB layouts.
Technical Context
The SI5338M-B05693-GM implements a two-stage PLL architecture: a high-stability integer-N PLL (Stage 1) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating precise output frequencies. Each output driver supports format selection (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL) and programmable slew rate control.
It features loss-of-lock and loss-of-signal monitoring, independent phase/frequency increment/decrement (20 ps / 1 ppm steps), external feedback for zero-delay mode, and I²C/SMBus-compatible configuration via 24-bit address space. The device uses on-chip OTP NVM for factory programming and supports dynamic reconfiguration without reset.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Phase Jitter (RMS) | 0.7 ps typ (12 kHz–20 MHz); meets PCIe Gen 3 SRNS & Gen 4 common clock jitter requirements |
| Output Frequency Range | 0.16–710 MHz; supports LVPECL/LVDS up to 710 MHz, HCSL up to 250 MHz, CMOS up to 200 MHz |
| Input Reference Support | Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) |
| Supply Voltages | Core: 1.8/2.5/3.3 V ±10%; Output buffers: independently configurable 1.4–3.63 V per driver |
| Package | 24-pin QFN, 4 × 4 mm, 0.5 mm pitch; thermally enhanced with exposed pad |
| Operating Temperature | –40 to +85 °C; qualified for industrial and telecom line card environments |
| Power Consumption | 45 mA typ core current at 100 MHz on all outputs and 25 MHz reference |
Pinout & Package
SI5338M-B05693-GM is housed in a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per Si5338 family specification and validated for this variant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1, IN2, IN5, IN6 | Differential input pairs | Accept 5–710 MHz AC-coupled differential clocks; require external 100 Ω termination |
| IN3, IN4 | Single-ended input pins | Support 5–200 MHz CMOS inputs; VIH = 0.7×VDD, VIL = 0.3×VDD |
| CLK0A/CLK0B to CLK3A/CLK3B | Differential output pairs | Four independent output drivers; each configurable for LVPECL/LVDS/HCSL/CML/SSTL/HSTL |
| VDDO0–VDDO3 | Output buffer supply rails | Independent 1.4–3.63 V supplies per output bank; enable mixed-voltage system interfacing |
| VDD | Core supply | Single 1.8/2.5/3.3 V supply; PSRR optimized for low-noise clock generation |
| SCL, SDA | I²C interface | Standard SMBus-compatible 2-wire bus; supports 100/400 kHz modes; pull-up required |
| INTR | Interrupt output | Open-drain status indicator for loss-of-lock or loss-of-signal events |
| RSVD_GND | Reserved ground | Internal no-connect; must be tied to GND per layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth™ frequency synthesis | Enables true zero-ppm accuracy on all four outputs with independent fractional-N dividers |
| PCIe Gen 1–4 compliance | Meets Common Clock jitter limits (0.11–0.45 ps RMS) and SRNS requirements without external filtering |
| Independent output voltage per driver | Allows direct interfacing to mixed-voltage SoCs, FPGAs, and SerDes without level shifters |
| Programmable spread spectrum | Configurable 0.5–5.0% down-spread at 33–63 kHz modulation rate to reduce EMI in dense PCBs |
| Glitchless frequency adjustment | 1 ppm step size with hardware pin control enables real-time clock tuning during system operation |
| External feedback mode | Supports zero-delay buffer configuration for synchronous clock distribution networks |
Applications
| PCIe Gen 3/4 Root Complex | Ethernet Switch Timing |
|---|---|
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe endpoints and upstream ports in server motherboard designs. IC Role / Device Role / Timing Role: Quad-output clock generator delivering PCIe-compliant common clock with <0.32 ps RMS jitter (SRNS mode). Use Value: Eliminates need for four discrete oscillators; reduces BOM count and board area while maintaining Gen 4 compliance. | Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs and switch fabric in enterprise switches. IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact Ethernet line rates with independent output formats (LVDS for PHYs, CMOS for management MCU). Use Value: Enables single-device support for multi-rate Ethernet interfaces without external dividers or translators. |
| FPGA Clock Tree | Broadcast Video Timing |
Use Scenario: Supplying multiple clock domains (e.g., 200 MHz logic, 400 MHz transceiver, 100 MHz AXI) to Xilinx/Intel FPGAs in video processing systems. IC Role / Device Role / Timing Role: Configurable quad clock source with independent phase offset (<20 ps resolution) and voltage per output. Use Value: Simplifies timing closure by aligning clock edges across heterogeneous FPGA subsystems with sub-ns skew control. | Use Scenario: Delivering SMPTE ST 2082 (27 Gbps) pixel clock and ancillary timing signals (e.g., 148.5 MHz, 74.25 MHz) in 4K/8K broadcast cameras and routers. IC Role / Device Role / Timing Role: Low-jitter (0.7 ps RMS) generator supporting >350 MHz outputs in LVPECL/LVDS for high-speed serial links. Use Value: Meets stringent broadcast jitter specs (<1 ps RMS) without external jitter cleaners, reducing latency and component count. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5332A-D05693-GM | Higher integration: includes integrated crystal, lower jitter (0.35 ps RMS), supports up to 10 outputs | Targeted at ultra-low-jitter applications (e.g., 5G fronthaul, coherent optics) requiring tighter phase noise | Select when crystal integration and sub-0.4 ps jitter are mandatory; higher cost and larger footprint |
| ICS8430I-01T | Fixed-frequency quad LVDS generator; no I²C programmability; 1.2 ps RMS jitter; 3.3 V only | Used in legacy systems where frequency flexibility is not required and cost sensitivity is high | Select only for static clock trees with known, unchanging frequencies; no field reconfiguration capability |
Compared with Si5332A-D05693-GM and ICS8430I-01T, the SI5338M-B05693-GM offers optimal balance of programmability, jitter performance, and industrial temperature range - enabling field-upgradable timing in PCIe, Ethernet, and FPGA platforms without redesigning clock circuitry.
Availability
SI5338M-B05693-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 root complexes, 10 GbE switch timing, and FPGA-based broadcast video equipment requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for SI5338M-B05693-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs for infrastructure, automotive, and mobile markets.
The Si5338 product line was designed for high-performance, software-configurable clock generation in data center, networking, and broadcast systems where multi-frequency synthesis, low jitter, and flexible output formatting are critical.
FAQ
What is the maximum output frequency supported by the SI5338M-B05693-GM in LVPECL mode?
The SI5338M-B05693-GM supports LVPECL outputs up to 710 MHz, as confirmed in Table 6 of the datasheet. This applies when using the MultiSynth™ synthesizer in integer mode with appropriate VCO settings and load conditions. Operation above 350 MHz requires careful attention to layout and termination to maintain jitter performance below 1 ps RMS.
Does the SI5338M-B05693-GM support PCIe Gen 4 Separate Reference No Spread (SRNS) timing?
Yes, the SI5338M-B05693-GM is explicitly compliant with PCIe Gen 4 SRNS requirements, achieving 0.15–0.45 ps RMS jitter (Table 12) under specified conditions: PLL bandwidth of 2–4 MHz or 2–5 MHz and CDR = 10 MHz. This compliance is verified using the Skyworks PCIe Clock Jitter Tool and Intel Clock Jitter Tool v1.6.4.
Can the SI5338M-B05693-GM generate different output voltages simultaneously on its four drivers?
Yes, the SI5338M-B05693-GM provides independent VDDO0–VDDO3 supply pins, allowing each of its four output drivers to operate at different voltages-1.5 V, 1.8 V, 2.5 V, or 3.3 V-within the 1.4–3.63 V range. This enables direct interfacing to mixed-voltage devices like multi-rail FPGAs or heterogeneous SoCs without external level shifters.
How is the SI5338M-B05693-GM programmed, and is ClockBuilder Pro required?
The SI5338M-B05693-GM is programmed via its I²C/SMBus interface using register writes. While ClockBuilder Pro is the official Skyworks GUI tool for configuration and .hex file generation, direct register-level programming is fully supported. The device includes on-chip OTP NVM for storing factory configurations, and all registers are accessible for runtime updates without reset.
What is the thermal resistance (θJA) of the SI5338M-B05693-GM in its 24-QFN package?
The SI5338M-B05693-GM has a junction-to-ambient thermal resistance (θJA) of 37 °C/W under still-air conditions, as specified in Table 4 of the datasheet. This value assumes proper PCB layout with the exposed thermal pad soldered to a minimum 100 mm² copper pour connected to internal ground planes for effective heat dissipation.
SI5338M-B05693-GM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- MultiSynth™
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- PLL:
- -
- Main Purpose:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
SI5338M-B05693-GM FAQ
1.How can I place an order for SI5338M-B05693-GM through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5338M-B05693-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5338M-B05693-GM reliable?
The price and inventory of SI5338M-B05693-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338M-B05693-GM is usually 5 days.
3.What payment methods are accepted for SI5338M-B05693-GM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338M-B05693-GM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5338M-B05693-GM?
SI5338M-B05693-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5338M-B05693-GM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5338M-B05693-GM?
For technical support, including SI5338M-B05693-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338M-B05693-GM requirements.
6.How does Aetrix verify that SI5338M-B05693-GM is sourced from the original manufacturer or authorized distributors?
All SI5338M-B05693-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338M-B05693-GM meets industry standards.
7.What is the process for return or replacement of SI5338M-B05693-GM?
All SI5338M-B05693-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338M-B05693-GM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5338M-B05693-GM part is unused and in its original packaging.
Return procedure for SI5338M-B05693-GM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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