Skyworks Solutions Inc. SI5338M-B05694-GMR
- Part No.:
- SI5338M-B05694-GMR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Application Specific Clock/Timing
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
SI5338M-B05694-GMR.pdf
- Description:
- I2C CONTROL, 4-OUTPUT, ANY FREQU
- Quantity:
- Payment:

- Shipping:

Inventory:4,840
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Product details
Overview
SI5338M-B05694-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in Ethernet switch/router and FPGA clocking systems.
For engineers reviewing the SI5338M-B05694-GMR datasheet, SI5338M-B05694-GMR pinout, SI5338M-B05694-GMR application, or SI5338M-B05694-GMR equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage per driver (1.5–3.3 V), spread-spectrum capability (0.5–5.0% down-spread), loss-of-lock/loss-of-signal alarms, and I²C/SMBus programmability via ClockBuilder Pro software.
Technical Context
The SI5338M-B05694-GMR implements a two-stage PLL architecture: Stage 1 uses a high-frequency VCO with programmable N-divider for reference-to-VCO frequency translation; Stage 2 employs four independent MultiSynth™ fractional-N synthesizers, each with M/P dividers, enabling zero-ppm precision on all four outputs. Input flexibility includes external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) references.
Each output driver supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats with independent voltage selection (1.5/1.8/2.5/3.3 V), programmable phase offset (±45 ns, <20 ps step), and glitchless frequency increment/decrement (1 ppm steps). External feedback mode enables zero-delay operation, while INTR pin provides loss-of-lock and loss-of-signal status reporting.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Phase Jitter (RMS) | 0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS & Gen 4 common clock jitter requirements |
| Output Frequency Range | 0.16–710 MHz per channel; supports integer/fractional synthesis with true zero-ppm accuracy |
| Input Reference Support | Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) |
| Output Formats | LVPECL, LVDS, HCSL, CMOS, SSTL, HSTL - each output independently configurable |
| Supply Voltages | Core: 1.8/2.5/3.3 V ±10%; Output buffers: 1.4–3.63 V per driver (1.5/1.8/2.5/3.3 V selectable) |
| Package | 24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, moisture-sensitive level 3 |
| Operating Temp | –40 °C to +85 °C ambient; qualified per industrial temperature grade |
Pinout & Package
SI5338M-B05694-GMR is housed in a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin 1 is top-left corner (IN1), pin 24 is bottom-right (GND). The package supports reflow soldering per JEDEC J-STD-020 (peak 260 °C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1, IN2, IN5, IN6 | Differential input pairs | Accept 5–710 MHz AC-coupled differential clocks; require external 100 Ω termination |
| IN3, IN4 | Single-ended inputs | Support 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL; VIH = 0.7×VDD, VIL = 0.3×VDD |
| CLK0A/CLK0B – CLK3A/CLK3B | Differential output pairs | Four independent output channels; each pair supports LVPECL/LVDS/HCSL/CML/SSTL/HSTL |
| VDDO0–VDDO3 | Output buffer supplies | Independent 1.4–3.63 V supplies per output bank; enable mixed-voltage system interfacing |
| VDD | Core supply | Single 1.8/2.5/3.3 V supply for internal logic, PLL, and MultiSynth stages |
| SCL, SDA | I²C interface | Standard SMBus-compatible serial interface (up to 400 kHz); supports ClockBuilder Pro programming |
| INTR | Interrupt output | Open-drain status pin indicating loss-of-lock or loss-of-signal events |
| RSVD_GND | Reserved ground | Internal test pin; must be connected to GND per layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth™ synthesis engine | Enables independent, any-frequency generation (0.16–710 MHz) on all four outputs with 0 ppm error |
| PCIe Gen 1–4 timing compliance | Fully compliant with PCIe Gen 1/2/3 Common Clock and Gen 3 SRNS; supports Gen 4 common clock jitter spec (0.15–0.45 ps RMS) |
| Programmable spread spectrum | Configurable on any output: 0.5–5.0% down-spread, 33–63 kHz modulation rate, no external components required |
| Glitchless frequency tuning | Independent frequency increment/decrement via pins or I²C in 1 ppm steps without output interruption |
| Phase adjustment resolution | ±45 ns range with <20 ps step size per output; enables precise skew control across multi-channel systems |
Applications
| Processor and FPGA Clocking | PCIe Gen 1–4 Systems |
|---|---|
Use Scenario: Providing multiple synchronized clocks to heterogeneous SoCs, FPGAs, and ASICs in compute-accelerated edge servers. IC Role / Device Role / Timing Role: Quad-output clock generator delivering independent 100 MHz, 125 MHz, 156.25 MHz, and 312.5 MHz clocks with sub-1 ps jitter. Use Value: Eliminates need for four discrete oscillators; reduces board area by >60% and improves timing margin vs. crystal-based solutions. | Use Scenario: Generating compliant reference clocks for PCIe root complexes and endpoints in storage controllers and AI accelerators. IC Role / Device Role / Timing Role: PCIe Common Clock source meeting Gen 3 SRNS and Gen 4 jitter specs (0.11–0.45 ps RMS) across all four lanes. Use Value: Enables single-chip timing solution for multi-lane PCIe designs; avoids external jitter cleaners and simplifies layout. |
| Ethernet Switch/Routers | Broadcast Video Timing |
Use Scenario: Synchronizing 1 GbE and 10 GbE PHYs, packet processors, and traffic managers in carrier-grade switching platforms. IC Role / Device Role / Timing Role: Low-jitter clock source for IEEE 1588 PTP grandmaster clocks and SerDes line rates (622.08 MHz, 1.244 Gbps). Use Value: Meets ITU-T G.8262 EEC-2 wander tolerance; supports deterministic latency via phase-aligned outputs. | Use Scenario: Delivering SMPTE ST 2059-2–compliant timing to video encoders, decoders, and frame synchronizers in broadcast infrastructure. IC Role / Device Role / Timing Role: Precision clock generator producing 27 MHz, 74.25 MHz, and 148.5 MHz video reference clocks with <10 ps pk-pk period jitter. Use Value: Ensures frame-accurate synchronization across multi-camera ingest systems; eliminates lip-sync errors in live production. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5332A-D05694-GM | Higher integration: 8 outputs, integrated EEPROM, lower jitter (0.35 ps RMS), supports JESD204B deterministic latency | Targeted at JESD204B ADC/DAC timing and high-density multi-clock systems where 8 outputs are needed | Select when >4 outputs, deterministic latency, or embedded configuration storage are required |
| ICS8430I-01T | Fixed-frequency quad LVDS generator (no I²C programming); 1.2 ps RMS jitter; 100–700 MHz range; 3.3 V only | Used in cost-sensitive, fixed-clock applications like legacy telecom line cards where programmability is unnecessary | Select only for non-programmable, single-supply, fixed-frequency deployments with relaxed jitter requirements |
Compared with Si5332A-D05694-GM and ICS8430I-01T, SI5338M-B05694-GMR offers optimal balance of programmability, jitter performance (0.7 ps RMS), and industrial temperature support in a compact 4×4 mm QFN-making it ideal for PCIe, Ethernet, and FPGA timing where field reconfiguration and mixed-voltage outputs are essential.
Availability
SI5338M-B05694-GMR is available at Aetrix Electronics and suitable for Ethernet switch/router, PCIe Gen 1–4 endpoint design, and processor/FPGA clocking applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for SI5338M-B05694-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for wireless, broadband, automotive, and industrial markets.
The SI5338 family is designed for high-performance, programmable clock generation in datacenter, networking, and communications equipment-emphasizing low jitter, flexible output configuration, and PCIe/Ethernet timing compliance.
FAQ
What is the maximum output frequency supported by SI5338M-B05694-GMR?
The SI5338M-B05694-GMR supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. Frequencies above 350 MHz are limited to two unique values simultaneously (Fvco/4 and Fvco/6) due to VCO architecture constraints. All outputs maintain 0 ppm synthesis accuracy regardless of frequency.
Does SI5338M-B05694-GMR support spread-spectrum clocking (SSC)?
Yes, SI5338M-B05694-GMR supports fully programmable spread-spectrum clocking on any output: spread range 0.5–5.0%, modulation rate 33–63 kHz, and direction (down-spread only). Configuration is done via I²C registers or ClockBuilder Pro software; no external components are required.
Can SI5338M-B05694-GMR operate with a single-ended input clock?
Yes, SI5338M-B05694-GMR accepts single-ended CMOS, SSTL, or HSTL inputs on pins IN3 and IN4, supporting frequencies from 5–200 MHz (CMOS) or 5–350 MHz (SSTL/HSTL). Input thresholds are referenced to VDD (VIH = 0.7×VDD, VIL = 0.3×VDD), and slew rate should exceed 1 V/ns for optimal jitter performance.
What is the power consumption of SI5338M-B05694-GMR under typical operating conditions?
SI5338M-B05694-GMR draws 45 mA typical core supply current (IDD) when generating 100 MHz on all outputs with a 25 MHz reference clock. Output buffer current varies by format and frequency: e.g., 30 mA max for LVPECL at 710 MHz, 8 mA max for LVDS at 710 MHz, and 13–18 mA for CMOS at 200 MHz (3.3 V VDDO).
How is SI5338M-B05694-GMR programmed and configured?
SI5338M-B05694-GMR is programmed via its I²C/SMBus-compatible interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software, which generates register maps and configuration files. Configuration can be stored in on-chip OTP memory for autonomous startup, or loaded dynamically during system initialization.
SI5338M-B05694-GMR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- MultiSynth™
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- PLL:
- -
- Main Purpose:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
SI5338M-B05694-GMR FAQ
1.How can I place an order for SI5338M-B05694-GMR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5338M-B05694-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5338M-B05694-GMR reliable?
The price and inventory of SI5338M-B05694-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338M-B05694-GMR is usually 5 days.
3.What payment methods are accepted for SI5338M-B05694-GMR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338M-B05694-GMR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5338M-B05694-GMR?
SI5338M-B05694-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5338M-B05694-GMR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5338M-B05694-GMR?
For technical support, including SI5338M-B05694-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338M-B05694-GMR requirements.
6.How does Aetrix verify that SI5338M-B05694-GMR is sourced from the original manufacturer or authorized distributors?
All SI5338M-B05694-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338M-B05694-GMR meets industry standards.
7.What is the process for return or replacement of SI5338M-B05694-GMR?
All SI5338M-B05694-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338M-B05694-GMR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5338M-B05694-GMR part is unused and in its original packaging.
Return procedure for SI5338M-B05694-GMR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI5338M-B05694-GMR Tags

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