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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338M-B05695-GMR

Name: SI5338M-B05695-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338M-B05695-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338M-B05695-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338M-B05695-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338M-B05695-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in Ethernet switch/router, PCIe, and FPGA clocking systems.

For engineers reviewing the SI5338M-B05695-GMR datasheet, SI5338M-B05695-GMR pinout, SI5338M-B05695-GMR application, or SI5338M-B05695-GMR equivalent, key selection factors include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage control (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and 24-pin 4×4 mm QFN package with I²C/SMBus interface.

Technical Context

The SI5338M-B05695-GMR implements a two-stage PLL architecture: a high-performance integer-N PLL (Stage 1) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesis blocks (Stage 2) generating each output with true zero-ppm accuracy. Each output supports programmable format (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), voltage (1.5–3.3 V), phase offset (±45 ns in <20 ps steps), and frequency increment/decrement (1 ppm steps).

It features loss-of-lock and loss-of-signal alarms, external feedback mode for zero-delay operation, and independent spread-spectrum modulation (33–63 kHz rate, 0.5–5.0% spread) on any output. The device operates from a single 1.8/2.5/3.3 V core supply with 45 mA typical current draw and integrates OTP NVM for factory or field programming via I²C.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Count & Type	4 independent outputs; configurable as differential (LVPECL/LVDS/HCSL/CML) or single-ended (CMOS/SSTL/HSTL)
Frequency Range per Output	0.16–710 MHz (LVPECL/LVDS); 0.16–250 MHz (HCSL); 0.16–350 MHz (SSTL/HSTL); 0.16–200 MHz (CMOS)
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz), meeting PCIe Gen 3 SRNS and Gen 4 Common Clock specs
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply & Power	Single 1.8/2.5/3.3 V core supply; 45 mA typical IDD at 100 MHz on all outputs
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad
Operating Temperature	–40 to +85 °C ambient, qualified for industrial applications

Pinout & Package

SI5338M-B05695-GMR is housed in a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential input pairs	Accept AC-coupled differential clocks up to 710 MHz; require external 100 Ω termination
IN3, IN4	Single-ended input pins	Support CMOS/SSTL/HSTL inputs (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A/CLK0B to CLK3A/CLK3B	Differential output pairs	Four independent output drivers; each configurable for LVPECL/LVDS/HCSL/CML format and VDDOx supply
VDDO0–VDDO3	Output buffer supplies	Independent 1.5/1.8/2.5/3.3 V supplies per output bank; enable mixed-voltage system interfacing
VDD	Core supply	Single 1.8/2.5/3.3 V supply for internal logic and PLL; PSRR optimized for noise immunity
SCL, SDA	I²C interface	SMBus-compatible 100/400 kHz interface for configuration, status readback, and dynamic reprogramming
INTR	Interrupt output	Open-drain alarm signal indicating loss-of-lock or loss-of-signal events
RSVD_GND	Reserved ground	Internal connection to GND; must be tied to PCB ground plane for thermal and EMI performance

Key Features

Feature	Design Value
MultiSynth™ any-frequency synthesis	Four independent outputs each capable of synthesizing any frequency from 0.16 to 710 MHz with 0 ppm precision
PCIe Gen 1–4 timing compliance	Fully compliant with PCIe Gen 1/2/3 Common Clock and Gen 3 SRNS; meets Gen 4 Common Clock RMS jitter ≤0.45 ps
Independent output voltage per driver	Each output bank (VDDO0–VDDO3) supports 1.5 V, 1.8 V, 2.5 V, or 3.3 V - enabling direct interface to mixed-voltage FPGAs and ASICs
Glitchless frequency adjustment	Real-time ±1 ppm frequency increment/decrement via pin control or I²C without output interruption
Programmable spread spectrum	Configurable down-spread (0.5–5.0%) and modulation rate (33–63 kHz) on any output to reduce EMI peaks
Zero-delay mode support	External feedback path enables zero-delay clock distribution for synchronous systems requiring minimal skew

Applications

Ethernet Switch/Router Timing	PCIe Gen 3/4 Clocking
Use Scenario: High-density 1/10 GbE line cards requiring multiple synchronized clocks for MAC, PHY, and packet processor domains. IC Role / Device Role / Timing Role: Quad clock generator providing independent 125 MHz, 156.25 MHz, and 250 MHz clocks with sub-1 ps RMS jitter and tight inter-output skew. Use Value: Eliminates four discrete oscillators while maintaining PCIe Gen 3 SRNS and IEEE 802.3 compliance across all outputs.	Use Scenario: Server motherboard with CPU, GPU, and NVMe SSDs needing Common Clock architecture per PCIe Base Spec 3.0/4.0. IC Role / Device Role / Timing Role: Primary clock source delivering 100 MHz HCSL reference to all PCIe slots and endpoints with <0.32 ps RMS jitter (Gen 3 SRNS). Use Value: Meets strict PCIe Gen 4 Common Clock jitter spec (≤0.45 ps RMS) without external jitter cleaners or reclockers.
Processor & FPGA Clocking	Broadcast Video/Audio Timing
Use Scenario: Heterogeneous SoC/FPGA platforms requiring distinct clocks for DDR memory, video processing, and peripheral interfaces. IC Role / Device Role / Timing Role: Configurable clock hub supplying 333 MHz DDR4, 297 MHz HDMI TMDS, and 27 MHz USB PHY clocks from a single 25 MHz crystal. Use Value: Reduces BOM count and board area vs. discrete oscillators; enables dynamic frequency scaling via I²C during system runtime.	Use Scenario: SMPTE ST 2082/2110 IP video routers needing precise 27 MHz, 74.25 MHz, and 148.5 MHz sync signals with low deterministic jitter. IC Role / Device Role / Timing Role: Master timing engine generating SMPTE-compliant video clocks with <10 ps pk-pk cycle-cycle jitter and programmable phase alignment. Use Value: Supports frame-accurate genlock across multi-channel video pipelines without external delay tuning components.

Ethernet Switch/Router Timing

PCIe Gen 3/4 Clocking

Use Scenario: High-density 1/10 GbE line cards requiring multiple synchronized clocks for MAC, PHY, and packet processor domains.

IC Role / Device Role / Timing Role: Quad clock generator providing independent 125 MHz, 156.25 MHz, and 250 MHz clocks with sub-1 ps RMS jitter and tight inter-output skew.

Use Value: Eliminates four discrete oscillators while maintaining PCIe Gen 3 SRNS and IEEE 802.3 compliance across all outputs.

Use Scenario: Server motherboard with CPU, GPU, and NVMe SSDs needing Common Clock architecture per PCIe Base Spec 3.0/4.0.

IC Role / Device Role / Timing Role: Primary clock source delivering 100 MHz HCSL reference to all PCIe slots and endpoints with <0.32 ps RMS jitter (Gen 3 SRNS).

Use Value: Meets strict PCIe Gen 4 Common Clock jitter spec (≤0.45 ps RMS) without external jitter cleaners or reclockers.

Processor & FPGA Clocking

Broadcast Video/Audio Timing

Use Scenario: Heterogeneous SoC/FPGA platforms requiring distinct clocks for DDR memory, video processing, and peripheral interfaces.

IC Role / Device Role / Timing Role: Configurable clock hub supplying 333 MHz DDR4, 297 MHz HDMI TMDS, and 27 MHz USB PHY clocks from a single 25 MHz crystal.

Use Value: Reduces BOM count and board area vs. discrete oscillators; enables dynamic frequency scaling via I²C during system runtime.

Use Scenario: SMPTE ST 2082/2110 IP video routers needing precise 27 MHz, 74.25 MHz, and 148.5 MHz sync signals with low deterministic jitter.

IC Role / Device Role / Timing Role: Master timing engine generating SMPTE-compliant video clocks with <10 ps pk-pk cycle-cycle jitter and programmable phase alignment.

Use Value: Supports frame-accurate genlock across multi-channel video pipelines without external delay tuning components.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05689-GM	Higher integration: includes integrated crystal, lower jitter (0.35 ps RMS), but fixed 4-output LVDS-only; no HCSL/CMOS support	Best for space-constrained, ultra-low-jitter LVDS-only systems; not suitable for mixed-format or crystal-less designs	Select when board space is critical and all loads accept LVDS; avoid if HCSL, CMOS, or external crystal flexibility is required.
ICS853S02IAGLF	Non-programmable, fixed-frequency quad LVDS buffer; no synthesis, no I²C, higher jitter (1.2 ps RMS)	Only usable where exact pre-defined frequencies are needed; no frequency agility or spread-spectrum capability	Choose only for cost-sensitive, static-clock applications with no requirement for reconfiguration or jitter optimization.

Compared with Si5332A-D05689-GM and ICS853S02IAGLF, the SI5338M-B05695-GMR uniquely balances full I²C programmability, multi-format output flexibility, PCIe Gen 4 compliance, and external crystal support - making it the only option among the three that supports dynamic frequency changes, mixed-voltage interfaces, and custom spread-spectrum profiles in production systems.

Availability

SI5338M-B05695-GMR is available at Aetrix Electronics and suitable for Ethernet switch/router timing, PCIe Gen 3/4 clocking, and processor/FPGA clocking applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338M-B05695-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and industrial markets.

The SI5338M-B05695-GMR belongs to Skyworks' Si5338 family of programmable clock generators, designed specifically for high-reliability, multi-protocol timing in datacenter, telecom, and broadcast equipment where jitter, flexibility, and PCIe compliance are critical.

FAQ

What is the primary function of the SI5338M-B05695-GMR in a system?

The SI5338M-B05695-GMR serves as a fully programmable quad clock generator that synthesizes up to four independent, low-jitter output clocks from a single input reference. Its core function is to replace multiple discrete oscillators in complex systems like PCIe-based servers or Ethernet switches, delivering precise, configurable timing with 0.7 ps RMS jitter and PCIe Gen 4 compliance. The SI5338M-B05695-GMR enables design flexibility through I²C programming and supports mixed-signal environments via independent output voltage rails.

Does the SI5338M-B05695-GMR support PCIe Gen 4 timing requirements?

Yes, the SI5338M-B05695-GMR meets PCIe Gen 4 Common Clock specifications with ≤0.45 ps RMS jitter (12 kHz–20 MHz) when configured per Skyworks' recommended settings - including 100 MHz HCSL outputs, proper layout, and low-noise power delivery. It also satisfies PCIe Gen 3 SRNS (≤0.32 ps RMS) and earlier generations. Validation is documented in Skyworks Application Note AN562 and supported by the free Skyworks PCIe Clock Jitter Tool.

Can the SI5338M-B05695-GMR generate different output formats simultaneously?

Yes, the SI5338M-B05695-GMR supports simultaneous mixed-format outputs: for example, CLK0A/B as LVDS (156.25 MHz), CLK1A/B as HCSL (100 MHz), CLK2 as CMOS (27 MHz), and CLK3 as SSTL (100 MHz). Each output driver is independently configurable for format, voltage (1.5/1.8/2.5/3.3 V), termination, and slew rate - enabling direct interface to diverse loads such as FPGAs, ASICs, and memory controllers without level-shifting components.

What input references does the SI5338M-B05695-GMR accept?

The SI5338M-B05695-GMR accepts six input reference types: (1) 8–30 MHz fundamental-mode crystals on IN1/IN2, (2) single-ended CMOS clocks (5–200 MHz) on IN3/IN4, (3) SSTL or HSTL inputs (5–350 MHz) on IN3/IN4, and (4) differential inputs (5–710 MHz) on IN1/IN2 or IN5/IN6. All inputs support automatic loss-of-signal detection with configurable release time (0.01–1 µs), and the device can operate in PLL-bypass (buffer) mode for additive jitter as low as 0.165 ps RMS.

How is the SI5338M-B05695-GMR programmed and configured?

The SI5338M-B05695-GMR is programmed via its I²C/SMBus-compatible interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software, which generates register maps and configuration files. Configuration can be stored in on-chip OTP NVM for power-on initialization, or loaded dynamically at runtime. Pin-controlled functions (e.g., frequency increment/decrement, output enable) allow hardware-triggered adjustments without host intervention. The SI5338M-B05695-GMR also supports interrupt-driven status reporting via the INTR pin.

SI5338M-B05695-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338M-B05695-GMR FAQ

1.How can I place an order for SI5338M-B05695-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338M-B05695-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338M-B05695-GMR reliable?

The price and inventory of SI5338M-B05695-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338M-B05695-GMR is usually 5 days.

3.What payment methods are accepted for SI5338M-B05695-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338M-B05695-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338M-B05695-GMR?

SI5338M-B05695-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338M-B05695-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338M-B05695-GMR?

For technical support, including SI5338M-B05695-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338M-B05695-GMR requirements.

6.How does Aetrix verify that SI5338M-B05695-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338M-B05695-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338M-B05695-GMR meets industry standards.

7.What is the process for return or replacement of SI5338M-B05695-GMR?

All SI5338M-B05695-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338M-B05695-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338M-B05695-GMR part is unused and in its original packaging.

Return procedure for SI5338M-B05695-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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