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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338M-B05719-GMR

Name: SI5338M-B05719-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338M-B05719-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338M-B05719-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338M-B05719-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

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Product details

Overview

SI5338M-B05719-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in high-speed serial interface timing applications such as PCIe root complexes and FPGA-based compute platforms.

For engineers reviewing the SI5338M-B05719-GMR datasheet, SI5338M-B05719-GMR pinout, SI5338M-B05719-GMR application, or SI5338M-B05719-GMR equivalent, key selection considerations include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage control (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and 24-QFN package compatibility with space-constrained PCB layouts.

Technical Context

The SI5338M-B05719-GMR implements a two-stage PLL architecture: a high-stability reference stage (with crystal or external clock input) followed by four independent MultiSynth™ fractional-N synthesizers, each driving one output pair. Its synthesis resolution is 1 ppb, supporting true zero-ppm frequency accuracy on all outputs.

It supports flexible input references - including 8–30 MHz crystals, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, and 5–710 MHz differential inputs - and provides independent phase adjustment (<20 ps steps), glitchless frequency increment/decrement (1 ppm steps), and loss-of-lock/loss-of-signal alarms for system-level timing integrity monitoring.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS and Gen 4 common clock jitter requirements.
Output Frequency Range	0.16–710 MHz per channel; supports LVPECL/LVDS (≤710 MHz), HCSL (≤250 MHz), CMOS (≤200 MHz), SSTL/HSTL (≤350 MHz).
Synthesis Resolution	1 ppb; enables exact integer/fractional frequency generation without rounding error across full output range.
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz); allows direct replacement of multiple fixed-frequency sources.
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; output buffers: independently configurable 1.5/1.8/2.5/3.3 V per driver - simplifies mixed-voltage board design.
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; thermally enhanced with exposed pad for ≤37 °C/W junction-to-ambient thermal resistance.
Operating Temperature	–40 to +85 °C; qualified for industrial and telecom line card environments without derating.

Pinout & Package

SI5338M-B05719-GMR is housed in a 24-lead, 4 × 4 mm QFN package with wettable flanks and an exposed thermal pad. Pin 1 is located at top-left corner (marked by dot), and pin numbering proceeds counterclockwise.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential clock inputs	Accept AC-coupled 5–710 MHz differential clocks; internally terminated with 100 Ω; support loss-of-signal detection.
IN3, IN4	Single-ended clock inputs	Accept DC-coupled 5–200 MHz CMOS/SSTL/HSTL; VIH = 0.7×VDD, VIL = 0.3×VDD; enable multi-reference redundancy.
CLK0A/CLK0B to CLK3A/CLK3B	Differential output pairs	Four independent output drivers; each configurable as LVPECL, LVDS, HCSL, CML, or SSTL/HSTL; support independent voltage and format per pair.
VDDO0–VDDO3	Output buffer supply pins	Separate 1.5/1.8/2.5/3.3 V supplies per output bank; decoupling required per bank to minimize crosstalk and jitter.
VDD	Core supply	Single 1.8/2.5/3.3 V core supply; PSRR optimized for low-noise clock generation; 45 mA typical current draw at 100 MHz output load.
SCL, SDA	I²C/SMBus interface	Standard 100/400 kHz I²C bus; supports ClockBuilder Pro programming; no external pull-ups required if internal enabled.
INTR	Interrupt output	Open-drain status indicator for loss-of-lock, loss-of-signal, or configuration errors; active-low, 3 mA sink capability.

Key Features

Feature	Design Value
MultiSynth™ Any-Frequency Synthesis	Generates four independent, precise frequencies (0.16–710 MHz) from one reference - eliminates need for multiple XO/VCXO components and reduces BOM count.
PCIe Gen 1–4 Timing Compliance	Fully compliant with PCIe Gen 1/2/3 Common Clock and Gen 3 SRNS specifications; validated with Intel Clock Jitter Tool and Skyworks PCIe Jitter Tool.
Independent Output Voltage Control	Each of four output banks powered separately (1.5/1.8/2.5/3.3 V), enabling direct interfacing with mixed-voltage FPGAs, ASICs, and SerDes without level-shifting circuitry.
Programmable Spread Spectrum	Configurable down-spread (0.5–5.0%) and modulation rate (33–63 kHz) on any output - reduces EMI in dense PCB layouts without affecting timing margin.
Glitchless Frequency Adjustment	Real-time 1 ppm step frequency increment/decrement via pin control or I²C - enables dynamic clock scaling in adaptive computing or thermal throttling scenarios.

Applications

PCIe Root Complex Timing	FPGA-Based Compute Platform
Use Scenario: Providing synchronized 100 MHz reference clocks to PCIe Gen 3/4 endpoints and root ports in server backplanes and AI accelerator cards. IC Role / Device Role / Timing Role: Quad-output common clock generator with SRNS-compliant jitter performance and independent output enable/disable control. Use Value: Enables single-chip replacement of four discrete oscillators while meeting <0.32 ps RMS jitter requirement for PCIe Gen 3 SRNS mode.	Use Scenario: Delivering multiple domain-specific clocks (e.g., 250 MHz fabric, 156.25 MHz transceiver, 100 MHz AXI, 50 MHz management) to Xilinx Versal or Intel Agilex FPGAs. IC Role / Device Role / Timing Role: Programmable multi-frequency clock source with independent voltage and format per output bank. Use Value: Eliminates external level shifters and reduces layout complexity by supplying 1.8 V, 2.5 V, and 3.3 V clocks directly from one IC.
Ethernet Switch Fabric	Broadcast Video Timing System
Use Scenario: Generating 156.25 MHz, 312.5 MHz, and 625 MHz clocks for 1G/10G/25G Ethernet PHYs and switch ASICs in telecom aggregation switches. IC Role / Device Role / Timing Role: Low-jitter frequency translator with differential LVDS/HCSL outputs and flexible input reference options. Use Value: Supports both crystal-referenced and recovered-clock inputs, enabling seamless migration between free-running and synchronous switch architectures.	Use Scenario: Distributing frame-synchronized 27 MHz, 74.25 MHz, and 148.5 MHz clocks across SDI video encoders, decoders, and genlock modules in broadcast production equipment. IC Role / Device Role / Timing Role: Precision quad clock generator with programmable phase offset (<20 ps steps) and zero-ppm synthesis accuracy. Use Value: Enables sub-nanosecond inter-channel skew alignment critical for SMPTE ST 2082-1 12G-SDI genlock compliance.

PCIe Root Complex Timing

FPGA-Based Compute Platform

Use Scenario: Providing synchronized 100 MHz reference clocks to PCIe Gen 3/4 endpoints and root ports in server backplanes and AI accelerator cards.

IC Role / Device Role / Timing Role: Quad-output common clock generator with SRNS-compliant jitter performance and independent output enable/disable control.

Use Value: Enables single-chip replacement of four discrete oscillators while meeting <0.32 ps RMS jitter requirement for PCIe Gen 3 SRNS mode.

Use Scenario: Delivering multiple domain-specific clocks (e.g., 250 MHz fabric, 156.25 MHz transceiver, 100 MHz AXI, 50 MHz management) to Xilinx Versal or Intel Agilex FPGAs.

IC Role / Device Role / Timing Role: Programmable multi-frequency clock source with independent voltage and format per output bank.

Use Value: Eliminates external level shifters and reduces layout complexity by supplying 1.8 V, 2.5 V, and 3.3 V clocks directly from one IC.

Ethernet Switch Fabric

Broadcast Video Timing System

Use Scenario: Generating 156.25 MHz, 312.5 MHz, and 625 MHz clocks for 1G/10G/25G Ethernet PHYs and switch ASICs in telecom aggregation switches.

IC Role / Device Role / Timing Role: Low-jitter frequency translator with differential LVDS/HCSL outputs and flexible input reference options.

Use Value: Supports both crystal-referenced and recovered-clock inputs, enabling seamless migration between free-running and synchronous switch architectures.

Use Scenario: Distributing frame-synchronized 27 MHz, 74.25 MHz, and 148.5 MHz clocks across SDI video encoders, decoders, and genlock modules in broadcast production equipment.

IC Role / Device Role / Timing Role: Precision quad clock generator with programmable phase offset (<20 ps steps) and zero-ppm synthesis accuracy.

Use Value: Enables sub-nanosecond inter-channel skew alignment critical for SMPTE ST 2082-1 12G-SDI genlock compliance.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05719-GM	Higher integration: includes integrated crystal, smaller 3 × 3 mm 24-QFN, lower power (32 mA typ), but limited to 350 MHz max output frequency.	Preferred for compact, crystal-integrated designs where 350 MHz ceiling is acceptable (e.g., 10G Ethernet, not PCIe Gen 4).	Select when board space and crystal BOM reduction outweigh need for >350 MHz outputs.
ICS853S01AGI-01LFT	Fixed-frequency, non-programmable quad LVDS clock fanout buffer; no synthesis, no I²C, no spread spectrum; 0.4 ps RMS jitter.	Used only in static clock distribution where frequencies are known pre-design and no dynamic reconfiguration is needed.	Choose only for cost-sensitive, fixed-configuration systems lacking requirement for frequency agility or multi-format outputs.

Compared with Si5332A-D05719-GM and ICS853S01AGI-01LFT, SI5338M-B05719-GMR uniquely delivers field-programmable any-frequency synthesis up to 710 MHz with PCIe Gen 4 compliance, making it the sole option among the three for high-bandwidth serial link timing requiring post-silicon frequency tuning and mixed-signal voltage support.

Availability

SI5338M-B05719-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 server motherboards, FPGA-based AI accelerators, and telecom line cards requiring stable component supply, long-term lifecycle assurance, and traceable sourcing from authorized channels.

Supply support for SI5338M-B05719-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line was designed for high-performance, software-configurable clock generation in datacenter, networking, and broadcast video systems where multi-frequency agility, ultra-low jitter, and PCIe timing compliance are mandatory.

FAQ

What is the maximum output frequency supported by SI5338M-B05719-GMR?

The SI5338M-B05719-GMR supports up to 710 MHz on LVPECL/LVDS outputs, 350 MHz on SSTL/HSTL/CML, and 250 MHz on HCSL. Two unique frequencies above 350 MHz (e.g., Fvco/4 and Fvco/6) can be generated simultaneously. This capability is confirmed in Table 6 of the official Skyworks datasheet Rev. 1.6 and applies specifically to the SI5338M-B05719-GMR variant.

Does SI5338M-B05719-GMR support PCIe Gen 4 timing requirements?

Yes, SI5338M-B05719-GMR meets PCIe Gen 4 common clock jitter specifications with ≤0.45 ps RMS (10 kHz–50 MHz) under specified test conditions. This compliance is explicitly stated in Table 12 of the Skyworks datasheet Rev. 1.6 and validated using the Intel Clock Jitter Tool and Skyworks' PCIe Clock Jitter Tool.

Can SI5338M-B05719-GMR operate with a 25 MHz crystal reference?

Yes, SI5338M-B05719-GMR supports external crystals from 8 to 30 MHz, including 25 MHz. The device's on-chip crystal oscillator circuit is optimized for this range, with recommended load capacitance of 17–19 pF and maximum ESR of 300 Ω (Table 8). No external components are required beyond standard crystal layout guidelines.

How many independent output voltage domains does SI5338M-B05719-GMR provide?

SI5338M-B05719-GMR provides four independent output voltage domains (VDDO0–VDDO3), each configurable for 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This is documented in the "Features" section and Table 1 of the Skyworks datasheet Rev. 1.6, enabling direct interface with mixed-voltage SoCs and FPGAs without external level shifters.

Is ClockBuilder Pro software required to configure SI5338M-B05719-GMR?

No, ClockBuilder Pro is optional but strongly recommended for SI5338M-B05719-GMR configuration. The device supports full I²C/SMBus register access for custom firmware control; however, ClockBuilder Pro automates register calculation, jitter optimization, and PCIe compliance validation - significantly reducing bring-up time versus manual register programming.

SI5338M-B05719-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338M-B05719-GMR FAQ

1.How can I place an order for SI5338M-B05719-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338M-B05719-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338M-B05719-GMR reliable?

The price and inventory of SI5338M-B05719-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338M-B05719-GMR is usually 5 days.

3.What payment methods are accepted for SI5338M-B05719-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338M-B05719-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338M-B05719-GMR?

SI5338M-B05719-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338M-B05719-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338M-B05719-GMR?

For technical support, including SI5338M-B05719-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338M-B05719-GMR requirements.

6.How does Aetrix verify that SI5338M-B05719-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338M-B05719-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338M-B05719-GMR meets industry standards.

7.What is the process for return or replacement of SI5338M-B05719-GMR?

All SI5338M-B05719-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338M-B05719-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338M-B05719-GMR part is unused and in its original packaging.

Return procedure for SI5338M-B05719-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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