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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338M-B05842-GMR

Name: SI5338M-B05842-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338M-B05842-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338M-B05842-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338M-B05842-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

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Product details

Overview

SI5338M-B05842-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338M-B05842-GMR datasheet, SI5338M-B05842-GMR pinout, SI5338M-B05842-GMR application, or SI5338M-B05842-GMR equivalent, key selection criteria include PCIe jitter compliance, independent output voltage per driver (1.5/1.8/2.5/3.3 V), MultiSynth™ fractional synthesis resolution (1 ppb), spread-spectrum capability (0.5–5.0% down-spread), and I²C/SMBus programmability with ClockBuilder Pro support.

Technical Context

The SI5338M-B05842-GMR implements a two-stage PLL architecture: a high-stability reference stage (with external crystal or CMOS/SSTL/differential inputs from 5–710 MHz) feeds a MultiSynth™ fractional-N synthesis stage per output. Each of the four outputs supports independent frequency, format (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), voltage (1.5–3.3 V), phase offset (±45 ns), and spread-spectrum modulation (33–63 kHz, 0.5–5.0%).

It delivers true zero-ppm frequency accuracy on all outputs via integer or fractional synthesis, supports glitchless frequency increment/decrement in 1 ppm steps, and provides loss-of-lock and loss-of-signal alarms. The device operates from a single 1.8/2.5/3.3 V core supply with 45 mA typical current draw and integrates OTP NVM for factory or field programming.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps - meets PCIe Gen 3 SRNS and Gen 4 common clock jitter requirements at 100 MHz HCSL output
Output Count & Type	4 independent outputs - supports up to 4 differential (LVPECL/LVDS/HCSL/CML) or 8 single-ended (CMOS/SSTL/HSTL) clocks simultaneously
Frequency Range	0.16–710 MHz - covers PCIe (100 MHz), Ethernet (125/156.25 MHz), Fibre Channel (1.0625 GHz derived), and processor/FPGA clocking
Input Flexibility	8–30 MHz crystal, or 5–710 MHz external clock - enables use with low-cost crystals or high-frequency system references
Supply Voltages	VDD = 1.8/2.5/3.3 V; VDDOx = 1.5/1.8/2.5/3.3 V - allows mixed-voltage board designs without level shifters
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch - space-efficient footprint compatible with automated SMT assembly
Operating Temp	–40 to +85 °C - qualified for industrial and telecom line card environments

Pinout & Package

SI5338M-B05842-GMR uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5338 family: IN1/IN2 (diff input 1), IN3/IN4 (SE input), IN5/IN6 (diff input 2), CLK0A/CLK0B through CLK3A/CLK3B (four differential output pairs), VDDO0–VDDO3 (independent output supply pins), VDD (core supply), SCL/SDA (I²C interface), INTR (interrupt output), and GND/RSVD_GND.

Pin/Terminal	Circuit Role	Design Meaning
CLK0A / CLK0B	Differential Output Pair 0	Configurable as LVPECL/LVDS/HCSL/CML; supports 0.16–710 MHz with independent VDDO0 voltage
CLK1A / CLK1B	Differential Output Pair 1	Independent frequency/format/voltage control; same capabilities as CLK0A/B
CLK2A / CLK2B	Differential Output Pair 2	Supports PCIe Gen 4-compliant jitter when configured as 100 MHz HCSL
CLK3A / CLK3B	Differential Output Pair 3	Capable of 155.52 MHz (OC-12) or 125 MHz (GbE) with sub-1 ps RMS jitter
SCL / SDA	I²C Serial Interface	Standard SMBus-compatible 2-wire bus for configuration and status readback
INTR	Interrupt Output	Open-drain signal asserting on loss-of-lock or loss-of-signal events
VDDO0–VDDO3	Output Buffer Supplies	Each powers one output pair; enables mixed-signal voltage domains (e.g., 1.8 V FPGA + 3.3 V PHY)
VDD	Core Supply	Single 1.8/2.5/3.3 V supply for internal logic, PLL, and MultiSynth™ engines
IN1/IN2, IN5/IN6	Differential Reference Inputs	Accept 5–710 MHz AC-coupled signals; require external 100 Ω termination
IN3/IN4	Single-Ended Reference Input	Accept 5–200 MHz CMOS-level clocks; support DC-coupled connection

Key Features

Feature	Design Value
MultiSynth™ Fractional Synthesis	Enables any-frequency generation (0.16–710 MHz) on each output with 1 ppb resolution and zero ppm error
PCIe Gen 1–4 Compliance	Meets Common Clock (Gen 1/2/3/4) and Gen 3 SRNS jitter specs - validated at 100 MHz HCSL output
Independent Output Voltage Control	Four VDDO pins allow simultaneous 1.5 V, 1.8 V, 2.5 V, and 3.3 V outputs - eliminates external level translators
Glitchless Frequency Adjustment	1 ppm step size with hardware pin control (FINC/FDEC) or I²C - no output interruption during dynamic reconfiguration
Programmable Spread Spectrum	Configurable down-spread (0.5–5.0%) and modulation rate (33–63 kHz) per output - reduces EMI in dense PCB layouts
Loss-of-Signal & Loss-of-Lock Detection	Dedicated INTR pin asserts within 5 µs (LOS) or 10 ms (LOL) - enables real-time system fault monitoring

Applications

PCIe Gen 4 Switch Timing	Ethernet 10GbE Line Card
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switches and endpoints in a server backplane. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter 100 MHz HCSL clocks meeting PCIe Gen 4 common clock jitter spec (≤0.45 ps RMS). Use Value: Eliminates need for four discrete oscillators; ensures deterministic inter-lane skew (<100 ps) and robust link training across hot-pluggable slots.	Use Scenario: Generating 156.25 MHz and 312.5 MHz clocks for 10GbE PHYs and MACs on a telecom line card with mixed-voltage interfaces. IC Role / Device Role / Timing Role: Configurable buffer and level translator synthesizing precise frequencies from a single 25 MHz crystal reference. Use Value: Reduces BOM count by replacing separate clock ICs; supports 1.8 V MAC and 3.3 V PHY domains via independent VDDO supplies.
Broadcast Video Sync Generator	FPGA-Based Test Equipment
Use Scenario: Delivering genlock-capable 27 MHz, 74.25 MHz, and 148.5 MHz clocks to SDI transmitters, receivers, and frame synchronizers in broadcast infrastructure. IC Role / Device Role / Timing Role: Any-frequency clock generator with programmable phase offset (±45 ns, <20 ps step) enabling precise video timing alignment. Use Value: Enables frame-accurate synchronization across multi-channel video paths without external delay lines or custom PLLs.	Use Scenario: Providing multiple high-precision clocks (e.g., 100 MHz system, 200 MHz ADC sampling, 125 MHz Ethernet MAC) to a Xilinx Kintex Ultrascale+ FPGA in automated test equipment. IC Role / Device Role / Timing Role: Reconfigurable clock source supporting dynamic frequency switching via I²C during test sequence changes. Use Value: Allows single hardware platform to emulate diverse DUT clock requirements; avoids FPGA PLL resource consumption and jitter degradation.

PCIe Gen 4 Switch Timing

Ethernet 10GbE Line Card

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switches and endpoints in a server backplane.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter 100 MHz HCSL clocks meeting PCIe Gen 4 common clock jitter spec (≤0.45 ps RMS).

Use Value: Eliminates need for four discrete oscillators; ensures deterministic inter-lane skew (<100 ps) and robust link training across hot-pluggable slots.

Use Scenario: Generating 156.25 MHz and 312.5 MHz clocks for 10GbE PHYs and MACs on a telecom line card with mixed-voltage interfaces.

IC Role / Device Role / Timing Role: Configurable buffer and level translator synthesizing precise frequencies from a single 25 MHz crystal reference.

Use Value: Reduces BOM count by replacing separate clock ICs; supports 1.8 V MAC and 3.3 V PHY domains via independent VDDO supplies.

Broadcast Video Sync Generator

FPGA-Based Test Equipment

Use Scenario: Delivering genlock-capable 27 MHz, 74.25 MHz, and 148.5 MHz clocks to SDI transmitters, receivers, and frame synchronizers in broadcast infrastructure.

IC Role / Device Role / Timing Role: Any-frequency clock generator with programmable phase offset (±45 ns, <20 ps step) enabling precise video timing alignment.

Use Value: Enables frame-accurate synchronization across multi-channel video paths without external delay lines or custom PLLs.

Use Scenario: Providing multiple high-precision clocks (e.g., 100 MHz system, 200 MHz ADC sampling, 125 MHz Ethernet MAC) to a Xilinx Kintex Ultrascale+ FPGA in automated test equipment.

IC Role / Device Role / Timing Role: Reconfigurable clock source supporting dynamic frequency switching via I²C during test sequence changes.

Use Value: Allows single hardware platform to emulate diverse DUT clock requirements; avoids FPGA PLL resource consumption and jitter degradation.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05842-GM	Higher integration: includes integrated LDOs, enhanced jitter performance (0.35 ps RMS), and higher max output frequency (1.4 GHz)	Targets next-gen PCIe Gen 5 and CXL 3.0 systems requiring tighter jitter and higher frequencies	Select when upgrading beyond PCIe Gen 4 or requiring ultra-low jitter in high-density compute platforms
ICS853S02AG-01LF	Fixed-frequency, non-programmable quad LVDS clock fanout buffer; no synthesis capability or I²C interface	Limited to static clock distribution; cannot replace crystal oscillators or translate frequencies	Choose only for simple clock replication where frequency flexibility and programmability are unnecessary

Compared with Si5332A-D05842-GM, SI5338M-B05842-GMR offers broader input flexibility (crystal + multiple reference types) and lower cost for PCIe Gen 4–compliant designs, while ICS853S02AG-01LF serves only static fanout roles without synthesis or configuration capability.

Availability

SI5338M-B05842-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, 10GbE line cards, broadcast video sync generators, and FPGA-based test equipment requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338M-B05842-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line delivers highly configurable, low-jitter clock generation for high-speed serial interfaces including PCIe, Ethernet, Fibre Channel, and broadcast video - designed to replace multiple discrete oscillators with a single programmable IC.

FAQ

What is the primary function of the SI5338M-B05842-GMR in a PCIe Gen 4 system?

The SI5338M-B05842-GMR serves as a quad-output clock generator that delivers four independent, low-jitter 100 MHz HCSL reference clocks compliant with PCIe Gen 4 Common Clock specifications (≤0.45 ps RMS jitter). It replaces multiple discrete oscillators, supports dynamic frequency adjustment, and maintains tight inter-output skew (<100 ps) critical for reliable link training and data integrity across high-speed lanes.

Does the SI5338M-B05842-GMR support crystal input, and what frequency range is validated?

Yes, the SI5338M-B05842-GMR supports external crystal input across 8–30 MHz, with full validation and register tuning guidance provided for 8–11 MHz, 11–19 MHz, 19–26 MHz, and 26–30 MHz ranges. The on-chip oscillator circuit includes programmable load capacitance (11–13 pF supported, 17–19 pF recommended) and drive-level limiting to ensure reliable crystal startup and aging stability.

How many independent output supply voltages does the SI5338M-B05842-GMR support, and why is this important?

The SI5338M-B05842-GMR supports four independent output supply pins (VDDO0–VDDO3), each configurable for 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This enables direct interfacing with mixed-voltage components - such as 1.8 V FPGAs and 3.3 V PHYs - without external level shifters, reducing board area, power loss, and signal integrity risk from voltage translation circuits.

Can the SI5338M-B05842-GMR generate spread-spectrum clocking, and what parameters are user-configurable?

Yes, the SI5338M-B05842-GMR supports per-output spread-spectrum clocking (SSC) with fully programmable parameters: spread percentage (0.5–5.0% down-spread), modulation rate (33–63 kHz), and center frequency. SSC is implemented digitally in the MultiSynth™ engine and requires no external components - simplifying EMI reduction in compact, high-density PCB layouts.

What development tools are officially supported for configuring the SI5338M-B05842-GMR?

Skyworks officially supports ClockBuilder Pro software for GUI-based configuration, register mapping, and .c/.h file generation for the SI5338M-B05842-GMR. Additionally, the Skyworks PCIe Clock Jitter Tool (free download) validates jitter compliance against Intel's PCIe specification. Hardware evaluation is enabled via the Si5338-EVB platform, which includes I²C interface, reference inputs, and SMA output connectors.

SI5338M-B05842-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338M-B05842-GMR FAQ

1.How can I place an order for SI5338M-B05842-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338M-B05842-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338M-B05842-GMR reliable?

The price and inventory of SI5338M-B05842-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338M-B05842-GMR is usually 5 days.

3.What payment methods are accepted for SI5338M-B05842-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338M-B05842-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338M-B05842-GMR?

SI5338M-B05842-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338M-B05842-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338M-B05842-GMR?

For technical support, including SI5338M-B05842-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338M-B05842-GMR requirements.

6.How does Aetrix verify that SI5338M-B05842-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338M-B05842-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338M-B05842-GMR meets industry standards.

7.What is the process for return or replacement of SI5338M-B05842-GMR?

All SI5338M-B05842-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338M-B05842-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338M-B05842-GMR part is unused and in its original packaging.

Return procedure for SI5338M-B05842-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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