Skyworks Solutions Inc. SI5338M-B05848-GM
- Part No.:
- SI5338M-B05848-GM
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Application Specific Clock/Timing
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
SI5338M-B05848-GM.pdf
- Description:
- I2C CONTROL, 4-OUTPUT, ANY FREQU
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI5338M-B05848-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis, delivering four independent low-jitter clocks (0.7 ps RMS typ) across LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats, supporting PCIe Gen 1–4 and Ethernet timing in telecom line cards and FPGA systems.
For engineers reviewing the SI5338M-B05848-GM datasheet, SI5338M-B05848-GM pinout, SI5338M-B05848-GM application, or SI5338M-B05848-GM equivalent, key selection factors include its 4× differential output capability, 0 ppm synthesis accuracy, 24-pin 4×4 mm QFN package, and PCIe Gen 3 SRNS compliance - all critical for high-speed serial interface clocking.
Technical Context
The SI5338M-B05848-GM integrates a dual-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers, each with programmable R/M/N dividers and phase/frequency increment/decrement control. It supports external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), and differential (5–710 MHz) inputs.
Each of its four output drivers is independently configurable for voltage (1.5/1.8/2.5/3.3 V), format, spread-spectrum modulation (0.5–5.0% at 33–63 kHz), and phase offset (<20 ps resolution). Loss-of-lock and loss-of-signal alarms provide real-time monitoring in mission-critical timing applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Phase Jitter (RMS) | 0.7 ps typical over 12 kHz–20 MHz - meets PCIe Gen 3 SRNS and 10GbE jitter requirements |
| Output Count & Type | 4 differential outputs (CLK0A/B to CLK3A/B) - supports simultaneous multi-protocol clocking without external buffers |
| Frequency Range | 0.16–710 MHz per output - covers PCIe (100 MHz), Ethernet (125/156.25 MHz), and Fibre Channel (212.5/148.5 MHz) |
| Supply Voltages | VDD = 1.8/2.5/3.3 V; VDDOx = 1.4–3.63 V - enables mixed-voltage system integration with independent output rail control |
| Package | 24-pin QFN, 4 × 4 mm, 0.5 mm pitch - space-efficient for dense PCB layouts in switch/router and MSAN platforms |
| Operating Temp | –40 °C to +85 °C - qualified for industrial and telecom infrastructure environments |
| I²C Interface | SMBus-compatible, 100/400 kHz - enables in-system reconfiguration without hardware changes |
Pinout & Package
SI5338M-B05848-GM uses a 24-lead, 4 × 4 mm QFN package with exposed thermal pad. Pin assignments are fixed per the Si5338 family: six input pins (IN1–IN6), eight output pins (CLK0A/B through CLK3A/B), four VDDOx supply pins, three power/ground pins (VDD, GND, RSVD_GND), and four control pins (SCL, SDA, INTR, OEB).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CLK0A / CLK0B | Differential Output Pair 0 | LVPECL/LVDS/HCSL-configurable clock output; supports up to 710 MHz with <100 ps skew vs other outputs |
| CLK1A / CLK1B | Differential Output Pair 1 | Independent frequency/format/voltage control; enables asynchronous multi-domain clocking |
| CLK2A / CLK2B | Differential Output Pair 2 | Supports PCIe Gen 4 common clock (100 MHz) with 0.15–0.45 ps RMS jitter per spec |
| CLK3A / CLK3B | Differential Output Pair 3 | Configurable for broadcast video timing (27/74.25/148.5 MHz) with programmable phase offset |
| IN1 / IN2, IN5 / IN6 | Differential Reference Inputs | Accept 5–710 MHz differential clocks; internal 100 Ω termination enables direct connection to SERDES sources |
| IN3 / IN4 | Single-Ended Reference Inputs | Support CMOS/SSTL/HSTL inputs (5–350 MHz); 0.7×VDD/0.3×VDD thresholds ensure noise immunity |
| VDDO0–VDDO3 | Output Driver Supplies | Independent 1.5/1.8/2.5/3.3 V rails per output pair - eliminates level-shifting components |
| SCL / SDA | I²C Serial Interface | Two-wire bus for full register configuration, including MultiSynth M/N/R values and SSC parameters |
| INTR | Interrupt Output | Open-drain alarm signal indicating loss-of-lock or loss-of-signal - connects directly to FPGA GPIO |
| OEB | Output Enable Control | Active-low global enable; allows synchronized clock gating during power-state transitions |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth™ Synthesis | Four independent fractional-N synthesizers enabling true zero-ppm frequency accuracy on all outputs |
| PCIe Gen 3 SRNS Compliance | 0.11–0.32 ps RMS jitter in Separate Reference No Spread mode - satisfies Intel's stringent serial link timing margin |
| Programmable Phase Offset | ±45 ns range with <20 ps step resolution - enables precise inter-output skew alignment for DDR or SerDes sampling |
| Glitchless Frequency Tuning | 1 ppm incremental/decremental adjustment via pin or I²C - maintains continuous clock output during dynamic rate changes |
| Flexible Input Support | Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) - reduces need for external clock conditioning |
| Spread Spectrum Clocking | Configurable 0.5–5.0% down-spread at 33–63 kHz on any output - lowers EMI peak emissions in FCC/CE-constrained designs |
Applications
| PCIe Gen 1–4 Clocking | Ethernet Switch Timing |
|---|---|
Use Scenario: Providing synchronous 100 MHz reference clocks to multiple PCIe endpoints and root complexes in server backplanes. IC Role / Device Role / Timing Role: Quad-output clock generator operating in Common Clock mode with Gen 3 SRNS compliance. Use Value: Eliminates four discrete oscillators while maintaining sub-0.32 ps RMS jitter required for PCIe Gen 4 link training stability. | Use Scenario: Generating 125 MHz (1 GbE), 156.25 MHz (10 GbE), and 312.5 MHz (25 GbE) clocks for multi-rate Ethernet PHYs in layer-3 switches. IC Role / Device Role / Timing Role: Any-frequency synthesizer with independent output voltage control (1.8 V/2.5 V/3.3 V) per PHY interface. Use Value: Reduces BOM count and layout area versus discrete clock ICs; supports hot-plug PHY rate negotiation via I²C reprogramming. |
| Broadcast Video/Audio Sync | FPGA & Processor Clocking |
Use Scenario: Delivering SMPTE ST 2082 (27 MHz), ST 292 (27 MHz), and ST 424 (74.25/148.5 MHz) reference clocks to video encoders/decoders in IP-based production gear. IC Role / Device Role / Timing Role: Low-jitter (0.7 ps RMS) clock source with programmable phase offset for genlock alignment across multiple video paths. Use Value: Enables frame-accurate synchronization between SDI, HDMI, and NDI streams without external delay lines. | Use Scenario: Supplying core, memory (DDR4), and peripheral clocks to Xilinx Versal and Intel Agilex FPGAs in AI inference accelerators. IC Role / Device Role / Timing Role: Configurable buffer and level translator with independent VDDO supplies for mixed-voltage FPGA domains. Use Value: Replaces three separate clock buffers and eliminates level-shifters, reducing power and board space in high-density compute modules. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-output clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5338A-B05848-GM | Same pinout and electrical specs; differs only in factory-programmed NVM configuration - B05848-GM variant preloaded with specific frequency plan | Identical use cases; no functional difference in operation or performance | Select SI5338M-B05848-GM for field-programmable flexibility; choose Si5338A-B05848-GM if preconfigured timing profile suffices |
| LMK04832RHAR | Two PLLs + 14 outputs; higher power (120 mA); larger 64-pin WQFN; supports JESD204B deterministic latency | Better suited for RF/data converter timing; over-specified for PCIe/Ethernet-only applications | Choose LMK04832RHAR only when deterministic delay, ultra-low additive jitter (<0.1 ps), or >4 outputs are required |
Compared with Si5338A-B05848-GM, the SI5338M-B05848-GM offers identical hardware but enables full I²C reprogramming in-system; versus LMK04832RHAR, it delivers optimal cost, size, and power for mid-range communications timing without over-engineering.
Availability
SI5338M-B05848-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 server motherboards, 10/25 GbE switch fabric designs, and broadcast video processing equipment requiring stable component supply and long-term lifecycle support.
Supply support for SI5338M-B05848-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.
The Si5338 product line was designed specifically for high-performance, multi-protocol clock generation in data center, telecom, and broadcast infrastructure - emphasizing low jitter, flexible I²C configurability, and compact QFN packaging.
FAQ
What is the primary function of the SI5338M-B05848-GM in a system design?
The SI5338M-B05848-GM serves as a quad-output, I²C-programmable clock generator that synthesizes four independent, low-jitter frequencies (0.16–710 MHz) from a single reference input. Its MultiSynth™ architecture enables zero-ppm accuracy and supports PCIe Gen 1–4, Ethernet, and broadcast video timing standards - replacing up to four discrete oscillators while maintaining tight jitter budgets. The SI5338M-B05848-GM is commonly used in switch/router line cards and FPGA-based acceleration platforms.
Does the SI5338M-B05848-GM support PCIe Gen 4 Common Clock compliance?
Yes, the SI5338M-B05848-GM meets PCIe Gen 4 Common Clock jitter requirements with 0.15–0.45 ps RMS jitter (10 kHz–50 MHz) when configured per Skyworks' recommended PLL bandwidth (2–4 MHz) and CDR settings. This is validated using the Skyworks PCIe Clock Jitter Tool and aligns with PCI-SIG Base Specification 4.0 rev. 0.5. The SI5338M-B05848-GM achieves this while delivering four independent outputs - a key differentiator versus single-output Gen 4 clock ICs.
Can the SI5338M-B05848-GM generate different output voltages simultaneously?
Yes, the SI5338M-B05848-GM supports independent output supply rails (VDDO0–VDDO3) set to 1.5 V, 1.8 V, 2.5 V, or 3.3 V per output pair. This allows simultaneous LVDS (2.5 V), HCSL (1.8 V), and CMOS (3.3 V) outputs without external level shifters - essential for interfacing with mixed-voltage FPGAs, ASICs, and PHYs. Each VDDO pin powers its corresponding CLKxA/CLKxB pair, and voltage selection is configured via I²C registers.
How is the SI5338M-B05848-GM programmed and configured?
The SI5338M-B05848-GM is programmed via its I²C/SMBus-compatible serial interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software. This GUI tool generates custom configuration files (.cbs) that define MultiSynth M/N/R dividers, output formats, voltage levels, spread-spectrum parameters, and phase offsets. Configuration can be loaded into volatile RAM at boot or written to one-time-programmable (OTP) NVM for autonomous startup - the SI5338M-B05848-GM retains full I²C reprogrammability even after OTP programming.
What package type and thermal characteristics does the SI5338M-B05848-GM have?
The SI5338M-B05848-GM uses a 24-pin QFN package measuring 4 mm × 4 mm with 0.5 mm pitch and an exposed thermal pad. Its thermal resistance is θJA = 37 °C/W (still air) and θJC = 10 °C/W, enabling reliable operation at full load (45 mA core current) across –40 °C to +85 °C ambient. The small footprint and low thermal impedance make it suitable for thermally constrained telecom line cards and high-density switch PCBs where the SI5338M-B05848-GM is often placed near SERDES or FPGA clock inputs.
SI5338M-B05848-GM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- MultiSynth™
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- PLL:
- -
- Main Purpose:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
SI5338M-B05848-GM FAQ
1.How can I place an order for SI5338M-B05848-GM through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5338M-B05848-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5338M-B05848-GM reliable?
The price and inventory of SI5338M-B05848-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338M-B05848-GM is usually 5 days.
3.What payment methods are accepted for SI5338M-B05848-GM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338M-B05848-GM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5338M-B05848-GM?
SI5338M-B05848-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5338M-B05848-GM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5338M-B05848-GM?
For technical support, including SI5338M-B05848-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338M-B05848-GM requirements.
6.How does Aetrix verify that SI5338M-B05848-GM is sourced from the original manufacturer or authorized distributors?
All SI5338M-B05848-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338M-B05848-GM meets industry standards.
7.What is the process for return or replacement of SI5338M-B05848-GM?
All SI5338M-B05848-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338M-B05848-GM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5338M-B05848-GM part is unused and in its original packaging.
Return procedure for SI5338M-B05848-GM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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