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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B01504-GMR

Name: SI5338N-B01504-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B01504-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B01504-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B01504-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338N-B01504-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C in a 4 × 4 mm 24-QFN package.

For engineers reviewing the SI5338N-B01504-GMR datasheet, SI5338N-B01504-GMR pinout, SI5338N-B01504-GMR application, or SI5338N-B01504-GMR equivalent, key selection criteria include output format flexibility (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), independent per-output voltage (1.5/1.8/2.5/3.3 V), any-frequency synthesis capability (0.16–710 MHz), spread-spectrum control, and I²C/SMBus programmability with ClockBuilder Pro support.

Technical Context

The SI5338N-B01504-GMR implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers, each driving a configurable output buffer. It supports external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) inputs.

Each output driver provides independent frequency, format, voltage, phase offset (±45 ns, <20 ps step), and spread-spectrum control (0.5–5.0% deviation, 33–63 kHz modulation). Loss-of-lock and loss-of-signal alarms, plus glitchless frequency increment/decrement (1 ppm steps), enable robust system timing management.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps - meets PCIe Gen 3 SRNS and GbE jitter requirements at 125 MHz output
Output Frequency Range	0.16–710 MHz - supports LVPECL/LVDS up to 710 MHz, HCSL up to 250 MHz, CMOS up to 200 MHz
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) - enables flexible clock source integration
Output Voltage per Driver	1.5 / 1.8 / 2.5 / 3.3 V - allows mixed-voltage system interfacing without level shifters
Supply Voltage	Core: 1.8 / 2.5 / 3.3 V ±10%; Output buffers: 1.4–3.63 V - supports low-power and legacy logic domains
Operating Temperature	–40 to +85 °C - qualified for industrial and telecom infrastructure environments
Package	24-pin QFN, 4 × 4 mm - space-efficient footprint compatible with high-density PCB layouts

Pinout & Package

SI5338N-B01504-GMR is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad. Pin assignments follow the standard Si5338 top-view layout: IN1/IN2 (differential ref 1), IN3/IN4 (single-ended ref), IN5/IN6 (differential ref 2), CLK0A/CLK0B through CLK3A/CLK3B (four differential output pairs), VDDO0–VDDO3 (independent output supply pins), VDD (core supply), SCL/SDA (I²C interface), INTR (interrupt output), and GND/RSVD_GND.

Pin/Terminal	Circuit Role	Design Meaning
CLK0A / CLK0B	Differential Output Pair 0	Configurable as LVPECL/LVDS/HCSL/CML/SSTL/HSTL; supports 0.16–710 MHz with independent voltage and phase control
CLK1A / CLK1B	Differential Output Pair 1	Independent frequency synthesis and format selection; identical capabilities to CLK0A/B
CLK2A / CLK2B	Differential Output Pair 2	Supports same signal formats and frequency ranges; enables multi-domain clocking (e.g., PCIe + Ethernet + FPGA)
CLK3A / CLK3B	Differential Output Pair 3	Full programmability including spread spectrum, phase offset, and output enable via OEB pin
VDDO0–VDDO3	Output Buffer Supply Pins	Each powers one output pair; allows mixed-voltage operation (e.g., 1.8 V for FPGA, 3.3 V for legacy PHY)
SCL / SDA	I²C Serial Interface	Standard SMBus-compatible 2-wire bus for configuration, status readback, and dynamic reprogramming
INTR	Interrupt Output	Open-drain active-low signal indicating loss-of-lock or loss-of-signal events
IN1/IN2, IN5/IN6	Differential Reference Inputs	Accept 5–710 MHz AC-coupled signals; require external 100 Ω termination
IN3 / IN4	Single-Ended Reference Inputs	Support CMOS/SSTL/HSTL levels; 5–350 MHz range with internal biasing

Key Features

Feature	Design Value
MultiSynth™ Any-Frequency Synthesis	Four independent fractional-N synthesizers deliver true zero-ppm accuracy on all outputs without external crystals
PCIe Gen 1–4 & SRNS Compliance	Validated jitter performance (0.11–0.45 ps RMS) meets PCIe Gen 3 Separate Reference No Spread and Gen 4 Common Clock specifications
Per-Output Voltage & Format Control	Each of four outputs supports independent selection among LVPECL, LVDS, HCSL, CMOS, SSTL, or HSTL with dedicated VDDO supply
Glitchless Frequency Adjustment	1 ppm incremental/decremental tuning via PINC/FDEC pins or I²C, enabling real-time clock rate adaptation without output interruption
Programmable Phase Offset	±45 ns adjustment in <20 ps steps per output - critical for skew-sensitive interfaces like DDR memory or SerDes alignment
Spread Spectrum Clocking (SSC)	Configurable on any output: 0.5–5.0% down-spread, 33–63 kHz modulation rate - reduces EMI in dense PCB layouts

Applications

Ethernet Switch/Routing	PCIe Gen 1–4 Timing
Use Scenario: High-port-count 1/10 GbE switches requiring synchronized clocks across multiple PHYs and packet processors. IC Role / Device Role / Timing Role: Quad clock generator providing independent 125 MHz (GbE), 156.25 MHz (10GbE), 100 MHz (PCIe), and 25 MHz (management controller) outputs. Use Value: Eliminates four discrete oscillators; reduces board area by >60% and enables deterministic inter-PHY skew control via per-output phase tuning.	Use Scenario: Server motherboard with CPU, GPU, and NVMe SSDs sharing PCIe Gen 4 root complex and endpoint clocks. IC Role / Device Role / Timing Role: Common-clock source delivering 100 MHz PCIe reference to all slots and devices with Gen 4-compliant jitter (<0.45 ps RMS). Use Value: Meets Intel's PCIe Gen 4 CEM specification without external jitter cleaners; supports simultaneous SRNS mode for endpoints requiring separate references.
Broadcast Video/Audio Timing	FPGA & Processor Clocking
Use Scenario: SMPTE ST 2082/2110 IP video routers needing precise 74.25 MHz, 148.5 MHz, and 297 MHz pixel clocks with sub-ns skew. IC Role / Device Role / Timing Role: Multi-format clock synthesizer generating SMPTE-compliant frequencies on LVDS and HCSL outputs with programmable phase alignment. Use Value: Replaces multiple fixed-frequency oscillators and fanout buffers; achieves <100 ps output-to-output skew across all four outputs.	Use Scenario: Heterogeneous compute platform with ARM SoC (1.8 V), Xilinx FPGA (2.5 V), DDR4 memory controller (1.2 V), and PCIe switch (3.3 V). IC Role / Device Role / Timing Role: Centralized clock source delivering domain-specific frequencies and voltages: 500 MHz (FPGA fabric), 200 MHz (DDR4), 100 MHz (PCIe), and 33.33 MHz (SoC peripheral bus). Use Value: Enables full voltage-level independence per output; avoids external level translators and simplifies power domain partitioning.

Ethernet Switch/Routing

PCIe Gen 1–4 Timing

Use Scenario: High-port-count 1/10 GbE switches requiring synchronized clocks across multiple PHYs and packet processors.

IC Role / Device Role / Timing Role: Quad clock generator providing independent 125 MHz (GbE), 156.25 MHz (10GbE), 100 MHz (PCIe), and 25 MHz (management controller) outputs.

Use Value: Eliminates four discrete oscillators; reduces board area by >60% and enables deterministic inter-PHY skew control via per-output phase tuning.

Use Scenario: Server motherboard with CPU, GPU, and NVMe SSDs sharing PCIe Gen 4 root complex and endpoint clocks.

IC Role / Device Role / Timing Role: Common-clock source delivering 100 MHz PCIe reference to all slots and devices with Gen 4-compliant jitter (<0.45 ps RMS).

Use Value: Meets Intel's PCIe Gen 4 CEM specification without external jitter cleaners; supports simultaneous SRNS mode for endpoints requiring separate references.

Broadcast Video/Audio Timing

FPGA & Processor Clocking

Use Scenario: SMPTE ST 2082/2110 IP video routers needing precise 74.25 MHz, 148.5 MHz, and 297 MHz pixel clocks with sub-ns skew.

IC Role / Device Role / Timing Role: Multi-format clock synthesizer generating SMPTE-compliant frequencies on LVDS and HCSL outputs with programmable phase alignment.

Use Value: Replaces multiple fixed-frequency oscillators and fanout buffers; achieves <100 ps output-to-output skew across all four outputs.

Use Scenario: Heterogeneous compute platform with ARM SoC (1.8 V), Xilinx FPGA (2.5 V), DDR4 memory controller (1.2 V), and PCIe switch (3.3 V).

IC Role / Device Role / Timing Role: Centralized clock source delivering domain-specific frequencies and voltages: 500 MHz (FPGA fabric), 200 MHz (DDR4), 100 MHz (PCIe), and 33.33 MHz (SoC peripheral bus).

Use Value: Enables full voltage-level independence per output; avoids external level translators and simplifies power domain partitioning.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06504-GM	Higher integration: includes integrated crystal, lower jitter (0.35 ps RMS), supports up to 10 outputs, but larger 5 × 5 mm 32-QFN package	Targeted at systems requiring ultra-low jitter and crystal-free design; not drop-in compatible due to pin count and package size	Select when crystal integration and sub-0.4 ps jitter are mandatory; avoid if board space or legacy Si5338 footprint is constrained.
ICS853S01AGI-01LFT	Fixed-function 4-output LVDS clock generator; no I²C programming, no frequency synthesis, max 700 MHz output, 1.2 ps RMS jitter	Used in cost-sensitive, static-clock applications where reconfiguration is unnecessary	Choose only for simple fanout or fixed-ratio translation; unsuitable for any-frequency synthesis or dynamic tuning needs of SI5338N-B01504-GMR.

Compared with Si5332A-D06504-GM and ICS853S01AGI-01LFT, the SI5338N-B01504-GMR uniquely balances programmability, jitter performance, and footprint-offering field-reconfigurable synthesis in the smallest QFN package among Skyworks' quad clock generators while maintaining PCIe Gen 4 compliance.

Availability

SI5338N-B01504-GMR is available at Aetrix Electronics and suitable for Ethernet switching, PCIe Gen 4 server platforms, broadcast video routing, and FPGA-based embedded systems requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338N-B01504-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The SI5338 product line delivers highly configurable, low-jitter clock generation for high-speed serial interfaces-including PCIe, Ethernet, and broadcast video-designed to replace multiple discrete oscillators while enabling system-level timing optimization.

FAQ

What is the primary function of the SI5338N-B01504-GMR?

The SI5338N-B01504-GMR is an I²C-programmable quad clock generator that synthesizes four independent, any-frequency output clocks (0.16–710 MHz) with 0.7 ps RMS typical phase jitter. It replaces up to four discrete oscillators and supports PCIe Gen 1–4, Ethernet, broadcast video, and FPGA clocking applications. Its MultiSynth™ architecture ensures zero-ppm frequency accuracy on all outputs.

Does the SI5338N-B01504-GMR support PCIe Gen 4 timing requirements?

Yes, the SI5338N-B01504-GMR meets PCIe Gen 4 Common Clock jitter specifications with ≤0.45 ps RMS (12 kHz–20 MHz) when configured per Skyworks' validated settings. It also complies with PCIe Gen 3 SRNS requirements (≤0.32 ps RMS) and supports both common-clock and separate-reference modes, making it suitable for root complexes and endpoints in Gen 4 systems.

Can the SI5338N-B01504-GMR generate different output formats simultaneously?

Yes, the SI5338N-B01504-GMR supports simultaneous mixed-format outputs: for example, LVDS on CLK0A/B, HCSL on CLK1A/B, CMOS on CLK2A/B, and SSTL on CLK3A/B-all with independent voltage supplies (VDDO0–VDDO3) and frequency configurations. This eliminates external level translators and simplifies multi-protocol board designs.

How is the SI5338N-B01504-GMR programmed and configured?

The SI5338N-B01504-GMR is programmed via its I²C/SMBus-compatible interface using Skyworks' ClockBuilder Pro software, which auto-generates register maps and configuration files. Configuration can be stored in on-chip OTP memory for power-on initialization, or dynamically updated in-system. Pin-controlled frequency/phase adjustments (PINC/FDEC) are also supported for real-time tuning.

What package and thermal characteristics does the SI5338N-B01504-GMR have?

The SI5338N-B01504-GMR uses a 24-pin, 4 × 4 mm QFN package with exposed thermal pad. Its thermal resistance is θJA = 37 °C/W (still air) and θJC = 10 °C/W, enabling reliable operation at full load across –40 to +85 °C. Core supply current is 45 mA typical at 100 MHz on all outputs with 25 MHz reference input.

SI5338N-B01504-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B01504-GMR FAQ

1.How can I place an order for SI5338N-B01504-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B01504-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B01504-GMR reliable?

The price and inventory of SI5338N-B01504-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B01504-GMR is usually 5 days.

3.What payment methods are accepted for SI5338N-B01504-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B01504-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B01504-GMR?

SI5338N-B01504-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B01504-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B01504-GMR?

For technical support, including SI5338N-B01504-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B01504-GMR requirements.

6.How does Aetrix verify that SI5338N-B01504-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338N-B01504-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B01504-GMR meets industry standards.

7.What is the process for return or replacement of SI5338N-B01504-GMR?

All SI5338N-B01504-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B01504-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B01504-GMR part is unused and in its original packaging.

Return procedure for SI5338N-B01504-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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