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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B04336-GM

Name: SI5338N-B04336-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B04336-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B04336-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B04336-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338N-B04336-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis, delivering four independent differential or single-ended clocks (0.16–710 MHz), 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces multiple crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338N-B04336-GM datasheet, SI5338N-B04336-GM pinout, SI5338N-B04336-GM application, or SI5338N-B04336-GM equivalent, this page provides verified technical context, real-world design meaning for key specs, validated pin functions, confirmed alternative options, and supply-ready availability details - all grounded in Skyworks' Rev. 1.6 datasheet and official product documentation.

Technical Context

The SI5338N-B04336-GM implements a two-stage PLL architecture: a high-stability reference stage (input range 5–710 MHz) followed by four independent MultiSynth™ fractional-N synthesizers per output driver. Each output supports integer or fractional mode synthesis with <1 ppb resolution and true zero-ppm accuracy across all frequencies.

It features configurable output drivers supporting LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats, independent VDDO per channel (1.5–3.3 V), programmable phase offset (±45 ns), glitchless frequency increment/decrement in 1 ppm steps, and spread-spectrum control (0.5–5.0% spread, 33–63 kHz modulation rate).

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); enables PCIe Gen 4 and 10 GbE clocking without violating jitter budgets
Output Frequency Range	0.16–710 MHz per channel; covers Ethernet, PCIe, Fibre Channel, and processor/FPGA clocking needs
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz); enables flexible system-level clock sourcing
Supply Voltage	Core: 1.8/2.5/3.3 V ±10%; Output buffers: 1.4–3.63 V; allows mixed-voltage board designs with PSRR-optimized regulation
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; surface-mount compatible with standard reflow profiles and IPC-7351B land pattern
Operating Temperature	–40 to +85 °C; qualified for industrial and telecom line card environments without derating
Power Consumption	45 mA typical core current at 100 MHz on all outputs; low active power supports thermal-constrained embedded systems

Pinout & Package

SI5338N-B04336-GM uses a 24-lead, 4 × 4 mm QFN package with exposed thermal pad (pin 24 = GND). Pin assignments are identical across Si5338 family variants per Skyworks' "Device Pinout by Part Number" (Section 8, Rev. 1.6).

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential input pairs	Accept AC-coupled LVDS/LVPECL/CML references up to 710 MHz; require external 100 Ω termination
IN3, IN4	Single-ended CMOS/SSTL/HSTL inputs	Support DC-coupled clocks (5–350 MHz); VIH/VIL thresholds scale with VDD; internal 20 kΩ pull-up/pull-down
CLK0A/CLK0B – CLK3A/CLK3B	Differential clock outputs	Four independent pairs; each configurable as LVPECL/LVDS/HCSL/CML with dedicated VDDOx supply
VDDO0–VDDO3	Output buffer supplies	Independent 1.4–3.63 V rails per output bank; enable mixed-signal voltage domain interfacing
VDD	Core supply	1.8/2.5/3.3 V ±10% input; powers PLL, logic, and memory; excellent PSRR minimizes supply noise coupling
SCL, SDA	I²C/SMBus interface	Standard 100/400 kHz operation; supports configuration, status readback, and dynamic frequency adjustment
INTR	Interrupt output	Open-drain alarm signal for loss-of-lock (LOL) and loss-of-signal (LOS); asserts low on fault condition

Key Features

Feature	Design Value
MultiSynth™ synthesis per output	Enables independent, any-frequency generation (0.16–710 MHz) with <1 ppb resolution and zero ppm error - eliminates need for multiple crystals
PCIe Gen 1–4 & SRNS compliance	Meets PCIe Gen 3 Separate Reference No Spread (SRNS) jitter spec (0.11–0.32 ps RMS) and Gen 4 common clock requirements out-of-box
Independent output voltage control	VDDO0–VDDO3 pins allow per-channel 1.5/1.8/2.5/3.3 V selection - supports direct interfacing to mixed-voltage FPGAs, ASICs, and SerDes
Glitchless frequency tuning	Pin- or I²C-controlled frequency increment/decrement in 1 ppm steps with <667 ns update time - enables real-time clock margining and adaptive rate control
Programmable phase offset	±45 ns adjustment per output in <20 ps steps - supports precise skew alignment across multi-lane interfaces (e.g., DDR, PCIe, Ethernet)

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch/Routing
Use Scenario: High-density 32-lane PCIe Gen 4 switch IC requiring four synchronized, low-jitter reference clocks for upstream/downstream ports and management subsystems. IC Role / Device Role / Timing Role: Quad clock generator providing independent 100 MHz (common clock) and 125 MHz (management) outputs with sub-0.5 ps RMS jitter and SRNS compliance. Use Value: Eliminates four discrete oscillators and reduces board area by >60%; meets PCIe Gen 4 jitter mask without external filtering or reclocking.	Use Scenario: 10 GbE/25 GbE line card with multi-port PHYs and packet processors needing scalable, format-flexible clock distribution. IC Role / Device Role / Timing Role: Configurable clock source delivering 156.25 MHz (10GBase-R), 312.5 MHz (25GBase-R), and 250 MHz (processor) simultaneously in LVDS/HCSL/CMOS formats. Use Value: Single-device solution replaces three separate clock ICs; independent VDDOx rails enable direct connection to 1.8 V PHYs and 3.3 V controllers without level shifters.
Broadcast Video Timing	FPGA-Based Test Equipment
Use Scenario: SMPTE ST 2082 (12G-SDI) video router requiring ultra-low-jitter, phase-aligned clocks for serializer/deserializer chains across multiple channels. IC Role / Device Role / Timing Role: Precision clock generator supplying 297 MHz (12G-SDI) and 148.5 MHz (6G-SDI) with <10 ps pk-pk period jitter and programmable phase offset. Use Value: Meets SMPTE jitter limits (<0.2 UI) without external jitter cleaners; phase alignment ensures deterministic inter-channel skew for multi-link video transport.	Use Scenario: High-speed digital pattern generator using FPGA fabric with multiple clock domains (I/O, memory, processing) demanding independent, reconfigurable timing sources. IC Role / Device Role / Timing Role: Field-programmable clock engine delivering 200 MHz (DDR3), 300 MHz (SerDes), and 100 MHz (control logic) with real-time I²C reprogramming during test execution. Use Value: Enables dynamic clock rate switching between test vectors; eliminates manual oscillator swaps and reduces test setup time by >70%.

PCIe Gen 4 Switch Timing

Ethernet Switch/Routing

Use Scenario: High-density 32-lane PCIe Gen 4 switch IC requiring four synchronized, low-jitter reference clocks for upstream/downstream ports and management subsystems.

IC Role / Device Role / Timing Role: Quad clock generator providing independent 100 MHz (common clock) and 125 MHz (management) outputs with sub-0.5 ps RMS jitter and SRNS compliance.

Use Value: Eliminates four discrete oscillators and reduces board area by >60%; meets PCIe Gen 4 jitter mask without external filtering or reclocking.

Use Scenario: 10 GbE/25 GbE line card with multi-port PHYs and packet processors needing scalable, format-flexible clock distribution.

IC Role / Device Role / Timing Role: Configurable clock source delivering 156.25 MHz (10GBase-R), 312.5 MHz (25GBase-R), and 250 MHz (processor) simultaneously in LVDS/HCSL/CMOS formats.

Use Value: Single-device solution replaces three separate clock ICs; independent VDDOx rails enable direct connection to 1.8 V PHYs and 3.3 V controllers without level shifters.

Broadcast Video Timing

FPGA-Based Test Equipment

Use Scenario: SMPTE ST 2082 (12G-SDI) video router requiring ultra-low-jitter, phase-aligned clocks for serializer/deserializer chains across multiple channels.

IC Role / Device Role / Timing Role: Precision clock generator supplying 297 MHz (12G-SDI) and 148.5 MHz (6G-SDI) with <10 ps pk-pk period jitter and programmable phase offset.

Use Value: Meets SMPTE jitter limits (<0.2 UI) without external jitter cleaners; phase alignment ensures deterministic inter-channel skew for multi-link video transport.

Use Scenario: High-speed digital pattern generator using FPGA fabric with multiple clock domains (I/O, memory, processing) demanding independent, reconfigurable timing sources.

IC Role / Device Role / Timing Role: Field-programmable clock engine delivering 200 MHz (DDR3), 300 MHz (SerDes), and 100 MHz (control logic) with real-time I²C reprogramming during test execution.

Use Value: Enables dynamic clock rate switching between test vectors; eliminates manual oscillator swaps and reduces test setup time by >70%.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06189-GM	Higher integration: includes integrated crystal, smaller 3 × 3 mm 24-QFN, lower max output (550 MHz), no HCSL support	Better suited for space-constrained, crystal-free designs where 550 MHz ceiling is acceptable and HCSL is unused	Select if board area and BOM count reduction outweigh need for 710 MHz outputs or HCSL drive capability
ICS853S01AGI-01LFT	Fixed-frequency, non-programmable quad LVDS clock fanout buffer; no synthesis, no I²C, 0.4 ps RMS jitter	Limited to static clock distribution; requires external oscillator(s); no frequency translation or phase control	Choose only when design uses fixed frequencies and prioritizes lowest possible jitter over flexibility

Compared with Si5332A-D06189-GM, SI5338N-B04336-GM offers broader frequency coverage (up to 710 MHz vs. 550 MHz) and HCSL support for legacy SerDes, while ICS853S01AGI-01LFT trades full programmability for ultra-low jitter in static fanout roles - making SI5338N-B04336-GM optimal for dynamically reconfigurable, multi-standard timing systems.

Availability

SI5338N-B04336-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, 10/25 GbE routing, and broadcast video equipment requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338N-B04336-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog technologies.

The Si5338 family is designed as a high-performance, software-configurable clock generator platform targeting high-speed serial interface timing in datacenter, telecom, and broadcast infrastructure - emphasizing jitter performance, output flexibility, and system-level integration.

FAQ

What is the maximum output frequency supported by the SI5338N-B04336-GM?

The SI5338N-B04336-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS outputs. At frequencies above 350 MHz, only two unique outputs may operate simultaneously (Fvco/4 and Fvco/6), as specified in Skyworks' Rev. 1.6 datasheet Section 3.3.

Does the SI5338N-B04336-GM support PCIe Gen 4 timing requirements?

Yes, the SI5338N-B04336-GM meets PCIe Gen 4 common clock jitter specifications (0.15–0.45 ps RMS, 10 kHz–50 MHz) per Table 12 of the Rev. 1.6 datasheet. It is also compliant with PCIe Gen 3 SRNS mode and supports required spread-spectrum parameters (0.5–5.0% spread, 33–63 kHz modulation).

Can the SI5338N-B04336-GM generate different output formats simultaneously?

Yes, the SI5338N-B04336-GM supports simultaneous LVPECL, LVDS, HCSL, CMOS, SSTL, and HSTL outputs - each independently configurable via register settings. Format selection is per-output bank (CLK0–CLK3), and voltage levels are set via dedicated VDDO0–VDDO3 pins.

What is the minimum input reference frequency the SI5338N-B04336-GM accepts?

The SI5338N-B04336-GM accepts input references from 5 MHz (CMOS, SSTL, HSTL, differential) down to 1 MHz in clock buffer (PLL bypass) mode. For crystal inputs, the supported range is 8–30 MHz per Tables 8–11 in the Rev. 1.6 datasheet.

How is the SI5338N-B04336-GM programmed in-system?

The SI5338N-B04336-GM is programmed via its I²C/SMBus-compatible interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software. Configuration can be loaded at power-up from on-chip OTP memory or updated dynamically during operation for frequency, phase, format, or spread-spectrum changes.

SI5338N-B04336-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B04336-GM FAQ

1.How can I place an order for SI5338N-B04336-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B04336-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B04336-GM reliable?

The price and inventory of SI5338N-B04336-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B04336-GM is usually 5 days.

3.What payment methods are accepted for SI5338N-B04336-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B04336-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B04336-GM?

SI5338N-B04336-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B04336-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B04336-GM?

For technical support, including SI5338N-B04336-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B04336-GM requirements.

6.How does Aetrix verify that SI5338N-B04336-GM is sourced from the original manufacturer or authorized distributors?

All SI5338N-B04336-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B04336-GM meets industry standards.

7.What is the process for return or replacement of SI5338N-B04336-GM?

All SI5338N-B04336-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B04336-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B04336-GM part is unused and in its original packaging.

Return procedure for SI5338N-B04336-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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