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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B04732-GM

Name: SI5338N-B04732-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B04732-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B04732-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B04732-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338N-B04732-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis. It delivers four independent, zero-ppm-accurate output clocks (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL) up to 710 MHz, supports PCIe Gen 1–4 common clock and SRNS compliance, and operates from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package.

For engineers reviewing the SI5338N-B04732-GM datasheet, SI5338N-B04732-GM pinout, SI5338N-B04732-GM application, or SI5338N-B04732-GM equivalent, key selection considerations include differential output jitter (0.7 ps RMS typ), flexible input reference support (crystal, CMOS, SSTL, differential), independent per-output voltage (1.5–3.3 V), phase/frequency increment/decrement capability, and spread-spectrum control.

Technical Context

The SI5338N-B04732-GM implements a two-stage PLL architecture: a high-stability integer-N PLL (Stage 1) locks to an external reference (8–30 MHz crystal or 5–710 MHz differential/CMOS input), followed by four independent MultiSynth™ fractional-N synthesis blocks (Stage 2) generating each output. Each output path includes programmable divider chains (R/M/N/P), configurable output drivers, and dedicated voltage rails (VDDO0–VDDO3).

It supports both free-running synthesis and clock buffer mode (PLL bypass), features loss-of-lock and loss-of-signal alarms, and enables glitchless frequency tuning in 1 ppm steps and phase adjustment in <20 ps steps. The device integrates one-time-programmable (OTP) NVM for factory or field configuration storage.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Count	Four independent differential or single-ended outputs (CLK0A/B through CLK3A/B)
Max Output Frequency	710 MHz (LVPECL/LVDS/CML); 350 MHz (SSTL/HSTL); 250 MHz (HCSL); 200 MHz (CMOS)
Phase Jitter (RMS)	0.7 ps (12 kHz–20 MHz, GbE condition; LVDS/HCSL/LVPECL outputs)
Frequency Accuracy	True zero ppm synthesis precision across all outputs using MultiSynth™ technology
Input Reference Range	8–30 MHz crystal; 5–200 MHz CMOS; 5–350 MHz SSTL/HSTL; 5–710 MHz differential
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V
Operating Temperature	–40 °C to +85 °C ambient, qualified for industrial applications

Pinout & Package

SI5338N-B04732-GM is housed in a 4 × 4 mm, 24-lead QFN package with exposed thermal pad (RoHS-compliant, lead-free). Pin 1 is top-left corner (IN1), pin 24 is bottom-right (GND), and pin 13 is center-top (CLK3A). The package supports standard reflow profiles per JEDEC J-STD-020.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2	Differential input pair	Accepts 5–710 MHz AC-coupled differential clock; internal 100 Ω termination enabled
IN3, IN4	Single-ended input pair	Supports 5–200 MHz CMOS-level inputs; configurable as primary or backup reference
CLK0A, CLK0B – CLK3A, CLK3B	Differential output pairs	Four independent output channels; each configurable for LVPECL/LVDS/HCSL/CML/SSTL/HSTL
VDDO0–VDDO3	Output buffer supply rails	Independent 1.5/1.8/2.5/3.3 V supplies per output bank-enables mixed-voltage system interfacing
SCL, SDA	I²C/SMBus interface	Standard 100/400 kHz operation; supports ClockBuilder Pro programming and runtime reconfiguration
INTR	Interrupt output	Open-drain status indicator for loss-of-lock, loss-of-signal, or configuration errors

Key Features

Feature	Design Value
MultiSynth™ synthesis	Enables independent, any-frequency generation on all four outputs with true zero ppm accuracy and sub-ppb resolution
PCIe Gen 3 SRNS compliance	Meets PCIe Gen 3 Separate Reference No Spread specification (0.11–0.32 ps RMS jitter) with 2–5 MHz PLL bandwidth
Per-output voltage control	Each of four output banks powered by independent VDDOx rail (1.5/1.8/2.5/3.3 V)-eliminates level-shifter ICs in multi-voltage systems
Glitchless frequency tuning	Hardware-supported frequency increment/decrement via PINC/FINC pins in 1 ppm steps without output interruption
Programmable phase offset	±45 ns initial phase adjustment per output with <20 ps step resolution-critical for skew-sensitive SerDes alignment
Spread spectrum control	Configurable SSC on any output: 0.5–5.0% spread, 33–63 kHz modulation rate, 5–350 MHz frequency range

Applications

PCIe Gen 4 Switch Fabric	Ethernet Switch Timing
Use Scenario: High-speed PCIe Gen 4 switch ASIC requiring four synchronized, low-jitter clocks (100 MHz, 250 MHz, 333 MHz, 500 MHz) with strict jitter budget (≤0.45 ps RMS). IC Role / Device Role / Timing Role: Primary clock generator providing common-reference timing to switch fabric, root complex, and endpoint controllers. Use Value: Meets PCIe Gen 4 common clock jitter spec (0.15–0.45 ps RMS) and enables deterministic latency via synchronized phase alignment across all domains.	Use Scenario: 10 GbE/25 GbE Ethernet switch supporting multiple line rates (156.25 MHz, 312.5 MHz, 625 MHz) and protocol flexibility (XAUI, SFI, KR). IC Role / Device Role / Timing Role: Quad-output synthesizer delivering protocol-specific clocks with independent format/voltage per port (LVDS for PHY, HCSL for MAC, CMOS for management). Use Value: Eliminates four discrete oscillators; reduces board area by >60% and simplifies BOM while maintaining <1 ps RMS jitter at 625 MHz.
Broadcast Video Master Clock	FPGA-Based Test Equipment
Use Scenario: SMPTE ST 2082/ST 2110 broadcast video router needing precise 27 MHz, 74.25 MHz, 148.5 MHz, and 297 MHz clocks with <±100 ps inter-channel skew. IC Role / Device Role / Timing Role: Master timing source synchronizing video processing pipelines, frame buffers, and serializers across multiple FPGA and ASIC domains. Use Value: Achieves <100 ps output-to-output skew (tDSKEW) and <20 ps phase step resolution-enabling pixel-accurate genlock and seamless format switching.	Use Scenario: High-precision automated test equipment (ATE) FPGA platform requiring programmable clocks (10–300 MHz) for stimulus generation, sampling, and DUT synchronization. IC Role / Device Role / Timing Role: Reconfigurable clock engine enabling dynamic frequency/phase changes during test sequences without hardware reset. Use Value: Hardware-supported 1 ppm frequency increment/decrement and ±45 ns phase tuning allow real-time jitter injection and margin testing without software overhead.

PCIe Gen 4 Switch Fabric

Ethernet Switch Timing

Use Scenario: High-speed PCIe Gen 4 switch ASIC requiring four synchronized, low-jitter clocks (100 MHz, 250 MHz, 333 MHz, 500 MHz) with strict jitter budget (≤0.45 ps RMS).

IC Role / Device Role / Timing Role: Primary clock generator providing common-reference timing to switch fabric, root complex, and endpoint controllers.

Use Value: Meets PCIe Gen 4 common clock jitter spec (0.15–0.45 ps RMS) and enables deterministic latency via synchronized phase alignment across all domains.

Use Scenario: 10 GbE/25 GbE Ethernet switch supporting multiple line rates (156.25 MHz, 312.5 MHz, 625 MHz) and protocol flexibility (XAUI, SFI, KR).

IC Role / Device Role / Timing Role: Quad-output synthesizer delivering protocol-specific clocks with independent format/voltage per port (LVDS for PHY, HCSL for MAC, CMOS for management).

Use Value: Eliminates four discrete oscillators; reduces board area by >60% and simplifies BOM while maintaining <1 ps RMS jitter at 625 MHz.

Broadcast Video Master Clock

FPGA-Based Test Equipment

Use Scenario: SMPTE ST 2082/ST 2110 broadcast video router needing precise 27 MHz, 74.25 MHz, 148.5 MHz, and 297 MHz clocks with <±100 ps inter-channel skew.

IC Role / Device Role / Timing Role: Master timing source synchronizing video processing pipelines, frame buffers, and serializers across multiple FPGA and ASIC domains.

Use Value: Achieves <100 ps output-to-output skew (tDSKEW) and <20 ps phase step resolution-enabling pixel-accurate genlock and seamless format switching.

Use Scenario: High-precision automated test equipment (ATE) FPGA platform requiring programmable clocks (10–300 MHz) for stimulus generation, sampling, and DUT synchronization.

IC Role / Device Role / Timing Role: Reconfigurable clock engine enabling dynamic frequency/phase changes during test sequences without hardware reset.

Use Value: Hardware-supported 1 ppm frequency increment/decrement and ±45 ns phase tuning allow real-time jitter injection and margin testing without software overhead.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06889-GM	Higher integration: 8 outputs, integrated jitter cleaner, lower jitter (0.35 ps RMS), supports JESD204B deterministic latency	Targeted at JESD204B ADC/DAC timing and multi-ASIC synchronization where sub-0.4 ps jitter and deterministic delay are mandatory	Select when system requires >4 outputs, ultra-low jitter (<0.4 ps), or JESD204B TIES compliance-requires ClockBuilder Pro v4.x+ and updated layout for enhanced power integrity
ICS8430I-01T	Fixed-frequency, non-programmable; 4 LVDS outputs only; no I²C interface; higher jitter (1.2 ps RMS); 3.3 V only	Cost-sensitive, static-clock applications (e.g., legacy telecom line cards) where frequency flexibility and low jitter are secondary to unit cost and simplicity	Select only for fixed-frequency, single-supply designs with relaxed jitter requirements (>1 ps RMS) and no need for field reprogramming

Compared with Si5332A-D06889-GM, SI5338N-B04732-GM offers lower cost and simpler power design but lacks JESD204B support and has higher jitter; compared with ICS8430I-01T, it provides full programmability and superior jitter performance at the expense of higher BOM complexity and configuration effort.

Availability

SI5338N-B04732-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch clocking, broadcast video master clocking, and FPGA-based instrumentation requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338N-B04732-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and industrial markets.

The Si5338 family was designed as a highly configurable, low-jitter clock generator for high-speed digital systems-including PCIe, Ethernet, broadcast video, and FPGA platforms-where multi-frequency synthesis, flexible output formats, and robust jitter performance are critical.

FAQ

What is the maximum output frequency supported by the SI5338N-B04732-GM in LVPECL mode?

The SI5338N-B04732-GM supports up to 710 MHz in LVPECL output mode, as verified in Table 6 of the official Skyworks datasheet Rev. 1.6. This applies when using differential outputs with appropriate termination and layout practices to maintain signal integrity and jitter performance. Operation above 350 MHz requires use of Fvco/4 or Fvco/6 synthesis paths per the device's MultiSynth architecture.

Does the SI5338N-B04732-GM support PCIe Gen 4 Common Clock compliance?

Yes, the SI5338N-B04732-GM meets PCIe Gen 4 Common Clock jitter specifications (0.15–0.45 ps RMS) under defined test conditions-specifically with a PLL bandwidth of 2–5 MHz and CDR set to 10 MHz-as documented in Table 12 of the Skyworks datasheet Rev. 1.6. It also satisfies PCIe Gen 3 SRNS requirements.

Can the SI5338N-B04732-GM generate different output voltages simultaneously on its four output banks?

Yes, the SI5338N-B04732-GM supports independent output supply rails (VDDO0–VDDO3), allowing simultaneous configuration of LVPECL (3.3 V), LVDS (2.5 V), HCSL (1.8 V), and CMOS (1.5 V) outputs. Each VDDO pin powers its respective output bank, enabling direct interfacing with mixed-voltage SoCs, FPGAs, and PHYs without external level shifters.

Is the SI5338N-B04732-GM pin-compatible with other Si5338 variants like SI5338A or SI5338B?

No, the SI5338N-B04732-GM is not guaranteed pin-compatible with earlier Si5338A or Si5338B variants. While all share the same 24-QFN package footprint and basic pin functions (e.g., IN1/IN2, CLK0A/B, SCL/SDA), differences in internal register mapping, OTP configuration, and certain pin behaviors (e.g., RSVD_GND function) require validation against the specific variant's datasheet before substitution.

How is the SI5338N-B04732-GM programmed and configured in-system?

The SI5338N-B04732-GM is programmed via its I²C/SMBus-compatible interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software. Configuration can be loaded at power-up from internal OTP memory or dynamically updated during operation. The device supports hardware pin control (PINC/FINC) for real-time frequency adjustment and interrupt reporting (INTR) for status monitoring.

SI5338N-B04732-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B04732-GM FAQ

1.How can I place an order for SI5338N-B04732-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B04732-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B04732-GM reliable?

The price and inventory of SI5338N-B04732-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B04732-GM is usually 5 days.

3.What payment methods are accepted for SI5338N-B04732-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B04732-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B04732-GM?

SI5338N-B04732-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B04732-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B04732-GM?

For technical support, including SI5338N-B04732-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B04732-GM requirements.

6.How does Aetrix verify that SI5338N-B04732-GM is sourced from the original manufacturer or authorized distributors?

All SI5338N-B04732-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B04732-GM meets industry standards.

7.What is the process for return or replacement of SI5338N-B04732-GM?

All SI5338N-B04732-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B04732-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B04732-GM part is unused and in its original packaging.

Return procedure for SI5338N-B04732-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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