Skyworks Solutions Inc. SI5338N-B04732-GMR
- Part No.:
- SI5338N-B04732-GMR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Application Specific Clock/Timing
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
SI5338N-B04732-GMR.pdf
- Description:
- I2C CONTROL, 4-OUTPUT, ANY FREQU
- Quantity:
- Payment:

- Shipping:

Inventory:4,351
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI5338N-B04732-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.
For engineers reviewing the SI5338N-B04732-GMR datasheet, SI5338N-B04732-GMR pinout, SI5338N-B04732-GMR application, or SI5338N-B04732-GMR equivalent, key selection criteria include PCIe Gen 4 jitter compliance (0.15–0.45 ps RMS), independent output voltage per driver (1.5/1.8/2.5/3.3 V), MultiSynth™ fractional synthesis resolution (0 ppm precision), and flexible input support (8–30 MHz crystal, 5–710 MHz differential).
Technical Context
The SI5338N-B04732-GMR integrates a dual-stage PLL architecture: a high-stability reference stage (with crystal or external clock input) feeding a MultiSynth™ fractional-N synthesis stage per output. Each of the four output drivers supports independent format selection (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL) and voltage control (1.5–3.3 V).
It implements programmable features including glitchless frequency increment/decrement in 1 ppm steps, phase adjustment with <20 ps step accuracy, and configurable spread-spectrum clocking (0.5–5.0% spread, 33–63 kHz modulation). Loss-of-lock and loss-of-signal alarms provide real-time status monitoring via the INTR pin.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Phase Jitter (RMS) | 0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 4 common clock jitter spec (≤0.45 ps RMS) |
| Output Count & Flexibility | 4 independent outputs: up to 4 differential, 8 single-ended, or mixed; each configurable for format and voltage |
| Frequency Range | LVPECL/LVDS: 0.16–710 MHz; HCSL: 0.16–250 MHz; CMOS: 0.16–200 MHz; SSTL/HSTL: 0.16–350 MHz |
| Input Reference Support | Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) |
| Supply Voltages | Core: 1.8/2.5/3.3 V (±10%); Output buffers: 1.4–3.63 V, independently set per driver |
| Package | 24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad |
| Operating Temperature | –40 °C to +85 °C ambient; qualified for industrial and telecom line card environments |
Pinout & Package
The SI5338N-B04732-GMR is housed in a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with an exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1, IN2, IN5, IN6 | Differential clock inputs | Accept AC-coupled differential references up to 710 MHz; require external 100 Ω termination |
| IN3, IN4 | Single-ended clock inputs | Support CMOS/SSTL/HSTL signals (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD |
| CLK0A/CLK0B – CLK3A/CLK3B | Differential output pairs | Four independent LVPECL/LVDS/HCSL/CML outputs; each pair shares one VDDOx supply rail |
| VDDO0–VDDO3 | Output buffer supplies | Independent 1.4–3.63 V rails per output group; enable mixed-voltage system interfacing |
| VDD | Core supply | 1.8/2.5/3.3 V ±10%; powers PLL, MultiSynth, and control logic |
| SCL, SDA | I²C interface | SMBus-compatible 1.8/2.5/3.3 V bidirectional bus; supports standard/fast-mode (100/400 kHz) |
| INTR | Interrupt output | Open-drain status indicator for loss-of-lock and loss-of-signal events |
| RSVD_GND | Reserved ground | Internal no-connect; must be tied to GND per layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth™ synthesis | Four independent fractional-N synthesizers enabling true zero-ppm frequency accuracy on all outputs |
| PCIe Gen 4 compliance | Meets Common Clock jitter spec (0.15–0.45 ps RMS) and SRNS requirements for Gen 3 without external components |
| Glitchless frequency tuning | Hardware-supported 1 ppm step frequency increment/decrement via PINC/FDEC pins, no output interruption |
| Programmable phase offset | ±45 ns initial phase adjustment per output with <20 ps step resolution for skew compensation |
| Spread-spectrum clocking | Configurable on any output: 0.5–5.0% down-spread, 33–63 kHz modulation rate, reducing EMI in dense PCB layouts |
Applications
| PCIe Gen 4 Switch Timing | Ethernet Switch/Routing |
|---|---|
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ASICs in a 1U data center switch chassis. IC Role / Device Role / Timing Role: Quad-output clock generator delivering low-jitter, independently enabled clocks with matched propagation delay across lanes. Use Value: Enables full Gen 4 link training at 16 GT/s with ≤0.45 ps RMS jitter, eliminating need for four discrete oscillators and reducing BOM count by 75%. | Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 10GbE PHYs, packet processors, and SerDes in carrier-grade Ethernet switches. IC Role / Device Role / Timing Role: Any-frequency synthesizer supporting mixed-rate clock domains from a single crystal reference. Use Value: Reduces board area and power vs. discrete solutions while maintaining sub-1 ps RMS jitter required for IEEE 802.3bj compliance. |
| Broadcast Video Timing | FPGA/Processor Clocking |
Use Scenario: Delivering SMPTE ST 2082 (27 Gbps) pixel clock, AES audio reference, and genlock signals in 4K/8K video production equipment. IC Role / Device Role / Timing Role: Precision multi-format clock source with independent LVDS, HCSL, and CMOS outputs. Use Value: Eliminates timing skew between video, audio, and control domains using programmable phase offsets (<20 ps steps) and format flexibility. | Use Scenario: Supplying core, DDR, and peripheral clocks to Xilinx Versal and Intel Agilex FPGAs in adaptive compute acceleration platforms. IC Role / Device Role / Timing Role: Configurable clock generator supporting dynamic voltage/frequency scaling (DVFS) and multi-rail FPGA power domains. Use Value: Independent VDDOx supplies allow simultaneous 1.2 V DDR4, 1.8 V I/O, and 2.5 V transceiver clocks from one IC, simplifying power sequencing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5332A-D06989-GM | Higher integration: includes integrated crystal, smaller 3 × 3 mm 24-QFN, lower jitter (0.35 ps RMS), but fixed 4-output LVDS only | Targeted at space-constrained, ultra-low-jitter applications where crystal integration and output format uniformity are prioritized over flexibility | Select when board area and jitter are critical, and all outputs require identical LVDS format and voltage |
| ICS8430I-01T | Non-programmable, fixed-frequency quad LVDS generator; no I²C interface; higher jitter (1.2 ps RMS); requires external crystal oscillator | Suitable for cost-sensitive, high-volume applications with static clock trees and no need for field reconfiguration | Select when design is finalized, no frequency tuning is needed, and lowest unit cost outweighs programmability and jitter performance |
Compared with Si5332A-D06989-GM and ICS8430I-01T, the SI5338N-B04732-GMR offers unmatched configurability-supporting mixed output formats, independent voltages, and field-updatable frequencies-making it optimal for prototyping, multi-platform reuse, and systems requiring post-deployment timing adjustments.
Availability
SI5338N-B04732-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching/routing, and broadcast video timing requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for SI5338N-B04732-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.
The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces-including PCIe, Ethernet, Fibre Channel, and broadcast video-enabling system-level timing consolidation and reduced design complexity.
FAQ
What is the primary function of the SI5338N-B04732-GMR in a PCIe Gen 4 system?
The SI5338N-B04732-GMR serves as a quad-output, low-jitter clock generator that provides compliant 100 MHz reference clocks to PCIe Gen 4 switch or endpoint devices. Its 0.15–0.45 ps RMS jitter meets the PCIe Base Specification 4.0 common clock requirements, and its independent output enables per-lane enable/disable and skew control-critical for reliable 16 GT/s link training. The SI5338N-B04732-GMR eliminates the need for multiple discrete oscillators while maintaining signal integrity across dense interconnects.
Does the SI5338N-B04732-GMR support spread-spectrum clocking (SSC), and how is it configured?
Yes, the SI5338N-B04732-GMR supports fully configurable spread-spectrum clocking on any output: spread range 0.5–5.0%, modulation rate 33–63 kHz, and direction (down-spread only). Configuration is performed via I²C register writes using ClockBuilder Pro software or direct register access. SSC reduces electromagnetic interference (EMI) peaks in high-density PCBs without affecting timing margin, and the SI5338N-B04732-GMR maintains jitter compliance even with SSC enabled.
Can the SI5338N-B04732-GMR generate different output voltages simultaneously?
Yes, the SI5338N-B04732-GMR supports independent output supply rails (VDDO0–VDDO3), allowing simultaneous generation of LVDS at 1.8 V, HCSL at 2.5 V, and CMOS at 3.3 V from a single device. Each VDDOx pin powers its associated output pair (e.g., CLK0A/B), enabling direct interfacing with mixed-voltage SoCs, FPGAs, and PHYs without level shifters. This capability is confirmed in the Si5338 datasheet Section 3.4 and Table 6.
What input reference options does the SI5338N-B04732-GMR accept?
The SI5338N-B04732-GMR accepts multiple input references: an 8–30 MHz fundamental-mode crystal (directly connected to IN1/IN2), a 5–200 MHz CMOS clock (on IN3/IN4), or differential inputs up to 710 MHz (on IN1/IN2 or IN5/IN6). It also supports SSTL/HSTL inputs up to 350 MHz. All inputs are automatically detected and conditioned by internal circuitry, and the SI5338N-B04732-GMR's loss-of-signal detection ensures robust fail-safe operation.
How is the SI5338N-B04732-GMR programmed, and is external nonvolatile memory required?
The SI5338N-B04732-GMR is programmed via its I²C/SMBus-compatible interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software, which generates configuration files and registers. It contains on-chip one-time-programmable (OTP) NVM that stores the default configuration; no external memory is required for boot-up. Factory-programmed units (like SI5338N-B04732-GMR) power up with preloaded settings, and field updates are supported without hardware changes. The SI5338N-B04732-GMR's OTP eliminates BOM cost and layout overhead versus external EEPROM-based solutions.
SI5338N-B04732-GMR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- MultiSynth™
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- PLL:
- -
- Main Purpose:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
SI5338N-B04732-GMR FAQ
1.How can I place an order for SI5338N-B04732-GMR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5338N-B04732-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5338N-B04732-GMR reliable?
The price and inventory of SI5338N-B04732-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B04732-GMR is usually 5 days.
3.What payment methods are accepted for SI5338N-B04732-GMR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B04732-GMR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5338N-B04732-GMR?
SI5338N-B04732-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5338N-B04732-GMR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5338N-B04732-GMR?
For technical support, including SI5338N-B04732-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B04732-GMR requirements.
6.How does Aetrix verify that SI5338N-B04732-GMR is sourced from the original manufacturer or authorized distributors?
All SI5338N-B04732-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B04732-GMR meets industry standards.
7.What is the process for return or replacement of SI5338N-B04732-GMR?
All SI5338N-B04732-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B04732-GMR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5338N-B04732-GMR part is unused and in its original packaging.
Return procedure for SI5338N-B04732-GMR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI5338N-B04732-GMR Tags

-
LMK00334RTVRQ1
Texas Instruments
.jpg)
-
DSC557-0344FI0T
Microchip Technology

-
9FGV0241AKILFT
Renesas

-
9DBL0452CKILFT
Renesas
.jpg)
-
DSC557-0344FL1T
Microchip Technology
-
RC19008AGND#KB0
Renesas
-
RC19008AGND#BB0
Renesas

-
9DB403DGILFT
Renesas

-
9DB233AGILFT
Renesas

-
9DB803DGILFT
Renesas

-
9FGL0851DKILFT
Renesas
-
AB-557-03-HCHC-F-L-C-T
Abracon LLC
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

