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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B04781-GM

Name: SI5338N-B04781-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B04781-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B04781-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B04781-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338N-B04781-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in high-speed serial interface timing applications including PCIe, Ethernet, and FPGA clocking.

For engineers reviewing the SI5338N-B04781-GM datasheet, SI5338N-B04781-GM pinout, SI5338N-B04781-GM application, or SI5338N-B04781-GM equivalent, key selection criteria include output format flexibility (LVPECL/LVDS/HCSL/CMOS/SSTL), independent per-output voltage (1.5–3.3 V), any-frequency synthesis (0.16–710 MHz), spread-spectrum control (0.5–5.0% down-spread), and I²C/SMBus programmability with ClockBuilder Pro support.

Technical Context

The SI5338N-B04781-GM implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers, each driving a configurable output buffer. Its input supports eight clock sources - external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) - enabling flexible system-level clock tree integration.

Each output driver supports independent frequency, format, supply voltage, phase offset (<20 ps step resolution), and spread-spectrum modulation (33–63 kHz rate, 0.5–5.0% deviation). The device operates from a single 1.8/2.5/3.3 V core supply with 45 mA typical current draw and includes loss-of-lock and loss-of-signal alarms for system monitoring.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS and Gen 4 common clock jitter requirements
Output Frequency Range	0.16–710 MHz per channel; supports LVPECL/LVDS (≤710 MHz), HCSL (≤250 MHz), CMOS (≤200 MHz), SSTL/HSTL (≤350 MHz)
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, moisture sensitivity level 3
Operating Temperature	–40 to +85 °C ambient; qualified per industrial-grade reliability standards
I²C Interface	SMBus-compatible, 100 kHz / 400 kHz standard/fast mode; supports ClockBuilder Pro configuration

Pinout & Package

SI5338N-B04781-GM uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential input pairs	Accept 5–710 MHz AC-coupled differential clocks; require external 100 Ω termination
IN3, IN4	Single-ended input pins	Support 5–200 MHz CMOS, SSTL, or HSTL inputs; VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A/CLK0B to CLK3A/CLK3B	Differential output pairs	Four independent output channels; each configurable as LVPECL, LVDS, HCSL, CML, or SSTL/HSTL
VDDO0–VDDO3	Output buffer supplies	Independent 1.5/1.8/2.5/3.3 V supplies per output bank; enable mixed-voltage clock distribution
VDD	Core supply	Single 1.8/2.5/3.3 V supply powers PLL, synthesizers, and logic; PSRR optimized for noise immunity
SCL, SDA	I²C interface	Standard bidirectional SMBus-compatible bus; supports in-system programming and real-time reconfiguration
INTR	Interrupt output	Open-drain status indicator for loss-of-lock and loss-of-signal events; active-low assertion
RSVD_GND	Reserved ground	Internal test pin; must be connected to GND per layout guidelines to ensure signal integrity

Key Features

Feature	Design Value
MultiSynth™ any-frequency synthesis	Four independent outputs with true zero-ppm accuracy and 1 ppb frequency resolution
PCIe Gen 1–4 timing compliance	Meets Common Clock (Gen 1–4) and SRNS (Gen 3) jitter specs; validated using Intel Clock Jitter Tool
Glitchless frequency adjustment	Independent 1 ppm step increment/decrement via pin control or I²C; no output interruption
Programmable phase offset	±45 ns range with <20 ps step resolution per output; enables precise skew management in multi-lane systems
Configurable spread spectrum	Per-output SSC with 0.5–5.0% deviation and 33–63 kHz modulation rate; reduces EMI without compromising timing margin
External feedback mode	Enables zero-delay clock buffer operation; preserves input jitter profile while providing fanout and level translation

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch Clocking
Use Scenario: High-density 100 GbE switch ASIC requiring synchronized 100 MHz and 156.25 MHz clocks with sub-0.5 ps RMS jitter for SerDes lanes. IC Role / Device Role / Timing Role: Quad clock generator providing four low-jitter, independently configured outputs to drive multiple switch PHYs and MACs. Use Value: Eliminates need for four discrete oscillators; enables dynamic frequency scaling and phase alignment across lanes to meet PCIe Gen 4 TJ<32 ps pk-pk requirement.	Use Scenario: Carrier-grade Ethernet aggregation switch needing 125 MHz (1 GbE), 156.25 MHz (10 GbE), and 312.5 MHz (25 GbE) clocks with tight inter-channel skew. IC Role / Device Role / Timing Role: Any-frequency clock synthesizer delivering three distinct frequencies from one crystal reference, with independent voltage and format control. Use Value: Reduces BOM count and PCB area; supports mixed-voltage SERDES interfaces (1.8 V LVDS, 2.5 V HCSL) without external level shifters.
FPGA/ASIC Reference Clocking	Broadcast Video Timing
Use Scenario: Multi-FPGA prototyping platform requiring 100 MHz system clock, 200 MHz transceiver reference, and 300 MHz DDR4 memory clock with programmable phase offsets. IC Role / Device Role / Timing Role: Configurable quad clock source with independent per-output phase, voltage, and format settings. Use Value: Enables deterministic clock-to-clock alignment across FPGAs; supports simultaneous LVDS (transceivers) and SSTL (DDR4) outputs from single IC.	Use Scenario: SMPTE ST 2110 IP video router needing genlock-capable 27 MHz, 74.25 MHz, and 148.5 MHz clocks with <100 ps inter-output skew. IC Role / Device Role / Timing Role: Precision clock generator with ultra-low jitter and programmable initial phase offset for frame-synchronized timing. Use Value: Meets SMPTE 2059-2 PTP grandmaster timing stability; allows fine-grained skew correction between video/audio/data streams.

PCIe Gen 4 Switch Timing

Ethernet Switch Clocking

Use Scenario: High-density 100 GbE switch ASIC requiring synchronized 100 MHz and 156.25 MHz clocks with sub-0.5 ps RMS jitter for SerDes lanes.

IC Role / Device Role / Timing Role: Quad clock generator providing four low-jitter, independently configured outputs to drive multiple switch PHYs and MACs.

Use Value: Eliminates need for four discrete oscillators; enables dynamic frequency scaling and phase alignment across lanes to meet PCIe Gen 4 TJ<32 ps pk-pk requirement.

Use Scenario: Carrier-grade Ethernet aggregation switch needing 125 MHz (1 GbE), 156.25 MHz (10 GbE), and 312.5 MHz (25 GbE) clocks with tight inter-channel skew.

IC Role / Device Role / Timing Role: Any-frequency clock synthesizer delivering three distinct frequencies from one crystal reference, with independent voltage and format control.

Use Value: Reduces BOM count and PCB area; supports mixed-voltage SERDES interfaces (1.8 V LVDS, 2.5 V HCSL) without external level shifters.

FPGA/ASIC Reference Clocking

Broadcast Video Timing

Use Scenario: Multi-FPGA prototyping platform requiring 100 MHz system clock, 200 MHz transceiver reference, and 300 MHz DDR4 memory clock with programmable phase offsets.

IC Role / Device Role / Timing Role: Configurable quad clock source with independent per-output phase, voltage, and format settings.

Use Value: Enables deterministic clock-to-clock alignment across FPGAs; supports simultaneous LVDS (transceivers) and SSTL (DDR4) outputs from single IC.

Use Scenario: SMPTE ST 2110 IP video router needing genlock-capable 27 MHz, 74.25 MHz, and 148.5 MHz clocks with <100 ps inter-output skew.

IC Role / Device Role / Timing Role: Precision clock generator with ultra-low jitter and programmable initial phase offset for frame-synchronized timing.

Use Value: Meets SMPTE 2059-2 PTP grandmaster timing stability; allows fine-grained skew correction between video/audio/data streams.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D08189-GM	Higher integration: 8 outputs, lower jitter (0.35 ps RMS), integrated crystal option; requires different ClockBuilder configuration flow	Targeted at next-gen 400G/800G optical modules and AI accelerators requiring >4 outputs or tighter jitter budgets	Select if >4 outputs or <0.5 ps RMS jitter required; not drop-in due to pin count (32-QFN) and register map differences
ICS854S01IAGLF	Fixed-frequency, non-programmable quad LVDS clock buffer; 1.2 ps RMS jitter; no I²C interface or frequency synthesis	Used in cost-sensitive, static-clocking applications where reconfiguration is unnecessary	Select only for fixed-frequency fanout; lacks any-frequency synthesis, spread spectrum, or voltage flexibility of SI5338N-B04781-GM

Compared with Si5332A-D08189-GM and ICS854S01IAGLF, the SI5338N-B04781-GM uniquely balances programmability, jitter performance, and pin-count efficiency for mid-range high-speed serial timing - offering full I²C configurability in a compact 24-QFN without requiring external crystal or complex layout constraints.

Availability

SI5338N-B04781-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch design, Ethernet 10/25/100 GbE timing, and FPGA-based embedded vision systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338N-B04781-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and industrial markets.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces - designed specifically to replace multiple discrete oscillators and simplify clock tree architecture in PCIe, Ethernet, and FPGA-based systems.

FAQ

What clock frequencies does the SI5338N-B04781-GM support on its outputs?

The SI5338N-B04781-GM supports any frequency from 0.16 MHz to 710 MHz per output, depending on format: LVPECL/LVDS up to 710 MHz, HCSL up to 250 MHz, CMOS up to 200 MHz, and SSTL/HSTL up to 350 MHz. Frequencies above 350 MHz are limited to two unique values simultaneously (Fvco/4 and Fvco/6), as specified in the Si5338 datasheet Section 3.3. All outputs maintain true zero-ppm accuracy via MultiSynth™ fractional-N synthesis.

Does the SI5338N-B04781-GM support PCIe Gen 4 timing requirements?

Yes, the SI5338N-B04781-GM meets PCIe Gen 4 Common Clock jitter specifications with 0.15–0.45 ps RMS (10 kHz–50 MHz) when configured per Skyworks' validated settings. It is explicitly listed as PCIe Gen 1/2/3/4 Common Clock and Gen 3 SRNS compliant in the official datasheet Features section and validated using the Skyworks PCIe Clock Jitter Tool and Intel Clock Jitter Tool v1.6.4.

Can the SI5338N-B04781-GM operate with a single-ended input clock?

Yes, the SI5338N-B04781-GM accepts single-ended CMOS, SSTL, or HSTL inputs on pins IN3 and IN4 across 5–200 MHz (CMOS) or 5–350 MHz (SSTL/HSTL). Input thresholds are VIH = 0.7×VDD and VIL = 0.3×VDD, with 4 pF input capacitance and 20 kΩ input resistance. For optimal jitter, slew rate should exceed 1 V/ns at these pins.

How is the SI5338N-B04781-GM programmed and configured?

The SI5338N-B04781-GM is programmed via its I²C/SMBus-compatible interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software, which generates custom configuration files and register maps. Configuration can be performed in-system during development or pre-programmed into OTP memory at manufacturing. Pin-controlled frequency increment/decrement and phase adjustment are also supported for runtime tuning.

What output voltage levels and formats does the SI5338N-B04781-GM support?

The SI5338N-B04781-GM supports independent output supply voltages of 1.5 V, 1.8 V, 2.5 V, or 3.3 V per output bank (VDDO0–VDDO3), enabling mixed-voltage clock distribution. Output formats include LVPECL, LVDS, HCSL, CML, CMOS, SSTL, and HSTL - each selectable per channel with format-specific voltage swing and common-mode ranges defined in Table 6 of the datasheet.

SI5338N-B04781-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B04781-GM FAQ

1.How can I place an order for SI5338N-B04781-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B04781-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B04781-GM reliable?

The price and inventory of SI5338N-B04781-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B04781-GM is usually 5 days.

3.What payment methods are accepted for SI5338N-B04781-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B04781-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B04781-GM?

SI5338N-B04781-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B04781-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B04781-GM?

For technical support, including SI5338N-B04781-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B04781-GM requirements.

6.How does Aetrix verify that SI5338N-B04781-GM is sourced from the original manufacturer or authorized distributors?

All SI5338N-B04781-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B04781-GM meets industry standards.

7.What is the process for return or replacement of SI5338N-B04781-GM?

All SI5338N-B04781-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B04781-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B04781-GM part is unused and in its original packaging.

Return procedure for SI5338N-B04781-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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