Skyworks Solutions Inc. SI5338N-B04908-GMR

Overview

SI5338N-B04908-GMR from Skyworks Solutions is a quad-output, I²C-programmable clock generator implementing MultiSynth™ PLL architecture to synthesize four independent output frequencies (0.16–710 MHz) with 0 ppm precision, 0.7 ps RMS phase jitter, and PCIe Gen 1–4 Common Clock & Gen 3 SRNS compliance. It serves as a low-jitter timing source for FPGA/processor clocking, Ethernet switch timing, and PCIe root complex applications.

For engineers reviewing the SI5338N-B04908-GMR datasheet, SI5338N-B04908-GMR pinout, SI5338N-B04908-GMR application, or SI5338N-B04908-GMR equivalent, key selection criteria include differential output format support (LVPECL/LVDS/HCSL), independent per-output voltage control (1.5–3.3 V), spread-spectrum capability (0.5–5.0% at 33–63 kHz), and 24-QFN package compatibility with PCIe jitter requirements.

Technical Context

The SI5338N-B04908-GMR integrates a two-stage synthesis architecture: a high-stability PLL stage (loop bandwidth 1.6 MHz) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N dividers enabling any-frequency generation on each output. Each output driver supports configurable signal format, voltage, and termination.

It features real-time frequency/phase adjustment via dedicated pins (FINC/FDEC, PINC/PDEC) with 1 ppm step resolution and <20 ps phase step accuracy, plus loss-of-lock and loss-of-signal monitoring via INTR pin. The device operates across –40 to +85 °C with core supply options of 1.8 V, 2.5 V, or 3.3 V and output buffer supplies from 1.4 V to 3.63 V.

Key Specifications

Pinout & Package

SI5338N-B04908-GMR is housed in a 24-lead, 4 mm × 4 mm QFN package with wettable flanks and an exposed thermal pad. Pin 1 is top-left corner (IN1), pin numbering proceeds counterclockwise. The package supports reflow soldering per JEDEC J-STD-020 (peak 260 °C).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Compared with Si5338A-B04908-GM, SI5338N-B04908-GMR offers identical hardware functionality but distinct factory OTP settings; versus LMK04832RHAR, it provides lower power, smaller footprint, and integrated any-frequency synthesis-but lacks jitter cleaning capability.

Availability

SI5338N-B04908-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 server designs, 10 GbE switch platforms, and broadcast video timing systems requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338N-B04908-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 family is designed as a highly configurable, low-jitter clock generator targeting high-speed serial interface timing-including PCIe, Ethernet, Fibre Channel, and broadcast video-where precise multi-frequency synthesis and jitter compliance are critical.

FAQ

What is the default factory configuration of the SI5338N-B04908-GMR?

The SI5338N-B04908-GMR is pre-programmed with a specific frequency configuration stored in one-time-programmable (OTP) memory. Unlike blank variants, it powers up with defined output frequencies and formats without requiring initial I²C programming. This configuration is unique to the B04908 variant and differs from other Si5338N part numbers. Users may reprogram the SI5338N-B04908-GMR via I²C using ClockBuilder Pro software if needed.

Does the SI5338N-B04908-GMR support PCIe Gen 4 Common Clock mode?

Yes, the SI5338N-B04908-GMR meets PCIe Gen 4 Common Clock jitter specifications with 0.15–0.45 ps RMS (1.5 MHz–50 MHz band). It achieves this using its 1.6 MHz PLL loop bandwidth and MultiSynth™ architecture, and has been validated using the Skyworks PCIe Clock Jitter Tool and Intel Clock Jitter Tool v1.6.4. The device supports both Common Clock and SRNS modes per PCIe Base Specification 4.0 rev 0.5.

Can the SI5338N-B04908-GMR generate frequencies above 350 MHz on all four outputs simultaneously?

No. While the SI5338N-B04908-GMR supports up to 710 MHz on individual outputs, only two unique frequencies above 350 MHz can be generated simultaneously-specifically Fvco/4 and Fvco/6-as constrained by the internal VCO and synthesis architecture. Outputs exceeding 350 MHz must share these two high-frequency synthesis paths; other outputs must operate below 350 MHz or use integer-related frequencies derived from them.

How does the SI5338N-B04908-GMR handle loss-of-signal detection?

The SI5338N-B04908-GMR monitors all six input pins (IN1–IN6) for loss-of-signal (LOS) events, with detection time of 2.6–5 µs and release time of 0.01–1 µs. When LOS occurs, the device asserts the open-drain INTR pin low and sets corresponding status bits in the interrupt register. This enables rapid system-level fault response without host processor polling, and is fully operational in both PLL and clock buffer (bypass) modes.

Is external EEPROM required to retain configuration for the SI5338N-B04908-GMR?

No. The SI5338N-B04908-GMR contains on-chip one-time-programmable (OTP) memory that stores the default configuration, eliminating the need for external EEPROM. Factory-programmed settings persist across power cycles. Optional volatile RAM configuration via I²C is supported for runtime updates, but non-volatile storage is internal and self-contained-reducing BOM cost and board space.