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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B04992-GM

Name: SI5338N-B04992-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B04992-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B04992-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B04992-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338N-B04992-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator implementing MultiSynth™ frequency synthesis. It delivers four independent, zero-ppm-accurate output clocks (0.16–710 MHz) with 0.7 ps RMS typical phase jitter, supporting LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats and configurable per-output supply voltages (1.5–3.3 V). It serves as a PCIe Gen 1–4 common-clock source in high-speed switch/router and FPGA timing applications.

For engineers reviewing the SI5338N-B04992-GM datasheet, SI5338N-B04992-GM pinout, SI5338N-B04992-GM application, or SI5338N-B04992-GM equivalent, key selection considerations include differential output jitter compliance with PCIe Gen 4 SRNS (0.15–0.45 ps RMS), independent per-output voltage configuration, spread-spectrum control (0.5–5.0% down-spread), and 24-QFN package compatibility with board-level thermal management requirements.

Technical Context

The SI5338N-B04992-GM integrates a dual-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers, each driving one output pair. Its input flexibility supports crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) references.

Each output driver provides independent format selection, voltage rail assignment (VDDO0–VDDO3), phase offset (±45 ns, <20 ps step), and frequency increment/decrement (1 ppm steps, glitchless). Loss-of-lock and loss-of-signal alarms are implemented via dedicated INTR pin.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count & type	Four differential output pairs (CLK0A/B through CLK3A/B), supporting up to eight single-ended clocks or mixed configurations
Phase jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 4 SRNS requirement of ≤0.45 ps RMS
Frequency range	0.16–710 MHz per output; LVPECL/LVDS up to 710 MHz, HCSL up to 250 MHz, CMOS up to 200 MHz
Supply voltage	Core: 1.8/2.5/3.3 V ±10%; Output buffers: independently configurable 1.4–3.63 V per VDDO rail
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad
Operating temperature	–40 °C to +85 °C ambient; validated for industrial and telecom line card environments
I²C interface	SMBus-compatible, 100 kHz/400 kHz standard/fast mode; supports ClockBuilder Pro programming

Pinout & Package

SI5338N-B04992-GM uses a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments follow Skyworks' standardized Si5338 pinout layout.

Pin/Terminal	Circuit Role	Design Meaning
IN1/IN2, IN5/IN6	Differential input pairs	Accept 5–710 MHz AC-coupled differential clocks; require external 100 Ω termination
IN3/IN4	Single-ended input pins	Support 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL; VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A/CLK0B – CLK3A/CLK3B	Differential output pairs	Four independent outputs; each pair configurable for LVPECL/LVDS/HCSL/CML/SSTL/HSTL
VDDO0–VDDO3	Output buffer supply rails	Independent 1.4–3.63 V supplies per output bank; enable mixed-voltage system interfacing
VDD	Core supply	1.8/2.5/3.3 V ±10% core power; PSRR optimized for noise-sensitive timing applications
SCL/SDA	I²C serial interface	Standard two-wire bus for register configuration; supports ClockBuilder Pro GUI and field reprogramming
INTR	Interrupt output	Open-drain status indicator for loss-of-lock and loss-of-signal events; active-low assertion
RSVD_GND	Reserved ground	Internal test pin; must be connected to GND per layout guidelines to ensure thermal and EMI performance

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enabling true any-frequency generation with 0 ppm accuracy on all outputs
PCIe Gen 4 SRNS compliance	0.11–0.32 ps RMS jitter in Separate Reference No Spread mode; validated per PCI-SIG Base Spec 4.0 rev 0.5
Per-output voltage control	Each of four output banks (VDDO0–VDDO3) supports independent 1.5/1.8/2.5/3.3 V assignment for mixed-interface systems
Glitchless frequency tuning	Pin-controlled or I²C-based frequency increment/decrement in 1 ppm steps without output interruption
Programmable spread spectrum	Configurable on any output: 0.5–5.0% down-spread, 33–63 kHz modulation rate, 5–350 MHz frequency range
Zero-delay mode support	External feedback path enables synchronous clock distribution with minimal propagation delay skew

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch Synchronization
Use Scenario: High-density 100 GbE/400 GbE switch ASIC requiring four synchronized, low-jitter reference clocks for SerDes lanes and packet processing subsystems. IC Role / Device Role / Timing Role: Quad-output clock generator providing independent PCIe Gen 4-compliant clocks (100 MHz HCSL) with SRNS jitter ≤0.32 ps RMS. Use Value: Eliminates need for four discrete oscillators; reduces board area by >60% and ensures deterministic inter-lane skew <100 ps.	Use Scenario: Carrier-grade Ethernet switch supporting IEEE 1588 PTP grandmaster timing and multi-rate PHY interfaces (1G/10G/25G). IC Role / Device Role / Timing Role: Configurable clock source delivering 125 MHz LVDS for 10GBase-R, 156.25 MHz LVPECL for 25G, and 25 MHz CMOS for management MCU. Use Value: Single-device solution replaces three separate clock ICs; enables precise phase alignment across rates via programmable initial offset (±45 ns).
FPGA-Based Video Processing	Telecom Line Card Clocking
Use Scenario: Broadcast video encoder/decoder platform using Xilinx Ultrascale+ FPGA with multiple clock domains (video pixel, AXI, GTY transceivers). IC Role / Device Role / Timing Role: Any-frequency synthesizer generating 148.5 MHz (HD-SDI), 297 MHz (3G-SDI), 100 MHz (AXI), and 156.25 MHz (GTY) simultaneously. Use Value: Zero-ppm synthesis eliminates frame sync drift; independent phase adjustment (<20 ps step) enables sub-pixel timing calibration.	Use Scenario: Optical line terminal (OLT) with integrated PON MAC, GPON/XGSPON PHY, and control processor requiring strict jitter-constrained clocks. IC Role / Device Role / Timing Role: Low-jitter clock generator supplying 155.52 MHz (OC-3/12), 622.08 MHz (OC-48), 1.25 GHz (XGSPON), and 25 MHz (MCU) with OC-12 compliant jitter ≤1 ps RMS. Use Value: Meets Telcordia GR-1244-CORE jitter limits; spread-spectrum capability reduces EMI in dense line card layouts.

PCIe Gen 4 Switch Timing

Ethernet Switch Synchronization

Use Scenario: High-density 100 GbE/400 GbE switch ASIC requiring four synchronized, low-jitter reference clocks for SerDes lanes and packet processing subsystems.

IC Role / Device Role / Timing Role: Quad-output clock generator providing independent PCIe Gen 4-compliant clocks (100 MHz HCSL) with SRNS jitter ≤0.32 ps RMS.

Use Value: Eliminates need for four discrete oscillators; reduces board area by >60% and ensures deterministic inter-lane skew <100 ps.

Use Scenario: Carrier-grade Ethernet switch supporting IEEE 1588 PTP grandmaster timing and multi-rate PHY interfaces (1G/10G/25G).

IC Role / Device Role / Timing Role: Configurable clock source delivering 125 MHz LVDS for 10GBase-R, 156.25 MHz LVPECL for 25G, and 25 MHz CMOS for management MCU.

Use Value: Single-device solution replaces three separate clock ICs; enables precise phase alignment across rates via programmable initial offset (±45 ns).

FPGA-Based Video Processing

Telecom Line Card Clocking

Use Scenario: Broadcast video encoder/decoder platform using Xilinx Ultrascale+ FPGA with multiple clock domains (video pixel, AXI, GTY transceivers).

IC Role / Device Role / Timing Role: Any-frequency synthesizer generating 148.5 MHz (HD-SDI), 297 MHz (3G-SDI), 100 MHz (AXI), and 156.25 MHz (GTY) simultaneously.

Use Value: Zero-ppm synthesis eliminates frame sync drift; independent phase adjustment (<20 ps step) enables sub-pixel timing calibration.

Use Scenario: Optical line terminal (OLT) with integrated PON MAC, GPON/XGSPON PHY, and control processor requiring strict jitter-constrained clocks.

IC Role / Device Role / Timing Role: Low-jitter clock generator supplying 155.52 MHz (OC-3/12), 622.08 MHz (OC-48), 1.25 GHz (XGSPON), and 25 MHz (MCU) with OC-12 compliant jitter ≤1 ps RMS.

Use Value: Meets Telcordia GR-1244-CORE jitter limits; spread-spectrum capability reduces EMI in dense line card layouts.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06889-GM	Higher integration: 8 outputs, lower jitter (0.35 ps RMS), integrated EEPROM; requires different ClockBuilder configuration flow	Better suited for 8-output systems like multi-port 400G switches; not drop-in due to pin count (32-QFN) and register map changes	Select when >4 outputs or sub-0.5 ps jitter is required; verify PCB land pattern and firmware compatibility
ICS8430I-01T	Fixed-frequency quad LVDS generator (no I²C programming); 1.2 ps RMS jitter; 3.3 V only; no spread spectrum or phase adjust	Limited to static clock trees (e.g., legacy PCIe Gen 2); lacks dynamic reconfiguration and multi-standard support	Choose for cost-sensitive, fixed-configuration designs where programmability is unnecessary and jitter <0.7 ps is not mandatory

Compared with Si5332A-D06889-GM and ICS8430I-01T, SI5338N-B04992-GM uniquely balances full I²C programmability, PCIe Gen 4 SRNS compliance, and 24-QFN compactness-making it optimal for mid-complexity FPGA and switch designs needing field-upgradable timing without footprint expansion.

Availability

SI5338N-B04992-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch synchronization, and FPGA-based video processing requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338N-B04992-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, mobile, infrastructure, and timing solutions with over 30 years of RF and clocking expertise.

The Si5338 product line was designed for high-performance, multi-protocol timing in datacenter, telecom, and broadcast equipment-enabling consolidation of discrete oscillators into a single, software-configurable clock source.

FAQ

What is the maximum output frequency supported by SI5338N-B04992-GM in LVPECL mode?

The SI5338N-B04992-GM supports LVPECL output frequencies up to 710 MHz. This capability is confirmed in Table 6 of the datasheet under "Output Clocks (Differential)" for LVPECL format. Operation above 350 MHz is limited to two unique frequencies simultaneously (Fvco/4 and Fvco/6), and requires proper termination with 100 Ω differential load. The SI5338N-B04992-GM maintains 0.7 ps RMS typical phase jitter even at these high frequencies when driven by a low-noise differential reference.

Does SI5338N-B04992-GM support PCIe Gen 4 Separate Reference No Spread (SRNS) timing requirements?

Yes, SI5338N-B04992-GM is explicitly validated for PCIe Gen 4 SRNS operation, delivering 0.11–0.32 ps RMS jitter (Table 12) under specified conditions: PLL bandwidth of 2–4 MHz or 2–5 MHz and CDR = 10 MHz. This meets the PCI-SIG Base Specification 4.0 rev 0.5 requirement. The SI5338N-B04992-GM achieves this using its dual-stage PLL architecture and low-noise MultiSynth™ synthesis, with jitter measured using the Skyworks PCIe Clock Jitter Tool.

Can SI5338N-B04992-GM generate four different output frequencies simultaneously?

Yes, SI5338N-B04992-GM is designed to synthesize four independent output frequencies simultaneously-each on its own output pair (CLK0A/B through CLK3A/B)-with zero ppm precision using patented MultiSynth™ technology. Each output can be set to any frequency within its supported range (e.g., 100 MHz, 125 MHz, 156.25 MHz, 250 MHz), with independent format, voltage, phase, and spread-spectrum settings. This capability replaces up to four discrete oscillators in a single 4 × 4 mm footprint.

What input reference options does SI5338N-B04992-GM support?

SI5338N-B04992-GM supports four input reference types: (1) external crystal (8–30 MHz), (2) CMOS single-ended (5–200 MHz), (3) SSTL/HSTL single-ended (5–350 MHz), and (4) differential (5–710 MHz on IN1/IN2 or IN5/IN6). Input flexibility allows direct connection to FPGA clocks, network PHYs, or crystal resonators without external level-shifting. The SI5338N-B04992-GM automatically detects input type and configures internal termination accordingly.

Is ClockBuilder Pro software required to configure SI5338N-B04992-GM?

No, ClockBuilder Pro is optional but strongly recommended for SI5338N-B04992-GM configuration. While the device supports direct I²C register writes, ClockBuilder Pro provides GUI-driven setup, jitter optimization, pin assignment validation, and one-click configuration file generation-including OTP programming for pre-programmed units. Skyworks provides ClockBuilder Pro free of charge at skyworksinc.com/en/Application-Pages/Clockbuilder-Pro-Software, and SI5338N-B04992-GM is fully supported in v3.x and later.

SI5338N-B04992-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B04992-GM FAQ

1.How can I place an order for SI5338N-B04992-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B04992-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B04992-GM reliable?

The price and inventory of SI5338N-B04992-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B04992-GM is usually 5 days.

3.What payment methods are accepted for SI5338N-B04992-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B04992-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B04992-GM?

SI5338N-B04992-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B04992-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B04992-GM?

For technical support, including SI5338N-B04992-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B04992-GM requirements.

6.How does Aetrix verify that SI5338N-B04992-GM is sourced from the original manufacturer or authorized distributors?

All SI5338N-B04992-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B04992-GM meets industry standards.

7.What is the process for return or replacement of SI5338N-B04992-GM?

All SI5338N-B04992-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B04992-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B04992-GM part is unused and in its original packaging.

Return procedure for SI5338N-B04992-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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