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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B05025-GMR

Name: SI5338N-B05025-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B05025-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B05025-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B05025-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

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Product details

Overview

SI5338N-B05025-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in high-speed serial interface timing applications such as PCIe root complexes and FPGA-based networking platforms.

For engineers reviewing the SI5338N-B05025-GMR datasheet, SI5338N-B05025-GMR pinout, SI5338N-B05025-GMR application, or SI5338N-B05025-GMR equivalent, key selection considerations include its MultiSynth™ fractional-N synthesis architecture, per-output voltage selection (1.5/1.8/2.5/3.3 V), independent phase/frequency adjustment (±45 ns / 1 ppm steps), and support for differential input frequencies up to 710 MHz.

Technical Context

The SI5338N-B05025-GMR implements a two-stage PLL architecture: a high-stability reference stage (with crystal or external clock input) followed by four independent MultiSynth™ fractional-N synthesis blocks, each feeding a configurable output driver. Its synthesis resolution is 1 ppb, enabling true zero-ppm frequency accuracy on all outputs.

Each output supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats with programmable drive strength, slew rate control, and independent supply voltage (VDDOx). The device includes loss-of-lock and loss-of-signal alarms, I²C/SMBus interface, and external feedback mode for zero-delay operation.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps - meets PCIe Gen 4 common clock jitter requirement (≤0.45 ps RMS) when configured per spec
Output Count & Type	4 differential outputs (CLK0A/B–CLK3A/B) - supports simultaneous LVPECL, LVDS, HCSL, or CMOS formats
Frequency Range	0.16–710 MHz - covers PCIe 100 MHz, Ethernet 125 MHz, Fibre Channel 1.0625 GHz (via Fvco/4), and broadcast video rates
Input Flexibility	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) - enables reuse of existing reference sources
Supply Voltages	VDD = 1.8/2.5/3.3 V; VDDOx = 1.5/1.8/2.5/3.3 V - allows mixed-voltage system integration without level shifters
Operating Temp	–40 to +85 °C - qualified for industrial and telecom line card environments
Package	24-QFN, 4 × 4 mm - space-constrained PCBs with thermal resistance θJA = 37 °C/W

Pinout & Package

The SI5338N-B05025-GMR is housed in a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin 1 is top-left corner (IN1), and pin 24 is bottom-right (GND). The package supports reflow per JEDEC J-STD-020 and has θJC = 10 °C/W.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential clock inputs	Accept AC-coupled 5–710 MHz differential clocks; require external 100 Ω termination
IN3, IN4	Single-ended clock inputs	Support CMOS/SSTL/HSTL at 5–350 MHz; VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A–CLK3B	Differential output pairs	Four independent output drivers; each pair (e.g., CLK0A/CLK0B) delivers complementary signals
VDDO0–VDDO3	Per-output buffer supplies	Enable independent voltage setting (1.5/1.8/2.5/3.3 V) per output bank for mixed-interface systems
VDD	Core supply	Single 1.8/2.5/3.3 V supply powers PLL, logic, and memory; IDD = 45 mA typ @ 100 MHz outputs
SCL, SDA	I²C interface	Standard SMBus-compatible 100 kHz / 400 kHz interface; supports write-only programming and status reads
INTR	Interrupt output	Open-drain alarm signal indicating loss-of-lock or loss-of-signal; requires external pull-up
GND, RSVD_GND	Ground connections	Eight GND pins including dedicated thermal pad connection; critical for jitter performance and thermal dissipation

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enable any-frequency generation (0.16–710 MHz) with 1 ppb resolution and 0 ppm error
PCIe Gen 3 SRNS compliance	Meets <0.32 ps RMS jitter requirement under SRNS conditions (PLL BW 2–5 MHz, CDR = 10 MHz)
Independent phase adjustment	±45 ns range in <20 ps steps per output - enables precise skew alignment across multi-lane interfaces like PCIe or DDR
Spread spectrum clocking	Configurable SSC on any output: 0.5–5.0% spread, 33–63 kHz modulation rate - reduces EMI without affecting timing margins
Glitchless frequency tuning	1 ppm increment/decrement via PINC/FDEC pins - enables real-time clock rate adaptation without output interruption

Applications

PCIe Gen 4 Root Complex Timing	Ethernet Switch Clock Distribution
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 endpoints and switch fabric in a 1U server motherboard. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter, phase-aligned clocks with independent voltage control for mixed-voltage SerDes lanes. Use Value: Eliminates four discrete oscillators; achieves 0.15–0.45 ps RMS jitter per PCIe Gen 4 spec using internal PLL with 2–5 MHz bandwidth.	Use Scenario: Driving 125 MHz clocks to eight 10GbE PHYs and a central packet processor in a Layer 3 switch ASIC design. IC Role / Device Role / Timing Role: Configurable clock buffer and translator generating eight single-ended CMOS clocks (125 MHz) from one 25 MHz crystal input. Use Value: Reduces BOM count by replacing multiple fanout buffers; supports per-output voltage (1.8 V/2.5 V) matching PHY requirements.
Broadcast Video Sync Generator	FPGA-Based Telecom Line Card
Use Scenario: Generating SMPTE ST 2082 (27 Gbps) pixel clock (13.5 GHz ÷ 4 = 3.375 GHz → Fvco/4 = 3.375 GHz) and ancillary sync signals for 4K/8K video processing. IC Role / Device Role / Timing Role: High-frequency clock synthesizer producing integer-related outputs (13.5 MHz, 27 MHz, 74.25 MHz, 148.5 MHz) from a 27 MHz crystal. Use Value: Enables exact zero-ppm frequency synthesis across all video timing domains; supports LVDS and HCSL outputs for different serializer ICs.	Use Scenario: Providing 155.52 MHz (OC-3), 622.08 MHz (OC-12), and 2.488 GHz (OC-48) clocks to SONET framer, DSP, and optical transceiver in a modular line card. IC Role / Device Role / Timing Role: Frequency translator converting a 19.44 MHz OC-3 reference into multiple synchronous telecom rates using MultiSynth™ integer mode. Use Value: Achieves 0.7 ps RMS OC-12 random jitter; supports loss-of-signal detection for automatic failover in carrier-grade systems.

PCIe Gen 4 Root Complex Timing

Ethernet Switch Clock Distribution

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 endpoints and switch fabric in a 1U server motherboard.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter, phase-aligned clocks with independent voltage control for mixed-voltage SerDes lanes.

Use Value: Eliminates four discrete oscillators; achieves 0.15–0.45 ps RMS jitter per PCIe Gen 4 spec using internal PLL with 2–5 MHz bandwidth.

Use Scenario: Driving 125 MHz clocks to eight 10GbE PHYs and a central packet processor in a Layer 3 switch ASIC design.

IC Role / Device Role / Timing Role: Configurable clock buffer and translator generating eight single-ended CMOS clocks (125 MHz) from one 25 MHz crystal input.

Use Value: Reduces BOM count by replacing multiple fanout buffers; supports per-output voltage (1.8 V/2.5 V) matching PHY requirements.

Broadcast Video Sync Generator

FPGA-Based Telecom Line Card

Use Scenario: Generating SMPTE ST 2082 (27 Gbps) pixel clock (13.5 GHz ÷ 4 = 3.375 GHz → Fvco/4 = 3.375 GHz) and ancillary sync signals for 4K/8K video processing.

IC Role / Device Role / Timing Role: High-frequency clock synthesizer producing integer-related outputs (13.5 MHz, 27 MHz, 74.25 MHz, 148.5 MHz) from a 27 MHz crystal.

Use Value: Enables exact zero-ppm frequency synthesis across all video timing domains; supports LVDS and HCSL outputs for different serializer ICs.

Use Scenario: Providing 155.52 MHz (OC-3), 622.08 MHz (OC-12), and 2.488 GHz (OC-48) clocks to SONET framer, DSP, and optical transceiver in a modular line card.

IC Role / Device Role / Timing Role: Frequency translator converting a 19.44 MHz OC-3 reference into multiple synchronous telecom rates using MultiSynth™ integer mode.

Use Value: Achieves 0.7 ps RMS OC-12 random jitter; supports loss-of-signal detection for automatic failover in carrier-grade systems.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05085-GM	Higher integration: 8 outputs, integrated EEPROM, lower jitter (0.35 ps RMS), supports JESD204B deterministic latency	Targeted at JESD204B ADC/DAC timing and multi-core processor SoCs requiring >4 clocks	Select when >4 outputs or sub-0.4 ps jitter required; not pin-compatible
ICS8430I-01T	Fixed-frequency 4-output LVDS generator; no I²C programming; 1.2 ps RMS jitter; 3.3 V only	Cost-sensitive, static-clock applications where frequency flexibility is unnecessary	Select for fixed 100/125/156.25 MHz systems with no need for field reconfiguration

Compared with Si5332A-D05085-GM and ICS8430I-01T, the SI5338N-B05025-GMR uniquely balances programmability, jitter performance, and industrial temperature support in a compact 4×4 mm QFN - making it optimal for PCIe Gen 4, telecom, and broadcast video designs requiring field-adjustable timing.

Availability

SI5338N-B05025-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 timing, Ethernet switch clock distribution, and broadcast video synchronization requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338N-B05025-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line was designed for high-performance, software-configurable clock generation in datacenter, telecom, and broadcast infrastructure - emphasizing low jitter, multi-format output flexibility, and robust operation across extended temperature ranges.

FAQ

What is the maximum differential input frequency supported by the SI5338N-B05025-GMR?

The SI5338N-B05025-GMR supports differential input frequencies up to 710 MHz on pins IN1/IN2 and IN5/IN6. This capability enables direct use of high-speed reference clocks from SerDes receivers or optical modules without external division. The device maintains 0.7 ps RMS jitter performance at these frequencies when using low-noise differential inputs with slew rates >0.3 V/ns.

Does the SI5338N-B05025-GMR support PCIe Gen 4 Common Clock compliance?

Yes, the SI5338N-B05025-GMR meets PCIe Gen 4 Common Clock jitter specifications with ≤0.45 ps RMS (10 kHz–50 MHz) when configured per Skyworks AN562 guidelines - including PLL bandwidth of 2–5 MHz and proper layout practices. Measured data shows 0.15–0.45 ps RMS across operating conditions, satisfying PCI-SIG Base Spec 4.0 rev 0.5 requirements.

Can the SI5338N-B05025-GMR generate four different output frequencies simultaneously?

Yes, the SI5338N-B05025-GMR uses four independent MultiSynth™ engines to synthesize four distinct frequencies simultaneously - for example, 100 MHz (PCIe), 125 MHz (Ethernet), 156.25 MHz (CPRI), and 200 MHz (FPGA logic) - all with 0 ppm error and independent format/voltage control. Each output can be set to LVPECL, LVDS, HCSL, CMOS, SSTL, or HSTL.

What is the purpose of the INTR pin on the SI5338N-B05025-GMR?

The INTR pin on the SI5338N-B05025-GMR is an open-drain interrupt output that asserts low during loss-of-lock (LOL) or loss-of-signal (LOS) events. It enables system-level fault monitoring without polling I²C registers. The pin requires an external pull-up resistor and supports standard SMBus timing; assertion duration is ≥5 ms for LOL and ≥2.6 µs for LOS detection.

How is configuration performed for the SI5338N-B05025-GMR?

Configuration of the SI5338N-B05025-GMR is performed via its I²C/SMBus-compatible serial interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software. The tool generates register maps, validates configurations against jitter and power constraints, and supports one-time OTP programming or volatile RAM loading. No external microcontroller is required for basic setup.

SI5338N-B05025-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B05025-GMR FAQ

1.How can I place an order for SI5338N-B05025-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B05025-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B05025-GMR reliable?

The price and inventory of SI5338N-B05025-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B05025-GMR is usually 5 days.

3.What payment methods are accepted for SI5338N-B05025-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B05025-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B05025-GMR?

SI5338N-B05025-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B05025-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B05025-GMR?

For technical support, including SI5338N-B05025-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B05025-GMR requirements.

6.How does Aetrix verify that SI5338N-B05025-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338N-B05025-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B05025-GMR meets industry standards.

7.What is the process for return or replacement of SI5338N-B05025-GMR?

All SI5338N-B05025-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B05025-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B05025-GMR part is unused and in its original packaging.

Return procedure for SI5338N-B05025-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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