Skyworks Solutions Inc. SI5338N-B05026-GM
- Part No.:
- SI5338N-B05026-GM
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Application Specific Clock/Timing
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
SI5338N-B05026-GM.pdf
- Description:
- I2C CONTROL, 4-OUTPUT, ANY FREQU
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI5338N-B05026-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.
For engineers reviewing the SI5338N-B05026-GM datasheet, SI5338N-B05026-GM pinout, SI5338N-B05026-GM application, or SI5338N-B05026-GM equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage control (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and I²C/SMBus programmability with ClockBuilder Pro support.
Technical Context
The SI5338N-B05026-GM implements a two-stage PLL architecture: a high-stability reference stage (with crystal or external clock input) feeding a fractional-N MultiSynth™ synthesis stage per output. Each of the four outputs features independent R, M, and P dividers enabling integer or fractional frequency synthesis with true zero-ppm accuracy.
It supports flexible input references - including 8–30 MHz crystals, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, and 5–710 MHz differential inputs - and offers independent output format selection (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), phase adjustment (<20 ps steps), and glitchless frequency increment/decrement (1 ppm steps).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output count & type | 4 independent outputs; configurable as differential (LVPECL/LVDS/HCSL/CML) or single-ended (CMOS/SSTL/HSTL) |
| Frequency range per output | 0.16–710 MHz (LVPECL/LVDS); 0.16–250 MHz (HCSL); 0.16–200 MHz (CMOS); 0.16–350 MHz (SSTL/HSTL) |
| Phase jitter (RMS) | 0.7 ps typical (12 kHz–20 MHz), meeting PCIe Gen 3 SRNS and Gen 4 Common Clock specs |
| Supply voltages | Core: 1.8/2.5/3.3 V ± tolerance; Output buffers: independently selectable 1.5/1.8/2.5/3.3 V per driver |
| Input reference options | 8–30 MHz crystal; 5–200 MHz CMOS; 5–350 MHz SSTL/HSTL; 5–710 MHz differential (IN1/IN2/IN5/IN6) |
| Package | 24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad |
| Operating temperature | –40 to +85 °C ambient, qualified for industrial and telecom line card environments |
Pinout & Package
SI5338N-B05026-GM uses a 24-pin QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1, IN2 | Differential input pair #1 | Accepts 5–710 MHz AC-coupled differential clocks; internal 100 Ω termination enabled |
| IN3, IN4 | Single-ended input pair | Supports 5–200 MHz CMOS-level clocks; configurable as primary or secondary reference |
| IN5, IN6 | Differential input pair #2 | Second 5–710 MHz differential input path; enables dual-reference redundancy or frequency translation |
| CLK0A, CLK0B to CLK3A, CLK3B | Differential output pairs | Four fully independent outputs; each supports LVPECL/LVDS/HCSL/CML with programmable swing and common-mode |
| VDDO0–VDDO3 | Output buffer supply pins | Independent 1.5/1.8/2.5/3.3 V supplies per output bank; decoupling required per pin |
| SCL, SDA | I²C/SMBus interface | Standard 100/400 kHz operation; supports ClockBuilder Pro configuration and runtime reprogramming |
| INTR | Interrupt output | Open-drain status indicator for loss-of-lock (LOL) and loss-of-signal (LOS) events |
| VDD | Core supply | Single 1.8/2.5/3.3 V core supply; PSRR optimized for low-noise clock generation |
| GND, RSVD_GND | Ground connections | Multiple GND pins including dedicated reserved ground for noise isolation; thermal pad must be soldered |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth™ synthesis engine | Enables independent, any-frequency output generation (0.16–710 MHz) with true zero-ppm accuracy on all four outputs |
| PCIe Gen 1–4 timing compliance | Fully meets PCIe Gen 3 SRNS and Gen 4 Common Clock jitter requirements (≤0.45 ps RMS) without external filtering |
| Independent output voltage per driver | Each output bank (VDDO0–VDDO3) supports 1.5/1.8/2.5/3.3 V selection - critical for mixed-voltage FPGA/ASIC interfaces |
| Glitchless frequency tuning | Hardware-supported frequency increment/decrement (1 ppm steps) with ≤667 ns update time for real-time dynamic clock scaling |
| Programmable spread spectrum | Configurable down-spread (0.5–5.0%) and modulation rate (33–63 kHz) on any output to reduce EMI in dense PCB layouts |
| External feedback mode | Enables zero-delay operation by routing CLKOUT back to feedback input - essential for synchronous clock distribution trees |
Applications
| PCIe Gen 4 Switch Timing | Ethernet Switch/Routing |
|---|---|
Use Scenario: High-density 32-lane PCIe Gen 4 switch ASIC requiring four synchronized, low-jitter reference clocks for SerDes lanes and management logic. IC Role / Device Role / Timing Role: Quad clock generator providing independent 100 MHz HCSL (SerDes), 25 MHz LVDS (management), 125 MHz LVDS (PHY), and 156.25 MHz LVDS (control plane) with <0.45 ps RMS jitter. Use Value: Eliminates four discrete oscillators while meeting PCIe Gen 4 Common Clock jitter spec and enabling per-lane clock margining via I²C. |
Use Scenario: 10 GbE/25 GbE line card with multi-port Ethernet PHYs needing precise, scalable clocking for IEEE 1588 PTP synchronization and packet processing. IC Role / Device Role / Timing Role: Configurable clock source delivering 156.25 MHz (XAUI), 312.5 MHz (XFI), 125 MHz (GMII), and 25 MHz (management) with sub-1 ps RMS jitter and programmable phase alignment. Use Value: Enables deterministic latency control across ports and supports IEEE 1588 timestamp accuracy through independent phase offset tuning (<20 ps resolution). |
| Broadcast Video Timing | Processor & FPGA Clocking |
Use Scenario: SMPTE ST 2082/ST 2110 broadcast video router requiring ultra-low-jitter, multi-frequency clocking for 12G-SDI, HDMI 2.1, and audio sample rate conversion. IC Role / Device Role / Timing Role: Any-frequency synthesizer generating 297 MHz (12G-SDI), 594 MHz (HDMI 2.1 TMDS), 48 kHz audio master (24.576 MHz), and 10 MHz reference with <0.7 ps RMS jitter and zero-ppm accuracy. Use Value: Replaces multiple crystal oscillators and eliminates frequency translation ICs while maintaining broadcast-grade jitter performance across all domains. |
Use Scenario: Heterogeneous compute platform with ARM SoC, Xilinx FPGA, and DDR4 memory subsystem requiring coordinated clock domains at different voltages and frequencies. IC Role / Device Role / Timing Role: Centralized timing hub supplying 1 GHz (FPGA fabric), 500 MHz (ARM AXI), 1333 MHz DDR4 (single-ended CMOS), and 100 MHz (SoC debug) with independent VDDO per output. Use Value: Simplifies power domain partitioning and reduces board area by consolidating clock sources while supporting mixed-signal integrity via per-output voltage and format control. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5338A-B-GM | Factory-programmed variant with preloaded configuration; lacks field-programmable OTP/NVM flexibility of SI5338N-B05026-GM | Best for high-volume, fixed-clock designs where reconfiguration is unnecessary | Select SI5338N-B05026-GM when design requires post-silicon I²C reprogramming or multi-config support via ClockBuilder Pro |
| LMK04832ISQE/NOPB | Two PLLs with JESD204B support; higher power (120 mA typ), larger 48-QFN package; no integrated crystal drive | Targeted at RF/data converter timing with deterministic latency; not optimized for PCIe Gen 4 jitter | Choose SI5338N-B05026-GM for space-constrained, low-jitter PCIe/Ethernet applications; LMK04832 for JESD204B-compliant ADC/DAC clocking |
Compared with Si5338A-B-GM, SI5338N-B05026-GM provides full field programmability and dynamic tuning; versus LMK04832, it delivers lower jitter in PCIe-optimized configurations, smaller footprint, and integrated crystal support - making it superior for embedded switch/router and broadcast timing where size and jitter are critical.
Availability
SI5338N-B05026-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching/routing, and broadcast video timing applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for SI5338N-B05026-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog ICs for infrastructure and mobile markets.
The Si5338 product line was designed for high-performance, multi-protocol clock generation in data center, telecom, and broadcast systems - emphasizing low jitter, software configurability, and integration of up to four timing functions in one compact package.
FAQ
What is the default factory configuration of the SI5338N-B05026-GM?
The SI5338N-B05026-GM ships with blank OTP memory and requires initial programming via I²C using ClockBuilder Pro or custom firmware. Unlike factory-programmed variants (e.g., Si5338A-B-GM), it contains no preloaded configuration - enabling full flexibility for end-user-defined frequency plans, output formats, and spread-spectrum settings at system integration.
Does the SI5338N-B05026-GM support PCIe Gen 4 Common Clock compliance out of the box?
Yes, the SI5338N-B05026-GM meets PCIe Gen 4 Common Clock jitter specifications (≤0.45 ps RMS, 10 kHz–50 MHz) when configured with appropriate loop bandwidth (2–4 MHz), HCSL outputs at 100 MHz, and a low-noise differential reference. Its datasheet specifies this performance under standard test conditions, and Skyworks provides validated ClockBuilder Pro profiles for immediate Gen 4 deployment.
Can the SI5338N-B05026-GM generate two outputs above 350 MHz simultaneously?
Yes, but only two unique frequencies above 350 MHz may be generated simultaneously - specifically Fvco/4 and Fvco/6 - due to VCO frequency constraints. For example, with a 2.8 GHz VCO, outputs can be set to 700 MHz (Fvco/4) and 466.67 MHz (Fvco/6). All other outputs must remain ≤350 MHz or use integer-related harmonics within that limit.
How does the SI5338N-B05026-GM handle loss-of-signal detection?
The SI5338N-B05026-GM monitors all six input pins (IN1–IN6) for loss-of-signal (LOS) with detection times of 2.6–5 µs and release times of 0.01–1 µs. Detected events assert the open-drain INTR pin and are accessible via I²C register reads (0x000D[7:6]), enabling host microcontroller response or automatic failover to a backup reference without external circuitry.
Is external crystal load capacitance adjustment required for the SI5338N-B05026-GM?
Yes - the SI5338N-B05026-GM supports on-chip crystal load capacitance of 11–13 pF, but Skyworks recommends 17–19 pF for optimal stability. Users must adjust internal registers (per AN360) to match their selected crystal's specified load capacitance; failure to do so may cause start-up failure or frequency inaccuracy beyond ±50 ppm.
SI5338N-B05026-GM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- MultiSynth™
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- PLL:
- -
- Main Purpose:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
SI5338N-B05026-GM FAQ
1.How can I place an order for SI5338N-B05026-GM through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5338N-B05026-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5338N-B05026-GM reliable?
The price and inventory of SI5338N-B05026-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B05026-GM is usually 5 days.
3.What payment methods are accepted for SI5338N-B05026-GM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B05026-GM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5338N-B05026-GM?
SI5338N-B05026-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5338N-B05026-GM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5338N-B05026-GM?
For technical support, including SI5338N-B05026-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B05026-GM requirements.
6.How does Aetrix verify that SI5338N-B05026-GM is sourced from the original manufacturer or authorized distributors?
All SI5338N-B05026-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B05026-GM meets industry standards.
7.What is the process for return or replacement of SI5338N-B05026-GM?
All SI5338N-B05026-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B05026-GM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5338N-B05026-GM part is unused and in its original packaging.
Return procedure for SI5338N-B05026-GM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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