Skyworks Solutions Inc. SI5338N-B05182-GM

Overview

SI5338N-B05182-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338N-B05182-GM datasheet, SI5338N-B05182-GM pinout, SI5338N-B05182-GM application, or SI5338N-B05182-GM equivalent, key selection criteria include PCIe Gen 4 jitter compliance (0.15–0.45 ps RMS), independent output voltage per driver (1.5/1.8/2.5/3.3 V), MultiSynth™ fractional synthesis resolution (1 ppb), spread-spectrum control (0.5–5.0% deviation), and loss-of-lock/loss-of-signal alarm functionality.

Technical Context

The SI5338N-B05182-GM implements a two-stage PLL architecture: a high-stability input stage with programmable R-divider followed by four independent MultiSynth™ synthesis blocks (M0–M3), each driving one output pair. Each MultiSynth supports integer or fractional-N synthesis with <20 ps phase step accuracy and 1 ppm frequency increment/decrement capability.

It accepts flexible reference inputs-including 8–30 MHz crystals, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, and 5–710 MHz differential-and delivers output frequencies from 0.16 MHz to 710 MHz across LVPECL, LVDS, HCSL, CML, CMOS, SSTL, and HSTL formats, with independent VDDO per output bank (1.4–3.63 V).

Key Specifications

Pinout & Package

SI5338N-B05182-GM is housed in a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Compared with SI5338N-B05182-GM, the Si5332A offers superior jitter and channel count but requires PCB redesign and firmware updates, while the ICS853S01AG provides lower cost and power at the expense of programmability and precision timing control.

Availability

SI5338N-B05182-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching/routing, and broadcast video timing applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338N-B05182-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and industrial markets.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces-including PCIe, Ethernet, and Fibre Channel-enabling flexible, space-efficient timing architectures in next-generation networking and computing platforms.

FAQ

What is the maximum output frequency supported by the SI5338N-B05182-GM?

The SI5338N-B05182-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs and 350 MHz on SSTL/HSTL outputs. For frequencies above 350 MHz, only two unique outputs may operate simultaneously-at Fvco/4 and Fvco/6-per the device's MultiSynth architecture. All outputs maintain 0.7 ps RMS typical jitter within their rated ranges.

Does the SI5338N-B05182-GM support PCIe Gen 4 Common Clock mode?

Yes, the SI5338N-B05182-GM is explicitly compliant with PCIe Gen 4 Common Clock mode, delivering 0.15–0.45 ps RMS jitter (12 kHz–20 MHz) when configured per the PCIe Base Specification 4.0 rev 0.5. This is verified using the Skyworks PCIe Clock Jitter Tool and Intel Clock Jitter Tool v1.6.4 with 100 MHz HCSL outputs.

Can the SI5338N-B05182-GM generate different output voltages on each channel?

Yes, the SI5338N-B05182-GM provides independent VDDOx rails (VDDO0–VDDO3) for each output bank, allowing individual configuration of 1.5 V, 1.8 V, 2.5 V, or 3.3 V per driver. This enables mixed-signal systems-such as FPGA+PHY designs-to drive LVDS, HCSL, and CMOS loads from a single SI5338N-B05182-GM without level-shifting components.

How is the SI5338N-B05182-GM programmed, and is external memory required?

The SI5338N-B05182-GM is programmed via its I²C/SMBus interface using Skyworks' ClockBuilder Pro software, which generates configuration files and supports in-system programming. It contains on-chip OTP NVM, so no external EEPROM or flash is needed for factory-programmed devices. Pre-programmed units ship with valid configuration and begin operating within 2 ms of power-on.

What reference inputs does the SI5338N-B05182-GM accept?

The SI5338N-B05182-GM accepts four reference input types: (1) 8–30 MHz fundamental-mode crystals on IN1/IN2, (2) 5–200 MHz CMOS clocks on IN3/IN4, (3) 5–350 MHz SSTL/HSTL signals on IN3/IN4, and (4) 5–710 MHz differential AC-coupled clocks on IN1/IN2, IN5/IN6. All inputs support automatic loss-of-signal detection with configurable release timing.