Skyworks Solutions Inc. SI5338N-B05316-GMR
- Part No.:
- SI5338N-B05316-GMR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Application Specific Clock/Timing
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
SI5338N-B05316-GMR.pdf
- Description:
- I2C CONTROL, 4-OUTPUT, ANY FREQU
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI5338N-B05316-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 and SRNS compliance, and MultiSynth™ frequency synthesis supporting 0.16–710 MHz output ranges across LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats. It replaces up to four crystal oscillators in high-speed serial interface timing applications.
For engineers reviewing the SI5338N-B05316-GMR datasheet, SI5338N-B05316-GMR pinout, SI5338N-B05316-GMR application, or SI5338N-B05316-GMR equivalent, key selection criteria include PCIe Gen 4 common-clock jitter (0.15–0.45 ps RMS), independent per-output voltage control (1.5/1.8/2.5/3.3 V), 4×4 mm 24-QFN package, and I²C/SMBus programmability with ClockBuilder Pro support.
Technical Context
The SI5338N-B05316-GMR implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers, each driving one output pair (CLKxA/CLKxB). Each synthesizer supports integer or fractional mode operation with ≤1 ppb frequency resolution and <20 ps programmable phase step accuracy.
Input flexibility includes external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) references. Output drivers are fully decoupled-each supports independent format, voltage, spread-spectrum modulation (0.5–5.0% at 33–63 kHz), and glitchless frequency increment/decrement in 1 ppm steps.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Phase Jitter (RMS) | 0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 4 common-clock spec (≤0.45 ps RMS). |
| Output Frequency Range | 0.16–710 MHz per channel; supports simultaneous dual >350 MHz outputs (Fvco/4 & Fvco/6). |
| Input Reference Support | Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz). |
| Output Formats | LVPECL, LVDS, HCSL, CML, CMOS, SSTL, HSTL - each output independently selectable. |
| Supply Voltages | Core: 1.8/2.5/3.3 V; Output buffers: 1.5/1.8/2.5/3.3 V per driver - enables mixed-voltage system interfacing. |
| Package | 24-pin QFN, 4 × 4 mm, 0.5 mm pitch - space-efficient for dense PCB layouts. |
| Temperature Range | –40 °C to +85 °C - qualified for industrial and telecom line-card environments. |
Pinout & Package
SI5338N-B05316-GMR uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments follow standard Si5338 top-view layout: IN1/IN2 (diff input 1), IN3/IN4 (SE inputs), IN5/IN6 (diff input 2), CLK0A/CLK0B through CLK3A/CLK3B (four differential output pairs), VDDO0–VDDO3 (independent output supply pins), VDD (core supply), SCL/SDA (I²C interface), INTR (interrupt output), and GND/RSVD_GND.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CLK0A / CLK0B | Differential Output Pair 0 | LVPECL/LVDS/HCSL/CML-capable; independently configured frequency, format, and VDDO0 voltage. |
| CLK1A / CLK1B | Differential Output Pair 1 | Same configurability as CLK0; supports phase offset <±45 ns and glitchless 1 ppm frequency adjustment. |
| CLK2A / CLK2B | Differential Output Pair 2 | Configurable for PCIe Gen 4 100 MHz HCSL or broadcast video 27 MHz LVDS with <100 ps skew vs other outputs. |
| CLK3A / CLK3B | Differential Output Pair 3 | Supports up to 710 MHz LVPECL; usable for Fibre Channel 1.0625 GHz (×1.5 divider) or 10 GbE reference clocks. |
| SCL / SDA | I²C Serial Interface | Standard SMBus-compatible bus (up to 400 kHz); used with ClockBuilder Pro for nonvolatile configuration storage. |
| INTR | Interrupt Output | Open-drain status signal indicating loss-of-lock or loss-of-signal on any input or output path. |
| VDDO0–VDDO3 | Per-Output Supply Pins | Enable independent voltage setting per output driver (1.5/1.8/2.5/3.3 V) - eliminates level-shifter ICs in multi-rail systems. |
| IN1/IN2, IN5/IN6 | Differential Reference Inputs | Accept 5–710 MHz AC-coupled signals; internal 10 kΩ termination and 3.5 pF capacitance optimize jitter performance. |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth™ Synthesis | Four independent fractional-N synthesizers enable true zero-ppm frequency accuracy on all outputs without external crystals. |
| PCIe Gen 4 Compliance | Meets Common Clock jitter spec (0.15–0.45 ps RMS) and SRNS requirements - validated with Intel Clock Jitter Tool. |
| Independent Output Control | Each of four output pairs supports separate format, voltage, spread-spectrum, phase offset, and frequency increment/decrement settings. |
| Flexible Input Architecture | Supports six reference types (crystal, CMOS, SSTL, HSTL, diff LVDS, diff LVPECL) - simplifies migration across platform generations. |
| Low-Power Operation | 45 mA typical core current at 100 MHz outputs; buffer-mode current drops to 12 mA - reduces thermal load in fanless systems. |
Applications
| Ethernet Switch/Routing | PCIe Gen 1–4 Timing |
|---|---|
Use Scenario: 10 GbE/25 GbE switch fabric requiring synchronized 156.25 MHz and 312.5 MHz clocks across multiple PHYs and MACs. IC Role / Device Role / Timing Role: Quad clock generator providing four low-jitter, phase-aligned outputs - two for SerDes lanes, one for management CPU, one for packet buffer controller. Use Value: Eliminates four discrete oscillators and associated layout complexity while maintaining <100 ps inter-output skew and PCIe Gen 4 jitter compliance. | Use Scenario: Server motherboard with dual x16 PCIe Gen 4 slots, NVMe SSDs, and integrated GPU requiring common-reference clocks. IC Role / Device Role / Timing Role: Primary PCIe clock source delivering 100 MHz HCSL to root complex, switches, and endpoints with SRNS-compliant jitter profile. Use Value: Single-device solution meets PCIe Gen 4 total jitter limit (≤33.6 ps pk-pk) and enables shared reference architecture without external jitter cleaners. |
| Broadcast Video/Audio Timing | Processor & FPGA Clocking |
Use Scenario: 4K/8K video encoder board needing SMPTE 2082 (27 MHz), AES3 (48 kHz derived), and HDMI TMDS (297 MHz) clocks from one reference. IC Role / Device Role / Timing Role: Any-frequency clock synthesizer generating exact broadcast-standard frequencies with sub-ppm accuracy and <0.7 ps RMS jitter. Use Value: Replaces crystal bank + PLL chips; supports frame-accurate genlock via programmable phase offset and loss-of-signal detection. | Use Scenario: Xilinx Kria KV260 vision AI starter kit requiring 100 MHz PS clock, 200 MHz PL clock, 333 MHz DDR4 interface clock, and 125 MHz Ethernet PHY clock. IC Role / Device Role / Timing Role: Configurable clock source for heterogeneous SoC/FPGA platforms with mixed-voltage I/O banks and strict skew budgets. Use Value: Per-output VDDO pins allow direct connection to 1.8 V FPGA I/O, 1.2 V PS domain, and 2.5 V DDR4 - no level shifters required. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5332A-D05316-GM | Higher integration: 8 outputs, lower jitter (0.35 ps RMS), supports JESD204B deterministic latency; requires different programming flow. | Targeted at JESD204B ADC/DAC synchronization and 5G wireless infrastructure - over-spec for PCIe Gen 4 switching. | Select when >4 outputs or sub-0.4 ps jitter is required; not drop-in due to pin count (40-QFN) and register map differences. |
| ICS8430I-01T | Fixed-frequency quad LVDS generator (no I²C programming); 1.2 ps RMS jitter; 3.3 V only; no spread spectrum or phase control. | Limited to static clock trees in cost-sensitive industrial controllers where frequency agility is unnecessary. | Choose for simple, low-cost replacement of four fixed-frequency oscillators - lacks SI5338N-B05316-GMR's programmability and PCIe Gen 4 compliance. |
Compared with Si5332A-D05316-GM and ICS8430I-01T, SI5338N-B05316-GMR uniquely balances PCIe Gen 4 jitter performance, I²C configurability, and 24-pin QFN footprint - making it optimal for mid-range server, networking, and broadcast equipment where design flexibility and BOM consolidation are prioritized over ultra-low jitter or maximum output count.
Availability
SI5338N-B05316-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 server motherboards, 10/25 GbE switch fabrics, broadcast video encoders, and FPGA-based edge AI platforms requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for SI5338N-B05316-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and power management solutions for communications infrastructure, automotive, and industrial markets.
The Si5338 product line was designed specifically for high-performance, software-configurable clock generation in data center, telecom, and broadcast systems - emphasizing jitter performance, multi-protocol compatibility (PCIe, Ethernet, CPRI), and field-upgradable timing architectures.
FAQ
What is the primary function of the SI5338N-B05316-GMR in a PCIe Gen 4 system?
The SI5338N-B05316-GMR serves as a common-reference clock generator delivering 100 MHz HCSL to PCIe Gen 4 root complexes, switches, and endpoints. Its 0.15–0.45 ps RMS jitter meets the PCIe Base Specification 4.0 common-clock requirement, and its SRNS compliance ensures robust operation under spread-spectrum conditions. SI5338N-B05316-GMR achieves this using a dedicated PLL bandwidth setting (2–5 MHz) and validated measurement methodology with the Skyworks PCIe Clock Jitter Tool.
Does the SI5338N-B05316-GMR support crystal oscillator replacement without external components?
Yes. The SI5338N-B05316-GMR integrates on-chip crystal load capacitance (11–13 pF) and supports 8–30 MHz fundamental-mode crystals directly on IN1/IN2 pins. No external capacitors or pull-up resistors are required. Crystal drive level is limited to 100 µW, and ESR must be ≤300 Ω (for 8–11 MHz) to ensure reliable start-up - verified per AN360 crystal selection guidelines.
How many independent output voltages can be configured on the SI5338N-B05316-GMR?
The SI5338N-B05316-GMR supports four independent output supply voltages via VDDO0, VDDO1, VDDO2, and VDDO3 pins. Each can be set to 1.5 V, 1.8 V, 2.5 V, or 3.3 V, enabling direct interface to mixed-voltage devices such as 1.8 V FPGAs, 2.5 V DDR3 controllers, and 3.3 V legacy peripherals - eliminating external level shifters in the clock path.
Can the SI5338N-B05316-GMR generate frequencies above 350 MHz on all four outputs simultaneously?
No. The SI5338N-B05316-GMR supports only two unique frequencies above 350 MHz simultaneously - specifically Fvco/4 and Fvco/6 - due to VCO frequency constraints. Higher frequencies (e.g., 710 MHz LVPECL) are achievable on individual outputs but require other outputs to operate below 350 MHz. This limitation is documented in Section 3.3 (Synthesis Stages) and Table 6 of the datasheet.
What software tools are officially supported for configuring the SI5338N-B05316-GMR?
Skyworks ClockBuilder Pro is the official GUI-based configuration tool for the SI5338N-B05316-GMR. It enables full register-level programming, jitter simulation, spread-spectrum setup, and nonvolatile memory (OTP) programming. Configuration files generated by ClockBuilder Pro can be exported as C header files or I²C initialization scripts for integration into bootloader firmware - ensuring repeatable, validated SI5338N-B05316-GMR deployment across production units.
SI5338N-B05316-GMR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- MultiSynth™
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- PLL:
- -
- Main Purpose:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
SI5338N-B05316-GMR FAQ
1.How can I place an order for SI5338N-B05316-GMR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5338N-B05316-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5338N-B05316-GMR reliable?
The price and inventory of SI5338N-B05316-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B05316-GMR is usually 5 days.
3.What payment methods are accepted for SI5338N-B05316-GMR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B05316-GMR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5338N-B05316-GMR?
SI5338N-B05316-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5338N-B05316-GMR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5338N-B05316-GMR?
For technical support, including SI5338N-B05316-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B05316-GMR requirements.
6.How does Aetrix verify that SI5338N-B05316-GMR is sourced from the original manufacturer or authorized distributors?
All SI5338N-B05316-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B05316-GMR meets industry standards.
7.What is the process for return or replacement of SI5338N-B05316-GMR?
All SI5338N-B05316-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B05316-GMR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5338N-B05316-GMR part is unused and in its original packaging.
Return procedure for SI5338N-B05316-GMR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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