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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B05519-GMR

Name: SI5338N-B05519-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B05519-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B05519-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B05519-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338N-B05519-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 and SRNS compliance, and MultiSynth™ frequency synthesis supporting 0.16–710 MHz output ranges across LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats.

For engineers reviewing the SI5338N-B05519-GMR datasheet, SI5338N-B05519-GMR pinout, SI5338N-B05519-GMR application, or SI5338N-B05519-GMR equivalent, key selection criteria include PCIe Gen 4 common-clock jitter performance (0.15–0.45 ps RMS), independent per-output voltage control (1.5/1.8/2.5/3.3 V), spread-spectrum modulation configurability (0.5–5.0% spread, 33–63 kHz rate), and 24-QFN package compatibility with space-constrained FPGA/ASIC timing designs.

Technical Context

The SI5338N-B05519-GMR implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers, each driving one output pair (CLKxA/CLKxB). It supports external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) inputs.

Each output driver features independent format selection, voltage rail assignment (VDDO0–VDDO3), programmable phase offset (±45 ns, <20 ps step), and glitchless frequency increment/decrement (1 ppm steps). Loss-of-lock and loss-of-signal alarms are provided via the INTR pin.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3/4 common-clock and SRNS requirements
Output Frequency Range	0.16–710 MHz; supports LVPECL/LVDS up to 710 MHz, HCSL up to 250 MHz, CMOS up to 200 MHz
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V per driver
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, moisture-sensitive level 3
Operating Temperature	–40 °C to +85 °C ambient; validated for industrial and telecom line card environments
Spread Spectrum	Configurable on any output: 0.5–5.0% down-spread, 33–63 kHz modulation rate

Pinout & Package

SI5338N-B05519-GMR uses a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin 1 is top-left corner (IN1), pin 24 is bottom-right (GND). The package supports reflow soldering per JEDEC J-STD-020, peak temperature 260 °C.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential input pairs	Accept AC-coupled differential clocks up to 710 MHz; require external 100 Ω termination
IN3, IN4	Single-ended input pins	Support CMOS/SSTL/HSTL inputs (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A–CLK3B	Differential output pairs (4 channels)	Each pair supports LVPECL/LVDS/HCSL/CML/SSTL/HSTL; individually voltage- and format-configurable
VDDO0–VDDO3	Output buffer supply rails	Independent 1.5/1.8/2.5/3.3 V supplies per output channel; decoupling required per channel
VDD	Core supply	Single 1.8/2.5/3.3 V core supply; PSRR optimized for low-noise timing operation
SCL, SDA	I²C interface	SMBus-compatible serial interface (up to 400 kHz); supports ClockBuilder Pro configuration
INTR	Interrupt output	Open-drain status indicator for loss-of-lock and loss-of-signal events
GND, RSVD_GND	Ground connections	Multiple GND pins including dedicated reserved ground for noise isolation; thermal pad must be soldered

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enable true zero-ppm accuracy on all outputs without external crystals
PCIe Gen 4 compliance	Meets PCIe Base Spec 4.0 common-clock jitter requirement (0.15–0.45 ps RMS) with 2–5 MHz PLL bandwidth
Per-output voltage control	Each of four output drivers powered from separate VDDOx rails (1.5/1.8/2.5/3.3 V), enabling mixed-voltage system interfacing
Glitchless frequency tuning	Independent PINC/FINC pins allow real-time 1 ppm-step frequency adjustment without output interruption
Programmable phase alignment	±45 ns phase offset per output with <20 ps resolution supports precise skew management in multi-lane interfaces
Spread-spectrum configurability	Any output supports user-defined spread (0.5–5.0%) and modulation rate (33–63 kHz) to reduce EMI in dense PCB layouts

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch/Routing
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ICs in a data center fabric. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter PCIe-compliant clocks with SRNS support. Use Value: Eliminates need for four discrete oscillators; enables deterministic inter-lane skew control (<100 ps) and reduces BOM count by 75%.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs and packet processors in enterprise switches. IC Role / Device Role / Timing Role: Any-frequency synthesizer replacing crystal oscillators and translating between Ethernet line rates. Use Value: Supports IEEE 802.3bj KR4 and 802.3by CR4 protocols with sub-1 ps RMS jitter, meeting IEEE 1588 PTP synchronization requirements.
Broadcast Video Timing	FPGA/ASIC Clocking
Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) 594 MHz and ST 2081 (6G-SDI) 297 MHz clocks to video serializer/deserializer ICs. IC Role / Device Role / Timing Role: High-frequency differential clock generator with LVPECL/LVDS outputs and ultra-low additive jitter. Use Value: Achieves <10 ps cycle-cycle jitter at 594 MHz, preserving eye opening and BER performance in uncompressed video links.	Use Scenario: Supplying multiple clock domains (e.g., 100 MHz AXI, 200 MHz DDR, 300 MHz logic) to Xilinx Versal or Intel Agilex FPGAs. IC Role / Device Role / Timing Role: Configurable quad clock source with independent voltage rails matching FPGA I/O bank requirements. Use Value: Enables single-chip solution for heterogeneous clock tree with per-output format (LVDS/HCSL/CMOS) and voltage (1.8/2.5/3.3 V) matching.

PCIe Gen 4 Switch Timing

Ethernet Switch/Routing

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ICs in a data center fabric.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter PCIe-compliant clocks with SRNS support.

Use Value: Eliminates need for four discrete oscillators; enables deterministic inter-lane skew control (<100 ps) and reduces BOM count by 75%.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs and packet processors in enterprise switches.

IC Role / Device Role / Timing Role: Any-frequency synthesizer replacing crystal oscillators and translating between Ethernet line rates.

Use Value: Supports IEEE 802.3bj KR4 and 802.3by CR4 protocols with sub-1 ps RMS jitter, meeting IEEE 1588 PTP synchronization requirements.

Broadcast Video Timing

FPGA/ASIC Clocking

Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) 594 MHz and ST 2081 (6G-SDI) 297 MHz clocks to video serializer/deserializer ICs.

IC Role / Device Role / Timing Role: High-frequency differential clock generator with LVPECL/LVDS outputs and ultra-low additive jitter.

Use Value: Achieves <10 ps cycle-cycle jitter at 594 MHz, preserving eye opening and BER performance in uncompressed video links.

Use Scenario: Supplying multiple clock domains (e.g., 100 MHz AXI, 200 MHz DDR, 300 MHz logic) to Xilinx Versal or Intel Agilex FPGAs.

IC Role / Device Role / Timing Role: Configurable quad clock source with independent voltage rails matching FPGA I/O bank requirements.

Use Value: Enables single-chip solution for heterogeneous clock tree with per-output format (LVDS/HCSL/CMOS) and voltage (1.8/2.5/3.3 V) matching.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05519-GM	Higher integration: includes integrated crystal, smaller 3.2 × 3.2 mm QFN, lower power (32 mA typ), but fixed 4-output configuration without pin-selectable variants	Targeted at space-constrained edge compute modules where board area and crystal footprint reduction are critical	Select Si5332A-D05519-GM when eliminating external crystal and reducing PCB area outweigh flexibility in pin configuration and legacy design reuse
ICS8430I-01T	Lower jitter (0.45 ps RMS), but only two outputs, no spread spectrum, limited input range (up to 250 MHz), and no I²C programmability	Suitable for dual-clock applications requiring highest jitter performance without frequency agility or multi-protocol support	Select ICS8430I-01T only for fixed-frequency, dual-output systems where PCIe Gen 4 jitter margin is paramount and programmability is unnecessary

Compared with Si5332A-D05519-GM and ICS8430I-01T, SI5338N-B05519-GMR uniquely balances full I²C programmability, four independent outputs with per-rail voltage control, PCIe Gen 4 compliance, and broad input/output frequency coverage - making it optimal for flexible, multi-protocol timing in programmable logic and switching platforms.

Availability

SI5338N-B05519-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch/routing, and broadcast video timing requiring stable component supply, long-term lifecycle support, and traceable sourcing for industrial and telecom deployments.

Supply support for SI5338N-B05519-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog semiconductors, specializing in RF, mobile, infrastructure, and timing solutions with over 30 years of RF and clock technology innovation.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces including PCIe, Ethernet, Fibre Channel, and broadcast video, targeting systems requiring flexible, software-configurable timing with minimal board space.

FAQ

What is the maximum output frequency supported by SI5338N-B05519-GMR in LVPECL mode?

The SI5338N-B05519-GMR supports up to 710 MHz in LVPECL mode, as confirmed in Table 6 of the datasheet under "Output Clocks (Differential)" for LVPECL/LVDS formats. This capability enables direct clocking of high-speed SerDes lanes in PCIe Gen 4 and 10G/25G Ethernet applications without frequency multiplication.

Does SI5338N-B05519-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338N-B05519-GMR is explicitly compliant with PCIe Gen 4 SRNS mode, achieving 0.11–0.32 ps RMS jitter (Table 12) when configured with a 2–5 MHz PLL bandwidth and 10 MHz CDR. This is validated per PCI-Express Base Specification 4.0 rev. 0.5 and measured using the Skyworks PCIe Clock Jitter Tool.

Can SI5338N-B05519-GMR generate different output voltages simultaneously on its four channels?

Yes, SI5338N-B05519-GMR supports independent output supply rails (VDDO0–VDDO3), allowing simultaneous operation at 1.5 V, 1.8 V, 2.5 V, and 3.3 V across its four output drivers. Each rail powers one pair of differential outputs (CLKxA/CLKxB), enabling direct interfacing with mixed-voltage ASICs and FPGAs without level shifters.

What is the minimum input frequency supported for crystal-based operation of SI5338N-B05519-GMR?

The SI5338N-B05519-GMR supports crystal inputs from 8 MHz to 30 MHz, as specified in Tables 8–11 of the datasheet. The minimum crystal frequency is 8 MHz; operation below this requires external CMOS or differential clock sources (minimum 5 MHz).

How is spread-spectrum modulation configured on SI5338N-B05519-GMR?

Spread-spectrum modulation on SI5338N-B05519-GMR is configured per output via I²C registers, supporting 0.5–5.0% down-spread and 33–63 kHz modulation rates (Table 5). Configuration is performed using ClockBuilder Pro software or direct register writes; default settings are ~0.5% down-spread at ~31.5 kHz.

SI5338N-B05519-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B05519-GMR FAQ

1.How can I place an order for SI5338N-B05519-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B05519-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B05519-GMR reliable?

The price and inventory of SI5338N-B05519-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B05519-GMR is usually 5 days.

3.What payment methods are accepted for SI5338N-B05519-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B05519-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B05519-GMR?

SI5338N-B05519-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B05519-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B05519-GMR?

For technical support, including SI5338N-B05519-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B05519-GMR requirements.

6.How does Aetrix verify that SI5338N-B05519-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338N-B05519-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B05519-GMR meets industry standards.

7.What is the process for return or replacement of SI5338N-B05519-GMR?

All SI5338N-B05519-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B05519-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B05519-GMR part is unused and in its original packaging.

Return procedure for SI5338N-B05519-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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