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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B05552-GM

Name: SI5338N-B05552-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B05552-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B05552-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B05552-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338N-B05552-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in Ethernet switch/router, processor/FPGA clocking, and PCIe timing systems.

For engineers reviewing the SI5338N-B05552-GM datasheet, SI5338N-B05552-GM pinout, SI5338N-B05552-GM application, or SI5338N-B05552-GM equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage support (1.5/1.8/2.5/3.3 V), flexible input reference options (crystal, CMOS, SSTL/HSTL, differential), and I²C/SMBus programmability with ClockBuilder Pro software integration.

Technical Context

The SI5338N-B05552-GM implements a two-stage PLL architecture: a high-stability Phase-Frequency Detector (PFD) and loop filter drive a VCO, followed by four independent MultiSynth™ fractional-N dividers for output synthesis. Each output stage supports format selection (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL) and per-driver supply voltage control.

It features loss-of-lock and loss-of-signal monitoring, independent phase/frequency increment/decrement (20 ps / 1 ppm steps), programmable spread spectrum (0.5–5.0% spread, 33–63 kHz modulation), and external feedback mode for zero-delay operation - all configured via 7-bit I²C address (0x60–0x6F) with SMBus timeout support.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS & Gen 4 common clock specs
Output Frequency Range	0.16–710 MHz per channel; supports LVPECL/LVDS (≤710 MHz), HCSL (≤250 MHz), CMOS (≤200 MHz)
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V
Operating Temperature	–40 to +85 °C; qualified per industrial-grade reliability standards
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, moisture sensitivity level 3
Power Consumption	45 mA typical core current at 100 MHz on all outputs with 25 MHz refclk

Pinout & Package

SI5338N-B05552-GM uses a 24-pin QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per Si5338 family specification and validated for this variant.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential input pairs	Accept AC-coupled differential clocks up to 710 MHz; require external 100 Ω termination
IN3, IN4	Single-ended inputs	Support CMOS/SSTL/HSTL signals (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A–CLK3B	Differential output pairs	Four independent output drivers; each configurable as LVPECL/LVDS/HCSL/CML/SSTL/HSTL
VDDO0–VDDO3	Output buffer supplies	Independent 1.5/1.8/2.5/3.3 V supplies per output bank; enable mixed-voltage system interfacing
VDD	Core supply	Single 1.8/2.5/3.3 V supply powers PLL, logic, and MultiSynth stages
SCL, SDA	I²C interface	7-bit address range 0x60–0x6F; supports SMBus timeout and packet error checking
INTR	Interrupt output	Open-drain status indicator for loss-of-lock, loss-of-signal, or configuration errors
RSVD_GND	Reserved ground	Internal connection; must be tied to GND per layout guidelines

Key Features

Feature	Design Value
Any-frequency synthesis	Four independent outputs with true zero-ppm accuracy using MultiSynth™ fractional-N synthesis
PCIe Gen 4 compliance	Meets PCIe Gen 4 common clock jitter spec (0.15–0.45 ps RMS) with 2–5 MHz PLL bandwidth
Glitchless frequency tuning	Independent frequency increment/decrement in 1 ppm steps without output interruption
Sub-20 ps phase adjustment	Per-output phase offset programmable in <20 ps steps over ±45 ns range
Configurable spread spectrum	On any output: 0.5–5.0% down-spread, 33–63 kHz modulation rate, no external components required
Zero-delay mode support	External feedback path enables synchronous clock distribution with minimal propagation delay

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch Clocking
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switches in a data center fabric. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter (≤0.45 ps RMS) HCSL clocks compliant with PCIe Gen 4 common clock requirements. Use Value: Eliminates need for four discrete oscillators; reduces board area by >60% and simplifies BOM while maintaining Gen 4 jitter margin.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs and MACs in enterprise switches. IC Role / Device Role / Timing Role: Programmable frequency translator converting a single 25 MHz crystal reference into three distinct Ethernet line rates. Use Value: Enables single-crystal design across multi-rate ports; supports IEEE 802.3bj/802.3by jitter specs via selectable output formats (LVDS/HCSL).
FPGA/ASIC Clock Domain Synthesis	Broadcast Video Timing
Use Scenario: Supplying independent 100 MHz, 200 MHz, 300 MHz, and 400 MHz clocks to FPGA I/O banks, transceivers, and logic fabric. IC Role / Device Role / Timing Role: Any-frequency clock generator with per-output voltage control (1.8 V/2.5 V/3.3 V) and format selection (LVDS/CMOS). Use Value: Removes external level translators; supports mixed-voltage FPGA designs with sub-10 ps inter-output skew.	Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) 297 MHz and ST 2081 (6G-SDI) 148.5 MHz clocks plus auxiliary 27 MHz and 74.25 MHz references in broadcast encoders. IC Role / Device Role / Timing Role: Low-phase-noise quad generator with <0.7 ps RMS jitter meeting SMPTE ST 2059-2 Class A requirements. Use Value: Replaces crystal+PLL combos; ensures deterministic phase alignment between video/audio sync domains via programmable initial phase offset.

PCIe Gen 4 Switch Timing

Ethernet Switch Clocking

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switches in a data center fabric.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter (≤0.45 ps RMS) HCSL clocks compliant with PCIe Gen 4 common clock requirements.

Use Value: Eliminates need for four discrete oscillators; reduces board area by >60% and simplifies BOM while maintaining Gen 4 jitter margin.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs and MACs in enterprise switches.

IC Role / Device Role / Timing Role: Programmable frequency translator converting a single 25 MHz crystal reference into three distinct Ethernet line rates.

Use Value: Enables single-crystal design across multi-rate ports; supports IEEE 802.3bj/802.3by jitter specs via selectable output formats (LVDS/HCSL).

FPGA/ASIC Clock Domain Synthesis

Broadcast Video Timing

Use Scenario: Supplying independent 100 MHz, 200 MHz, 300 MHz, and 400 MHz clocks to FPGA I/O banks, transceivers, and logic fabric.

IC Role / Device Role / Timing Role: Any-frequency clock generator with per-output voltage control (1.8 V/2.5 V/3.3 V) and format selection (LVDS/CMOS).

Use Value: Removes external level translators; supports mixed-voltage FPGA designs with sub-10 ps inter-output skew.

Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) 297 MHz and ST 2081 (6G-SDI) 148.5 MHz clocks plus auxiliary 27 MHz and 74.25 MHz references in broadcast encoders.

IC Role / Device Role / Timing Role: Low-phase-noise quad generator with <0.7 ps RMS jitter meeting SMPTE ST 2059-2 Class A requirements.

Use Value: Replaces crystal+PLL combos; ensures deterministic phase alignment between video/audio sync domains via programmable initial phase offset.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5338A-B05552-GM	Same pinout and register map; differs only in factory-programmed NVM configuration (A vs N variant)	Pre-configured for different default output frequencies and formats; requires reprogramming for identical behavior	Select SI5338N-B05552-GM when factory OTP image matches target system clock plan; Si5338A-B05552-GM may require ClockBuilder Pro reconfiguration
ICS853S01AG-01	Fixed-function 4-output LVDS generator; no I²C programming, no MultiSynth™, max 700 MHz output	Limited to pre-defined frequency ratios; no spread spectrum, no phase/frequency tuning, no mixed-format outputs	Choose ICS853S01AG-01 only for cost-sensitive, static-clock applications where flexibility is unnecessary

Compared with Si5338A-B05552-GM and ICS853S01AG-01, the SI5338N-B05552-GM provides full field-programmability, PCIe Gen 4 compliance, and sub-1 ps jitter - making it optimal for dynamic, multi-standard timing systems requiring post-silicon tuning and future-proofing.

Availability

SI5338N-B05552-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch clocking, FPGA/ASIC clock domain synthesis, and broadcast video timing requiring stable component supply and long-term lifecycle support.

Supply support for SI5338N-B05552-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces including PCIe, Ethernet, Fibre Channel, and broadcast video - designed to replace multiple oscillators and simplify timing architecture in dense, multi-protocol systems.

FAQ

What is the default I²C address of the SI5338N-B05552-GM?

The SI5338N-B05552-GM uses a 7-bit I²C address range of 0x60 to 0x6F, with the default factory-set address being 0x60. This address is set by the state of pins IN3 and IN4 at power-up and can be changed via register write. The device supports SMBus timeout and packet error checking, ensuring robust communication in noisy industrial environments. All configuration and status registers for the SI5338N-B05552-GM are accessible through this interface.

Does the SI5338N-B05552-GM support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, the SI5338N-B05552-GM supports PCIe Gen 4 SRNS mode with 0.11–0.32 ps RMS jitter (typical) when configured with a PLL bandwidth of 2–5 MHz and CDR = 10 MHz. This capability is validated per PCI Express Base Specification 4.0 rev. 0.5. The SI5338N-B05552-GM achieves this using its dual-loop architecture and optimized MultiSynth™ synthesis, enabling direct replacement of dedicated SRNS oscillators in high-reliability server and storage applications.

Can the SI5338N-B05552-GM generate four different frequencies simultaneously above 350 MHz?

No - the SI5338N-B05552-GM can output only two unique frequencies above 350 MHz simultaneously (Fvco/4 and Fvco/6), as constrained by its VCO architecture. Frequencies above 350 MHz are derived from integer divisions of the VCO output and cannot be independently synthesized across all four outputs. For full 4-channel >350 MHz operation, the SI5338N-B05552-GM must use combinations below 350 MHz or leverage its buffer-mode capability with external references. This limitation applies specifically to the SI5338N-B05552-GM and is documented in Section 3.3 of the datasheet.

What output formats does the SI5338N-B05552-GM support on each channel?

The SI5338N-B05552-GM supports LVPECL, LVDS, HCSL, CML, CMOS, SSTL, and HSTL on each of its four output drivers - with format selection made independently per channel via configuration registers. Voltage levels are also independently assignable (1.5/1.8/2.5/3.3 V per VDDOx pin). For example, CLK0A/CLK0B can be set to LVDS at 1.8 V while CLK1A/CLK1B runs as HCSL at 3.3 V - enabling direct interfacing with heterogeneous logic families without external level shifters in the SI5338N-B05552-GM design.

Is ClockBuilder Pro software required to configure the SI5338N-B05552-GM?

ClockBuilder Pro is not strictly required but strongly recommended for configuring the SI5338N-B05552-GM: it provides GUI-based frequency planning, jitter analysis, register mapping, and one-click firmware generation. While the SI5338N-B05552-GM can be programmed directly via I²C using custom firmware, ClockBuilder Pro eliminates manual register calculation errors and validates PCIe/Ethernet compliance. Skyworks offers free download and device-specific configuration files for the SI5338N-B05552-GM at their official site.

SI5338N-B05552-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B05552-GM FAQ

1.How can I place an order for SI5338N-B05552-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B05552-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B05552-GM reliable?

The price and inventory of SI5338N-B05552-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B05552-GM is usually 5 days.

3.What payment methods are accepted for SI5338N-B05552-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B05552-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B05552-GM?

SI5338N-B05552-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B05552-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B05552-GM?

For technical support, including SI5338N-B05552-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B05552-GM requirements.

6.How does Aetrix verify that SI5338N-B05552-GM is sourced from the original manufacturer or authorized distributors?

All SI5338N-B05552-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B05552-GM meets industry standards.

7.What is the process for return or replacement of SI5338N-B05552-GM?

All SI5338N-B05552-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B05552-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B05552-GM part is unused and in its original packaging.

Return procedure for SI5338N-B05552-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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