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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B05577-GM

Name: SI5338N-B05577-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B05577-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B05577-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B05577-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338N-B05577-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338N-B05577-GM datasheet, SI5338N-B05577-GM pinout, SI5338N-B05577-GM application, or SI5338N-B05577-GM equivalent, key selection criteria include PCIe Gen 4 jitter compliance (0.15–0.45 ps RMS), independent output voltage per driver (1.5/1.8/2.5/3.3 V), MultiSynth™ fractional synthesis resolution (1 ppb), spread-spectrum control (0.5–5.0% spread, 33–63 kHz modulation), and loss-of-lock/loss-of-signal alarm support.

Technical Context

The SI5338N-B05577-GM integrates a two-stage PLL architecture: a high-stability reference stage (input frequency range 5–710 MHz) followed by four independent MultiSynth™ synthesis blocks, each supporting integer or fractional-N division with programmable R, M, and P dividers. This enables true zero-ppm frequency accuracy across all outputs.

Each of the four output drivers supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats with independent VDDO supply (1.5–3.3 V), programmable phase offset (±45 ns, <20 ps step), and glitchless frequency increment/decrement (1 ppm steps). External feedback mode enables zero-delay operation, while INTR pin provides loss-of-lock and loss-of-signal status reporting.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 4 common clock jitter spec (0.15–0.45 ps RMS)
Output Count & Type	4 independent outputs: up to 4 differential (LVPECL/LVDS/HCSL/CML) or 8 single-ended (CMOS/SSTL/HSTL), or mixed
Frequency Range	0.16–710 MHz per output; supports Fvco/4 and Fvco/6 for >350 MHz outputs (max 2 unique high-frequency outputs)
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad
Operating Temp	–40 °C to +85 °C ambient; qualified for industrial and telecom line card environments

Pinout & Package

SI5338N-B05577-GM is housed in a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential input pairs	Accept AC-coupled differential clocks up to 710 MHz; require external 100 Ω termination
IN3, IN4	Single-ended inputs	Support CMOS/SSTL/HSTL signals (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A/CLK0B – CLK3A/CLK3B	Differential output pairs	Four independent output channels; each pair configurable as LVPECL/LVDS/HCSL/CML with dedicated VDDOx
VDDO0–VDDO3	Output buffer supplies	Independent 1.5/1.8/2.5/3.3 V supplies per output bank; enable mixed-voltage system interfacing
VDD	Core supply	Single 1.8/2.5/3.3 V supply powers PLL, logic, and MultiSynth blocks; PSRR optimized
SCL, SDA	I²C/SMBus interface	Standard 100/400 kHz I²C bus; supports ClockBuilder Pro programming and runtime reconfiguration
INTR	Interrupt output	Open-drain status pin asserting on loss-of-lock or loss-of-signal; configurable via register
GND, RSVD_GND	Ground terminals	Multiple GND pins including reserved ground for noise isolation; thermal pad must be soldered

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enabling any-frequency generation (0.16–710 MHz) with 1 ppb resolution and zero ppm error
PCIe Gen 4 compliance	Meets PCIe Base Spec 4.0 common clock jitter requirement (0.15–0.45 ps RMS) without external filtering
Independent output control	Per-output format (LVDS/LVPECL/HCSL/CMOS), voltage (1.5–3.3 V), phase offset (±45 ns, <20 ps step), and spread spectrum (0.5–5.0%, 33–63 kHz)
Glitchless frequency tuning	Hardware-supported frequency increment/decrement (1 ppm steps) with sub-ns update time (<667 ns at >18 MHz)
Robust monitoring	Dedicated INTR pin with configurable loss-of-lock and loss-of-signal detection; response times ≤10 ms LOL, ≤5 µs LOS

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch Clocking
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ASICs in a data center fabric card. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter (0.15–0.45 ps RMS) HCSL clocks meeting PCIe Gen 4 common clock spec. Use Value: Eliminates need for four discrete oscillators; enables board-level jitter margin headroom and simplifies layout with single-device timing solution.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs and packet processors in a carrier-grade Ethernet switch. IC Role / Device Role / Timing Role: Any-frequency synthesizer producing three precise frequencies from one 25 MHz crystal reference. Use Value: Reduces BOM count and PCB area; supports multi-rate PHY interfaces with independent voltage and format per output.
Broadcast Video Sync	FPGA Processor Clocking
Use Scenario: Delivering SMPTE ST 2059–2–compliant 27 MHz, 74.25 MHz, and 148.5 MHz video clocks to SDI transceivers and frame synchronizers. IC Role / Device Role / Timing Role: Low-phase-jitter (0.7 ps RMS) clock generator with independent phase alignment across outputs for genlock-capable systems. Use Value: Enables sub-20 ps inter-output skew and deterministic phase relationships required for broadcast-grade video distribution.	Use Scenario: Supplying 100 MHz system clock, 200 MHz DDR4 memory clock, and 300 MHz FPGA logic clock from a single 25 MHz crystal in an industrial embedded controller. IC Role / Device Role / Timing Role: Configurable quad clock source supporting mixed signal formats (LVDS for DDR, CMOS for logic, SSTL for I/O banks). Use Value: Simplifies power domain partitioning with independent VDDO supplies; avoids external level translators and reduces routing complexity.

PCIe Gen 4 Switch Timing

Ethernet Switch Clocking

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ASICs in a data center fabric card.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter (0.15–0.45 ps RMS) HCSL clocks meeting PCIe Gen 4 common clock spec.

Use Value: Eliminates need for four discrete oscillators; enables board-level jitter margin headroom and simplifies layout with single-device timing solution.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs and packet processors in a carrier-grade Ethernet switch.

IC Role / Device Role / Timing Role: Any-frequency synthesizer producing three precise frequencies from one 25 MHz crystal reference.

Use Value: Reduces BOM count and PCB area; supports multi-rate PHY interfaces with independent voltage and format per output.

Broadcast Video Sync

FPGA Processor Clocking

Use Scenario: Delivering SMPTE ST 2059–2–compliant 27 MHz, 74.25 MHz, and 148.5 MHz video clocks to SDI transceivers and frame synchronizers.

IC Role / Device Role / Timing Role: Low-phase-jitter (0.7 ps RMS) clock generator with independent phase alignment across outputs for genlock-capable systems.

Use Value: Enables sub-20 ps inter-output skew and deterministic phase relationships required for broadcast-grade video distribution.

Use Scenario: Supplying 100 MHz system clock, 200 MHz DDR4 memory clock, and 300 MHz FPGA logic clock from a single 25 MHz crystal in an industrial embedded controller.

IC Role / Device Role / Timing Role: Configurable quad clock source supporting mixed signal formats (LVDS for DDR, CMOS for logic, SSTL for I/O banks).

Use Value: Simplifies power domain partitioning with independent VDDO supplies; avoids external level translators and reduces routing complexity.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5338A-B05577-GM	Same pinout and register map; differs only in factory-programmed NVM configuration (A vs N variant)	Pre-programmed with different default frequency plan; requires reprogramming for identical behavior	Select SI5338N-B05577-GM when factory OTP content matches target design; verify ClockBuilder Pro configuration compatibility
LMK04832RHAT	Two PLLs (not four independent synthesizers); higher power (120 mA typ); larger 48-QFN package	Targeted at ultra-low-jitter (<0.1 ps) RF and instrumentation; lacks per-output spread spectrum and independent VDDO	Choose LMK04832RHAT only if sub-0.2 ps jitter or dual-loop jitter cleaning is required; SI5338N-B05577-GM offers superior integration for PCIe/Ethernet

Compared with Si5338A-B05577-GM, the SI5338N-B05577-GM delivers identical electrical performance but with distinct factory OTP settings requiring validation before drop-in replacement; versus LMK04832RHAT, it trades absolute jitter floor for smaller footprint, lower power, and greater output flexibility in communications infrastructure designs.

Availability

SI5338N-B05577-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, 10 GbE switch clocking, and broadcast video synchronization requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338N-B05577-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line was designed to replace multiple discrete oscillators with a single programmable clock generator for high-speed serial interfaces-including PCIe, Ethernet, Fibre Channel, and broadcast video-while maintaining sub-picosecond jitter and flexible output formatting.

FAQ

What is the maximum output frequency supported by SI5338N-B05577-GM?

The SI5338N-B05577-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. However, only two unique frequencies above 350 MHz can be simultaneously generated (Fvco/4 and Fvco/6), as defined by the internal VCO architecture. All frequencies are synthesized with MultiSynth™ technology and maintain 0.7 ps RMS typical jitter.

Does SI5338N-B05577-GM support PCIe Gen 4 timing requirements?

Yes, SI5338N-B05577-GM meets PCIe Gen 4 common clock jitter specifications (0.15–0.45 ps RMS, 10 kHz–50 MHz) when configured per AN562 guidelines using HCSL outputs at 100 MHz. It is also compliant with PCIe Gen 1/2/3 Common Clock and Gen 3 SRNS modes, verified using the Skyworks PCIe Clock Jitter Tool and Intel Clock Jitter Tool v1.6.4.

Can SI5338N-B05577-GM generate different output voltages simultaneously?

Yes, SI5338N-B05577-GM provides four independent VDDO supplies (VDDO0–VDDO3), each configurable for 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This allows simultaneous LVDS (2.5 V), HCSL (1.8 V), and CMOS (3.3 V) outputs on separate banks-enabling direct interface to mixed-voltage FPGAs, ASICs, and PHYs without external level shifters.

How is SI5338N-B05577-GM programmed and configured?

SI5338N-B05577-GM is programmed via its I²C/SMBus-compatible interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software. The tool generates custom configuration files, validates jitter and phase margin, and supports both one-time OTP programming and runtime register writes. Factory-programmed NVM retains settings across power cycles.

What thermal considerations apply to SI5338N-B05577-GM in continuous operation?

SI5338N-B05577-GM has a junction-to-ambient thermal resistance (θJA) of 37 °C/W in still air. With typical core current of 45 mA at 3.3 V (149 mW), junction temperature rise is ~5.6 °C above ambient. The exposed thermal pad must be soldered to a minimum 100 mm² copper pour for reliable operation at full load across –40 to +85 °C.

SI5338N-B05577-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B05577-GM FAQ

1.How can I place an order for SI5338N-B05577-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B05577-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B05577-GM reliable?

The price and inventory of SI5338N-B05577-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B05577-GM is usually 5 days.

3.What payment methods are accepted for SI5338N-B05577-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B05577-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B05577-GM?

SI5338N-B05577-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B05577-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B05577-GM?

For technical support, including SI5338N-B05577-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B05577-GM requirements.

6.How does Aetrix verify that SI5338N-B05577-GM is sourced from the original manufacturer or authorized distributors?

All SI5338N-B05577-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B05577-GM meets industry standards.

7.What is the process for return or replacement of SI5338N-B05577-GM?

All SI5338N-B05577-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B05577-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B05577-GM part is unused and in its original packaging.

Return procedure for SI5338N-B05577-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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