Skyworks Solutions Inc. SI5338N-B05878-GMR

Overview

SI5338N-B05878-GMR from Skyworks Solutions is an I²C-programmable quad clock generator IC with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338N-B05878-GMR datasheet, SI5338N-B05878-GMR pinout, SI5338N-B05878-GMR application, or SI5338N-B05878-GMR equivalent, key selection factors include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage control (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and 24-QFN package compatibility with PCIe, Ethernet, and FPGA clocking systems.

Technical Context

The SI5338N-B05878-GMR implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers, each driving one output pair. Its input flexibility supports external crystals (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), and differential clocks (5–710 MHz).

Each output driver supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats with independent supply voltage selection (VDDO0–VDDO3), programmable phase offset (±45 ns, <20 ps step), and glitchless frequency increment/decrement (1 ppm steps). The device operates from a single 1.8/2.5/3.3 V core supply and delivers 45 mA typical core current at 100 MHz on all outputs.

Key Specifications

Pinout & Package

The SI5338N-B05878-GMR is housed in a 24-lead QFN package (4 × 4 mm) with wettable flank leads and an exposed thermal pad. Pin 1 is located at top-left corner adjacent to the marking dot.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Compared with Si5338A-B-GM and ICS853S02AGI-01LFT, the SI5338N-B05878-GMR uniquely combines field-programmable any-frequency synthesis, PCIe Gen 4 jitter performance, and independent output voltage control-making it the only option for adaptive, multi-standard timing in high-speed serial systems.

Availability

SI5338N-B05878-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 root complexes, 10GbE switch fabric timing, and FPGA-based broadcast video processing requiring stable component supply and long-term lifecycle support.

Supply support for SI5338N-B05878-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line was designed for high-performance, low-jitter clock generation in multi-standard serial interface systems-including PCIe, Ethernet, Fibre Channel, and broadcast video-where programmability, integration, and jitter performance are critical.

FAQ

What is the primary function of the SI5338N-B05878-GMR in a PCIe Gen 4 system?

The SI5338N-B05878-GMR serves as a Common Clock source in PCIe Gen 4 systems, generating four low-jitter (0.15–0.45 ps RMS) 100 MHz reference clocks that meet the PCI-Express Base Specification 4.0 rev 0.5 jitter requirements. Its MultiSynth™ architecture ensures zero-ppm frequency accuracy and supports simultaneous operation across multiple slots and endpoints without external VCXOs.

Does the SI5338N-B05878-GMR support spread-spectrum clocking, and how is it configured?

Yes, the SI5338N-B05878-GMR supports fully programmable spread-spectrum clocking on any output, with adjustable spread (0.5–5.0%), modulation rate (33–63 kHz), and direction (down-spread only). Configuration is performed via I²C register writes using ClockBuilder Pro software or custom firmware-no hardware changes are required to enable or tune SSC.

Can the SI5338N-B05878-GMR generate different output voltages on each channel?

Yes, the SI5338N-B05878-GMR provides independent output supply pins (VDDO0–VDDO3), allowing each of its four output banks to operate at 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This enables direct interface to mixed-voltage devices-for example, driving 1.8 V HCSL SerDes and 2.5 V LVDS PHYs simultaneously without external level translators.

What input reference sources are compatible with the SI5338N-B05878-GMR?

The SI5338N-B05878-GMR accepts multiple input references: an 8–30 MHz fundamental-mode crystal (internally loaded), single-ended CMOS clocks (5–200 MHz), SSTL/HSTL inputs (5–350 MHz), and differential inputs (5–710 MHz). All inputs support automatic loss-of-signal detection with configurable response times (2.6–5 µs).

How does the SI5338N-B05878-GMR achieve 0.7 ps RMS phase jitter?

The SI5338N-B05878-GMR achieves 0.7 ps RMS phase jitter through a combination of low-noise VCO design, optimized PLL loop bandwidth (1.6 MHz typical), and patented MultiSynth™ fractional-N synthesis that minimizes quantization noise. Jitter performance is validated per JEDEC Std 65 and measured with Agilent 90804 oscilloscopes under differential LVDS/HCSL output conditions.