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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B05879-GM

Name: SI5338N-B05879-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B05879-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B05879-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B05879-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338N-B05879-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis, delivering four independent differential or single-ended clocks (0.16–710 MHz), 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 compliance, and operation from 1.8/2.5/3.3 V core supply in a 4×4 mm 24-QFN package. It replaces multiple crystal oscillators in high-speed serial interface timing.

For engineers reviewing the SI5338N-B05879-GM datasheet, SI5338N-B05879-GM pinout, SI5338N-B05879-GM application, or SI5338N-B05879-GM equivalent, key selection considerations include its four independently configurable output drivers, zero-ppm synthesis accuracy, spread-spectrum control per output, phase/frequency increment-decrement capability, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL signal formats across wide voltage ranges.

Technical Context

The SI5338N-B05879-GM implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesis blocks, each feeding a configurable output driver. Its input supports crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) references.

All outputs feature per-driver voltage selection (1.5/1.8/2.5/3.3 V), programmable initial phase offset (±45 ns), <20 ps phase step resolution, and independent spread-spectrum modulation (0.5–5.0% spread, 33–63 kHz rate). Loss-of-lock and loss-of-signal alarms are integrated for system monitoring.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count & type	Four independently configurable outputs: up to four differential (LVPECL/LVDS/HCSL/CML) or eight single-ended (CMOS/SSTL/HSTL), or mixed
Frequency range	0.16–710 MHz per output; supports integer and fractional synthesis with 1 ppb resolution
Phase jitter (RMS)	0.7 ps typical (12 kHz–20 MHz), meeting PCIe Gen 3 SRNS and Gen 4 common clock requirements
Supply voltages	Core: 1.8/2.5/3.3 V ±10%; output buffers: 1.4–3.63 V, selectable per driver
Operating temperature	–40 °C to +85 °C ambient, qualified for industrial and telecom line card environments
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad
Control interface	I²C/SMBus-compatible serial interface (up to 400 kHz), supported by ClockBuilder Pro software

Pinout & Package

SI5338N-B05879-GM is housed in a 24-lead, 4 × 4 mm QFN package with wettable flanks and an exposed thermal pad (GND-connected). Pin 1 is top-left corner (IN1), pin numbering proceeds counterclockwise.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential clock inputs	Accept AC-coupled differential references up to 710 MHz; require external 100 Ω termination
IN3, IN4	Single-ended clock inputs	Support CMOS/SSTL/HSTL inputs (5–350 MHz); VIH/VIL referenced to VDD
CLK0A/CLK0B – CLK3A/CLK3B	Differential output pairs	Four fully independent output drivers; each pair supports LVPECL/LVDS/HCSL/CML with per-driver VDDO
VDDO0–VDDO3	Output buffer supplies	Independent 1.4–3.63 V supplies per output bank; enable level translation and format flexibility
VDD	Core supply	Single 1.8/2.5/3.3 V supply powering PLL, synthesizers, and logic; PSRR optimized
SCL, SDA	I²C interface	Standard open-drain I²C bus (up to 400 kHz); supports configuration, status readback, and real-time tuning
INTR	Interrupt output	Open-drain alarm signal indicating loss-of-lock or loss-of-signal events
RSVD_GND	Reserved ground	No-connect pin; must be tied to GND per layout guidelines for thermal and EMI performance

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enabling true any-frequency generation with 0 ppm accuracy on all outputs
Per-output spread spectrum	Configurable SSC on any output: 0.5–5.0% down-spread, 33–63 kHz modulation rate, reducing EMI without affecting timing integrity
Glitchless frequency tuning	Hardware-supported frequency increment/decrement via dedicated pins (PINC/FINC), enabling real-time 1 ppm-step adjustments without output interruption
Sub-20 ps phase control	Independent phase adjustment per output with <20 ps step resolution and ±45 ns range, critical for skew-sensitive SerDes alignment
PCIe Gen 4 compliance	Validated RMS jitter ≤0.45 ps (10 kHz–50 MHz) in common-clock mode, meeting PCIe Base Spec 4.0 rev 0.5 requirements
Flexible input support	Five input options: crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz), enabling reuse of existing reference sources

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch Clocking
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ASICs in a data center fabric. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter HCSL clocks with matched phase and spread-spectrum control per port. Use Value: Meets PCIe Gen 4 common clock TJ < 33 ps pk-pk and RMS jitter ≤0.45 ps, eliminating need for discrete oscillators and reducing board space by 75%.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10/25 GbE PHYs and MACs in a modular Ethernet switch. IC Role / Device Role / Timing Role: Frequency translator and buffer, accepting a 25 MHz crystal and synthesizing multiple Ethernet-standard frequencies with independent output formats. Use Value: Enables single-reference design across multi-rate ports; 0.7 ps RMS jitter ensures BER <1e-12 at 25 GbE, validated per IEEE 802.3by.
Broadcast Video Synchronization	FPGA-Based Telecom Line Card
Use Scenario: Distributing frame-locked 74.25 MHz (HD-SDI), 148.5 MHz (3G-SDI), and 297 MHz (12G-SDI) clocks across video processing FPGAs and ADC/DACs. IC Role / Device Role / Timing Role: Any-frequency clock generator with sub-ns inter-output skew control and programmable phase offsets for pixel-perfect alignment. Use Value: Achieves <100 ps output-to-output skew and ±45 ns per-output phase tuning, eliminating video artifacts in multi-channel broadcast systems.	Use Scenario: Supplying 155.52 MHz (OC-3), 622.08 MHz (OC-12), and 2.488 GHz (OC-48) clocks to DSPs, SerDes, and framer ICs in a carrier-grade line card. IC Role / Device Role / Timing Role: High-precision timing hub supporting both synchronous (SONET/SDH) and packet-based (SyncE, PTP) timing architectures. Use Value: 0.7 ps RMS jitter meets OC-12 random jitter spec (≤1 ps RMS), while I²C programmability enables field-upgradable timing profiles.

PCIe Gen 4 Switch Timing

Ethernet Switch Clocking

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ASICs in a data center fabric.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter HCSL clocks with matched phase and spread-spectrum control per port.

Use Value: Meets PCIe Gen 4 common clock TJ < 33 ps pk-pk and RMS jitter ≤0.45 ps, eliminating need for discrete oscillators and reducing board space by 75%.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10/25 GbE PHYs and MACs in a modular Ethernet switch.

IC Role / Device Role / Timing Role: Frequency translator and buffer, accepting a 25 MHz crystal and synthesizing multiple Ethernet-standard frequencies with independent output formats.

Use Value: Enables single-reference design across multi-rate ports; 0.7 ps RMS jitter ensures BER <1e-12 at 25 GbE, validated per IEEE 802.3by.

Broadcast Video Synchronization

FPGA-Based Telecom Line Card

Use Scenario: Distributing frame-locked 74.25 MHz (HD-SDI), 148.5 MHz (3G-SDI), and 297 MHz (12G-SDI) clocks across video processing FPGAs and ADC/DACs.

IC Role / Device Role / Timing Role: Any-frequency clock generator with sub-ns inter-output skew control and programmable phase offsets for pixel-perfect alignment.

Use Value: Achieves <100 ps output-to-output skew and ±45 ns per-output phase tuning, eliminating video artifacts in multi-channel broadcast systems.

Use Scenario: Supplying 155.52 MHz (OC-3), 622.08 MHz (OC-12), and 2.488 GHz (OC-48) clocks to DSPs, SerDes, and framer ICs in a carrier-grade line card.

IC Role / Device Role / Timing Role: High-precision timing hub supporting both synchronous (SONET/SDH) and packet-based (SyncE, PTP) timing architectures.

Use Value: 0.7 ps RMS jitter meets OC-12 random jitter spec (≤1 ps RMS), while I²C programmability enables field-upgradable timing profiles.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05880-GM	Higher integration: includes integrated crystal, eliminates external XTAL; lower max output frequency (500 MHz vs. 710 MHz)	Better suited for space-constrained designs where crystal footprint reduction is critical; less flexible for ultra-high-frequency (>500 MHz) SerDes	Select when board area is constrained and 500 MHz output ceiling is acceptable; requires no external crystal layout
ICS8430I-01LG	Fixed-frequency, non-programmable quad LVDS generator; no I²C interface or frequency synthesis	Limited to pre-defined frequency sets; no spread spectrum, phase tuning, or input flexibility	Choose only for cost-sensitive, static-clock applications where field reconfiguration is unnecessary and jitter tolerance >1.5 ps RMS is acceptable

Compared with Si5332A-D05880-GM, SI5338N-B05879-GM offers broader frequency coverage and external crystal flexibility; compared with ICS8430I-01LG, it provides full programmability, precision jitter performance, and dynamic tuning-making it suitable for evolving high-speed serial standards.

Availability

SI5338N-B05879-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch clocking, broadcast video synchronization, and FPGA-based telecom line card applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338N-B05879-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 family was designed specifically for high-performance, multi-protocol clock generation in datacenter, networking, and broadcast equipment-emphasizing low jitter, configurability, and seamless integration with SerDes PHYs.

FAQ

What is the maximum output frequency supported by the SI5338N-B05879-GM?

The SI5338N-B05879-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. Frequencies above 350 MHz are limited to two unique values simultaneously (Fvco/4 and Fvco/6), as defined in the synthesis architecture. All outputs maintain 0.7 ps RMS jitter at rated frequencies.

Does the SI5338N-B05879-GM support PCIe Gen 4 timing requirements?

Yes, the SI5338N-B05879-GM is validated for PCIe Gen 4 common clock mode with ≤0.45 ps RMS jitter (10 kHz–50 MHz) and meets total jitter limits per PCI-SIG Base Specification 4.0 rev 0.5. It also supports Gen 3 SRNS mode with ≤0.32 ps RMS jitter and includes built-in spread-spectrum control to reduce EMI in dense PCB layouts.

Can the SI5338N-B05879-GM generate different output formats simultaneously?

Yes, the SI5338N-B05879-GM allows mixed-format operation: for example, CLK0A/B as LVDS, CLK1A/B as HCSL, CLK2A/B as CMOS, and CLK3A/B as SSTL-all with independent VDDO supplies (1.5/1.8/2.5/3.3 V). Each driver's format, voltage, and termination are configured separately via I²C registers.

How is phase alignment controlled across outputs in the SI5338N-B05879-GM?

The SI5338N-B05879-GM provides independent programmable phase offset per output with ±45 ns range and <20 ps step resolution. Phase is adjusted digitally in the MultiSynth™ block prior to the output driver, ensuring deterministic, glitch-free alignment without external delay lines or manual trimming.

What development tools are available for configuring the SI5338N-B05879-GM?

Skyworks' ClockBuilder Pro software provides full GUI-based configuration of the SI5338N-B05879-GM-including frequency planning, jitter analysis, register mapping, and .c file generation. The PCIe Clock Jitter Tool validates compliance against Intel and PCI-SIG specifications. Both tools are free and downloadable from skyworksinc.com.

SI5338N-B05879-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B05879-GM FAQ

1.How can I place an order for SI5338N-B05879-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B05879-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B05879-GM reliable?

The price and inventory of SI5338N-B05879-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B05879-GM is usually 5 days.

3.What payment methods are accepted for SI5338N-B05879-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B05879-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B05879-GM?

SI5338N-B05879-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B05879-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B05879-GM?

For technical support, including SI5338N-B05879-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B05879-GM requirements.

6.How does Aetrix verify that SI5338N-B05879-GM is sourced from the original manufacturer or authorized distributors?

All SI5338N-B05879-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B05879-GM meets industry standards.

7.What is the process for return or replacement of SI5338N-B05879-GM?

All SI5338N-B05879-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B05879-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B05879-GM part is unused and in its original packaging.

Return procedure for SI5338N-B05879-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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