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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B06108-GMR

Name: SI5338N-B06108-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B06108-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B06108-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B06108-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338N-B06108-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in Ethernet switch/router, PCIe, and FPGA clocking systems.

For engineers reviewing the SI5338N-B06108-GMR datasheet, SI5338N-B06108-GMR pinout, SI5338N-B06108-GMR application, or SI5338N-B06108-GMR equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz), independent output voltage per driver (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and 24-QFN 4×4 mm package with I²C/SMBus interface.

Technical Context

The SI5338N-B06108-GMR implements a two-stage PLL architecture: a high-stability reference stage (input range 5–710 MHz) feeding a fractional-N MultiSynth™ synthesis stage per output. Each of the four outputs supports independent frequency, format (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), voltage, phase offset (±45 ns), and spread-spectrum modulation (33–63 kHz, 0.5–5.0%).

It features loss-of-lock and loss-of-signal alarms, glitchless frequency increment/decrement in 1 ppm steps, and programmable initial phase offset with <20 ps step accuracy. The device operates from a single 1.8/2.5/3.3 V core supply and supports external feedback for zero-delay mode.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps - meets PCIe Gen 4 common clock RMS jitter requirement (≤0.45 ps typical) when configured per spec.
Output Frequency Range	0.16–710 MHz - supports LVPECL/LVDS up to 710 MHz, HCSL up to 250 MHz, CMOS up to 200 MHz.
Input Reference Range	5–710 MHz - accepts differential (IN1/IN2/IN5/IN6), CMOS (IN3/IN4), or crystal (8–30 MHz) inputs.
Supply Voltages	VDD = 1.8/2.5/3.3 V ±10%; VDDOx = 1.4–3.63 V - enables mixed-voltage system clock distribution.
Package	24-pin QFN, 4 × 4 mm - space-efficient footprint compatible with standard PCB land patterns and reflow profiles.
Operating Temperature	–40 to +85 °C - qualified for industrial and telecom line card environments.
I²C Interface	Standard-mode (100 kHz) and fast-mode (400 kHz) - enables configuration via microcontroller without dedicated programming hardware.

Pinout & Package

SI5338N-B06108-GMR is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential input pairs	Accept AC-coupled LVPECL/LVDS/CML references up to 710 MHz; require external 100 Ω termination.
IN3, IN4	Single-ended CMOS inputs	Support 5–200 MHz clocks; VIH = 0.7×VDD, VIL = 0.3×VDD; slew rate >1 V/ns recommended for low jitter.
CLK0A/CLK0B to CLK3A/CLK3B	Differential output pairs	Four independent outputs; each configurable as LVPECL/LVDS/HCSL/CML with per-driver VDDO supply.
VDDO0–VDDO3	Output buffer supplies	Independent 1.4–3.63 V rails per output pair - enable mixed-signal voltage domain interfacing.
VDD	Core supply	Single 1.8/2.5/3.3 V supply powering PLL, MultiSynth, and control logic; PSRR optimized.
SCL, SDA	I²C serial interface	Standard bidirectional bus; supports SMBus timeout and address 0x70 (default); pull-ups required externally.
INTR	Interrupt output	Open-drain status flag indicating loss-of-lock or loss-of-signal; active-low, 3 mA sink capability.

Key Features

Feature	Design Value
MultiSynth™ frequency synthesis	Enables true zero-ppm accuracy on all four outputs simultaneously - eliminates need for multiple crystals or trimming.
Independent output voltage per driver	Permits direct connection to diverse logic families (e.g., 1.8 V FPGA core, 3.3 V PHY, 2.5 V SerDes) without level shifters.
Glitchless frequency adjustment	1 ppm step size with pin-controlled increment/decrement - enables dynamic clock scaling in real-time applications.
Programmable spread spectrum	Configurable down-spread (0.5–5.0%) at 33–63 kHz - reduces EMI peak emissions without affecting timing margin.
PCIe Gen 3 SRNS compliance	Validated RMS jitter ≤0.32 ps under SRNS conditions - satisfies strict jitter budget for high-speed serial links.

Applications

Ethernet Switch/Routing	PCIe Gen 1–4 Timing
Use Scenario: High-density 1/10 GbE line cards requiring synchronized clocks for MAC, PHY, and packet buffer interfaces. IC Role / Device Role / Timing Role: Primary clock source generating 125 MHz, 156.25 MHz, and 312.5 MHz outputs with sub-ps jitter for SerDes lanes and control logic. Use Value: Eliminates four discrete oscillators while maintaining PCIe Gen 4 jitter compliance and enabling flexible frequency updates via I²C.	Use Scenario: Server motherboard with multiple PCIe slots, NVMe SSDs, and CXL devices demanding common-clock and SRNS-compliant timing. IC Role / Device Role / Timing Role: Quad-output generator delivering 100 MHz common clock and separate 100 MHz SRNS reference with independent phase alignment. Use Value: Meets Intel's PCIe Gen 4 jitter specification (≤0.45 ps RMS) and supports hot-plug reconfiguration without board redesign.
FPGA & Processor Clocking	Broadcast Video/Audio Timing
Use Scenario: Heterogeneous SoC/FPGA platforms needing multiple clock domains (e.g., DDR controller, video pipeline, PCIe, USB). IC Role / Device Role / Timing Role: Centralized clock synthesizer providing 200 MHz DDR3, 148.5 MHz HDMI, 100 MHz PCIe, and 24 MHz USB clocks from one device. Use Value: Reduces BOM count and layout complexity while enabling dynamic reconfiguration of clock frequencies during runtime.	Use Scenario: SMPTE ST 2110 IP media gateway requiring precise 27 MHz, 74.25 MHz, and 148.5 MHz video clocks with tight skew control. IC Role / Device Role / Timing Role: Low-jitter master clock generator with <100 ps output-to-output skew and programmable phase offsets for frame sync alignment. Use Value: Achieves broadcast-grade timing accuracy (<±10 ns phase error) across multiple video/audio streams without external delay lines.

Ethernet Switch/Routing

PCIe Gen 1–4 Timing

Use Scenario: High-density 1/10 GbE line cards requiring synchronized clocks for MAC, PHY, and packet buffer interfaces.

IC Role / Device Role / Timing Role: Primary clock source generating 125 MHz, 156.25 MHz, and 312.5 MHz outputs with sub-ps jitter for SerDes lanes and control logic.

Use Value: Eliminates four discrete oscillators while maintaining PCIe Gen 4 jitter compliance and enabling flexible frequency updates via I²C.

Use Scenario: Server motherboard with multiple PCIe slots, NVMe SSDs, and CXL devices demanding common-clock and SRNS-compliant timing.

IC Role / Device Role / Timing Role: Quad-output generator delivering 100 MHz common clock and separate 100 MHz SRNS reference with independent phase alignment.

Use Value: Meets Intel's PCIe Gen 4 jitter specification (≤0.45 ps RMS) and supports hot-plug reconfiguration without board redesign.

FPGA & Processor Clocking

Broadcast Video/Audio Timing

Use Scenario: Heterogeneous SoC/FPGA platforms needing multiple clock domains (e.g., DDR controller, video pipeline, PCIe, USB).

IC Role / Device Role / Timing Role: Centralized clock synthesizer providing 200 MHz DDR3, 148.5 MHz HDMI, 100 MHz PCIe, and 24 MHz USB clocks from one device.

Use Value: Reduces BOM count and layout complexity while enabling dynamic reconfiguration of clock frequencies during runtime.

Use Scenario: SMPTE ST 2110 IP media gateway requiring precise 27 MHz, 74.25 MHz, and 148.5 MHz video clocks with tight skew control.

IC Role / Device Role / Timing Role: Low-jitter master clock generator with <100 ps output-to-output skew and programmable phase offsets for frame sync alignment.

Use Value: Achieves broadcast-grade timing accuracy (<±10 ns phase error) across multiple video/audio streams without external delay lines.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06109-GM	Higher integration: 8 outputs, lower jitter (0.35 ps RMS), integrated EEPROM, supports JESD204B deterministic latency.	Targeted at JESD204B ADC/DAC timing and multi-lane SerDes where deterministic delay matters.	Select if >4 outputs, sub-0.4 ps jitter, or JESD204B support is required; not drop-in due to different pinout and register map.
ICS853S01IAGLF	Fixed-frequency, non-programmable quad LVDS generator; 1.2 ps RMS jitter; no I²C interface or spread spectrum.	Cost-sensitive, static-clock applications where frequency flexibility is unnecessary.	Choose only for fixed 100/125 MHz designs with no need for reprogramming or EMI reduction features.

Compared with Si5332A-D06109-GM and ICS853S01IAGLF, SI5338N-B06108-GMR uniquely balances field-programmability, PCIe Gen 4 compliance, and compact 4×4 mm packaging - making it optimal for space-constrained, multi-protocol systems requiring post-production clock tuning.

Availability

SI5338N-B06108-GMR is available at Aetrix Electronics and suitable for Ethernet switch/router, PCIe Gen 1–4 timing, and FPGA clocking applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338N-B06108-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line was designed for high-performance, software-configurable clock generation in multi-protocol systems - targeting PCIe, Ethernet, broadcast, and compute platforms where flexibility, low jitter, and small footprint are critical.

FAQ

What is the maximum output frequency supported by SI5338N-B06108-GMR in LVPECL mode?

The SI5338N-B06108-GMR supports LVPECL outputs up to 710 MHz, as confirmed in Table 6 of the datasheet. This applies when using differential outputs with appropriate termination and load conditions. Operation above 350 MHz is limited to two unique frequencies simultaneously (Fvco/4 and Fvco/6), and jitter performance remains within specification when configured per Skyworks' recommended layout and power delivery guidelines.

Does SI5338N-B06108-GMR support PCIe Gen 4 Common Clock compliance?

Yes, SI5338N-B06108-GMR is specified for PCIe Gen 4 Common Clock with ≤0.45 ps RMS jitter (typical 0.15 ps) under defined test conditions (PLL BW 2–5 MHz, CDR = 10 MHz). This compliance is documented in Table 12 and verified using the Skyworks PCIe Clock Jitter Tool, confirming suitability for Gen 4 root complex and endpoint timing.

Can SI5338N-B06108-GMR generate different output voltages on each channel?

Yes, SI5338N-B06108-GMR provides independent VDDO0–VDDO3 supply pins, allowing each of the four output pairs to be powered at 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This enables direct interfacing with mixed-voltage components (e.g., 1.8 V FPGA I/O banks and 3.3 V legacy peripherals) without external level translators.

Is an external crystal required for SI5338N-B06108-GMR operation?

No - SI5338N-B06108-GMR accepts multiple reference sources: external 8–30 MHz crystals (on IN1/IN2), CMOS clocks (5–200 MHz on IN3/IN4), or differential signals (5–710 MHz on IN1/IN2/IN5/IN6). Crystal use is optional; the device functions fully with any supported reference, and internal load capacitance is configurable for 11–13 pF crystals.

How is SI5338N-B06108-GMR programmed in-system?

SI5338N-B06108-GMR is programmed via its I²C/SMBus-compatible interface (address 0x70 default) using standard 100/400 kHz timing. Configuration is performed with Skyworks' ClockBuilder Pro software, which generates register maps and .c files for embedded initialization. No external programmer or special voltage is needed - full configuration occurs during power-up or runtime.

SI5338N-B06108-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B06108-GMR FAQ

1.How can I place an order for SI5338N-B06108-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B06108-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B06108-GMR reliable?

The price and inventory of SI5338N-B06108-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B06108-GMR is usually 5 days.

3.What payment methods are accepted for SI5338N-B06108-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B06108-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B06108-GMR?

SI5338N-B06108-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B06108-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B06108-GMR?

For technical support, including SI5338N-B06108-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B06108-GMR requirements.

6.How does Aetrix verify that SI5338N-B06108-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338N-B06108-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B06108-GMR meets industry standards.

7.What is the process for return or replacement of SI5338N-B06108-GMR?

All SI5338N-B06108-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B06108-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B06108-GMR part is unused and in its original packaging.

Return procedure for SI5338N-B06108-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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