Skyworks Solutions Inc. SI5338N-B06154-GM

Overview

SI5338N-B06154-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in FPGA/processor clocking, PCIe interconnects, and broadcast video timing systems.

For engineers reviewing the SI5338N-B06154-GM datasheet, SI5338N-B06154-GM pinout, SI5338N-B06154-GM application, or SI5338N-B06154-GM equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage control (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and 24-QFN package compatibility with high-density PCB layouts.

Technical Context

The SI5338N-B06154-GM implements a two-stage PLL architecture: a high-stability reference stage (with crystal or external clock input) followed by four independent MultiSynth™ fractional-N synthesizers, each driving one output channel. Each synthesizer supports integer or fractional mode operation with <20 ps programmable phase step resolution and 1 ppm frequency increment/decrement granularity.

It accepts flexible reference inputs - 8–30 MHz crystal, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, or 5–710 MHz differential - and delivers configurable output formats including LVPECL (0.16–710 MHz), LVDS (0.16–350 MHz), HCSL (0.16–250 MHz), CMOS (0.16–200 MHz), and SSTL/HSTL (0.16–350 MHz), all with independent VDDO supply per driver.

Key Specifications

Pinout & Package

SI5338N-B06154-GM uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated in Skyworks Rev. 1.6 datasheet Figure 1 (Top View).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Compared with Si5332A-D06154-GM, SI5338N-B06154-GM offers broader input flexibility and field-programmability at the expense of slightly higher jitter and no integrated crystal; versus ICS853S02AGT, it provides full any-frequency synthesis and dynamic control but requires configuration effort.

Availability

SI5338N-B06154-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 interconnects, Ethernet switch/router timing, and broadcast video equipment requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338N-B06154-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line was designed specifically for high-performance, programmable clock generation in datacenter, telecom, and broadcast systems-emphasizing low jitter, multi-format flexibility, and I²C configurability.

FAQ

What is the primary function of the SI5338N-B06154-GM?

The SI5338N-B06154-GM is an I²C-programmable quad clock generator that synthesizes four independent, low-jitter output clocks from a single reference input. Its MultiSynth™ technology enables any-frequency generation (0.16–710 MHz) with 0 ppm precision per output, making it ideal for replacing multiple crystal oscillators in complex timing systems. SI5338N-B06154-GM supports PCIe Gen 1–4, Ethernet, and broadcast video standards with configurable output formats and voltages.

Does the SI5338N-B06154-GM support PCIe Gen 4 compliance?

Yes, the SI5338N-B06154-GM meets PCIe Gen 4 common clock jitter requirements with 0.15–0.45 ps RMS jitter (12 kHz–20 MHz) when configured per Skyworks AN562 guidelines. It is explicitly validated for PCIe Gen 4 in the Rev. 1.6 datasheet and supports both common clock and SRNS modes. SI5338N-B06154-GM achieves this using its dual-loop PLL architecture and optimized MultiSynth™ synthesis, with measurement verified using the Skyworks PCIe Clock Jitter Tool.

Can the SI5338N-B06154-GM generate different output formats simultaneously?

Yes, the SI5338N-B06154-GM supports simultaneous mixed-format outputs: for example, LVPECL on CLK0, LVDS on CLK1, HCSL on CLK2, and CMOS on CLK3-all with independent frequency, phase, and voltage settings. Each output driver is fully configurable for signal format (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), frequency range, and VDDO supply (1.5/1.8/2.5/3.3 V). This capability is confirmed in the "Highly-configurable output drivers" feature list and Table 6 of the SI5338N-B06154-GM datasheet.

What reference inputs does the SI5338N-B06154-GM accept?

The SI5338N-B06154-GM accepts four types of reference inputs: (1) 8–30 MHz fundamental-mode crystal via IN1/IN2, (2) 5–200 MHz single-ended CMOS on IN3/IN4, (3) 5–350 MHz SSTL/HSTL on IN3/IN4, and (4) 5–710 MHz differential signals on IN1/IN2 or IN5/IN6. All inputs support automatic loss-of-signal detection. These options are documented in the "Flexible input reference" section and Table 6 of the SI5338N-B06154-GM datasheet.

Is ClockBuilder Pro software required to configure the SI5338N-B06154-GM?

No, ClockBuilder Pro is optional but strongly recommended for efficient configuration of the SI5338N-B06154-GM. The device supports full I²C/SMBus programming without it, allowing custom firmware to write registers directly. However, ClockBuilder Pro automates register calculation, validates design constraints, generates configuration files, and supports hardware verification-significantly reducing development time. SI5338N-B06154-GM's I²C address is 0x70 (default), and all registers are accessible per Section 6 of the datasheet.