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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B06154-GMR

Name: SI5338N-B06154-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B06154-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B06154-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B06154-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338N-B06154-GMR from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis. It delivers four independent, any-frequency outputs (0.16–710 MHz), supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats, achieves 0.7 ps RMS phase jitter (typ), and operates from 1.8/2.5/3.3 V core supply in PCIe Gen 1–4 and Ethernet timing systems.

For engineers reviewing the SI5338N-B06154-GMR datasheet, SI5338N-B06154-GMR pinout, SI5338N-B06154-GMR application, or SI5338N-B06154-GMR equivalent, key selection criteria include differential output jitter compliance (PCIe Gen 4 SRNS, GbE), independent per-output voltage control (1.5–3.3 V), spread-spectrum programmability (0.5–5.0% at 33–63 kHz), and 24-QFN package compatibility with high-density FPGA/ASIC clock trees.

Technical Context

The SI5338N-B06154-GMR implements a two-stage PLL architecture: a high-stability reference PLL (loop bandwidth 1.6 MHz) followed by four independent MultiSynth™ fractional-N synthesizers. Each output stage supports integer or fractional mode operation, enabling true zero-ppm accuracy across all four clocks while maintaining sub-20 ps phase step resolution and <100 ps output-to-output skew.

Input flexibility includes differential (5–710 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or crystal (8–30 MHz) references. Output drivers are fully configurable per channel for format, voltage (1.5/1.8/2.5/3.3 V), termination, and spread-spectrum modulation-enabling direct replacement of multiple discrete oscillators in telecom line cards and MSAN platforms.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count & type	4 differential clock outputs (CLK0A/B through CLK3A/B); supports LVPECL, LVDS, HCSL, CML, CMOS, SSTL, HSTL
Frequency range	0.16–710 MHz per output; up to two >350 MHz frequencies simultaneously (Fvco/4 and Fvco/6)
Phase jitter (RMS)	0.7 ps typical (12 kHz–20 MHz), compliant with PCIe Gen 4 Common Clock and SRNS requirements
Supply voltages	Core: 1.8/2.5/3.3 V ±10%; output buffers: independently configurable 1.5/1.8/2.5/3.3 V
Operating temperature	–40 °C to +85 °C ambient, qualified for industrial and telecom infrastructure use
Package	24-pin QFN, 4 mm × 4 mm, 0.5 mm pitch, exposed thermal pad
Control interface	I²C/SMBus-compatible serial interface (up to 400 kHz), plus hardware pin control for glitchless frequency increment/decrement

Pinout & Package

SI5338N-B06154-GMR uses a 24-pin QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments follow Skyworks' standard Si5338 pinout layout.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2	Differential input pair #1	Accepts 5–710 MHz AC-coupled differential clock; requires external 100 Ω termination
IN3, IN4	Single-ended input pair	Supports CMOS/SSTL/HSTL inputs (5–350 MHz); IN3 = primary, IN4 = secondary reference
IN5, IN6	Differential input pair #2	Second 5–710 MHz differential input; enables dual-reference redundancy or frequency translation
CLK0A, CLK0B – CLK3A, CLK3B	Differential output pairs	Four independent LVPECL/LVDS/HCSL/CML outputs; each configurable for format, voltage, and slew rate
VDDO0–VDDO3	Output buffer supplies	Independent 1.5/1.8/2.5/3.3 V supplies per output bank; decoupling required per bank
VDD	Core supply	Single 1.8/2.5/3.3 V core supply; PSRR optimized for noise-sensitive timing applications
SCL, SDA	I²C interface	Standard bidirectional I²C bus (up to 400 kHz); supports ClockBuilder Pro programming
INTR	Interrupt output	Open-drain status indicator for loss-of-lock (LOL) and loss-of-signal (LOS) alarms

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enable simultaneous zero-ppm precision on all outputs without shared dividers
Glitchless frequency tuning	Hardware pin-controlled frequency increment/decrement in 1 ppm steps with <667 ns update time
Per-output phase adjustment	Programmable initial phase offset (–45 to +45 ns) and fine-grained phase stepping (<20 ps resolution)
Configurable spread spectrum	Any output supports user-defined SSC: 0.5–5.0% spread, 33–63 kHz modulation rate, down-spread default
PCIe Gen 4 compliance	Meets PCIe Gen 4 Common Clock jitter spec (0.15–0.45 ps RMS) and SRNS requirements with 2–5 MHz PLL BW
Flexible reference support	Accepts crystal (8–30 MHz), single-ended (5–350 MHz), or differential (5–710 MHz) inputs - no external PLL needed

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch/Routing
Use Scenario: High-speed switch ASIC requiring four synchronized clocks: 100 MHz PCIe refclk, 156.25 MHz SerDes, 250 MHz CPU interface, and 312.5 MHz PHY. IC Role / Device Role / Timing Role: Quad clock generator providing independent, low-jitter, spread-spectrum-capable outputs with per-channel voltage and format control. Use Value: Eliminates four discrete oscillators; meets PCIe Gen 4 SRNS jitter spec (0.11–0.32 ps RMS) and reduces EMI via programmable SSC on selected outputs.	Use Scenario: 10 GbE/25 GbE line card needing precise 156.25 MHz, 312.5 MHz, and 625 MHz clocks for MAC, PHY, and packet processor domains. IC Role / Device Role / Timing Role: Any-frequency clock synthesizer generating exact IEEE 802.3-compliant rates from a single 25 MHz crystal reference. Use Value: Achieves 0.7 ps RMS jitter (typ) on all outputs; supports LVDS and HCSL formats natively; enables deterministic inter-clock phase alignment for TSN synchronization.
Broadcast Video Timing	Processor & FPGA Clocking
Use Scenario: SMPTE ST 2082/ST 2110 video router requiring genlock-stable 74.25 MHz, 148.5 MHz, and 297 MHz pixel clocks with sub-ns skew. IC Role / Device Role / Timing Role: Low-phase-noise clock generator with independent phase offset control per output for frame-aligned timing distribution. Use Value: Delivers <100 ps output-to-output skew and <20 ps phase step resolution - critical for multi-link 4K/8K video transport without frame tearing.	Use Scenario: Xilinx Versal or Intel Agilex FPGA platform needing 100 MHz configuration, 300 MHz logic, 500 MHz transceiver, and 1 GHz DDR4 memory clocks. IC Role / Device Role / Timing Role: Programmable quad clock source supporting mixed-voltage (1.8 V/2.5 V/3.3 V) and mixed-format (LVDS/CMOS/HCSL) outputs from one IC. Use Value: Reduces BOM count and PCB area vs. discrete oscillators; enables dynamic reconfiguration via I²C during FPGA partial reconfiguration sequences.

PCIe Gen 4 Switch Timing

Ethernet Switch/Routing

Use Scenario: High-speed switch ASIC requiring four synchronized clocks: 100 MHz PCIe refclk, 156.25 MHz SerDes, 250 MHz CPU interface, and 312.5 MHz PHY.

IC Role / Device Role / Timing Role: Quad clock generator providing independent, low-jitter, spread-spectrum-capable outputs with per-channel voltage and format control.

Use Value: Eliminates four discrete oscillators; meets PCIe Gen 4 SRNS jitter spec (0.11–0.32 ps RMS) and reduces EMI via programmable SSC on selected outputs.

Use Scenario: 10 GbE/25 GbE line card needing precise 156.25 MHz, 312.5 MHz, and 625 MHz clocks for MAC, PHY, and packet processor domains.

IC Role / Device Role / Timing Role: Any-frequency clock synthesizer generating exact IEEE 802.3-compliant rates from a single 25 MHz crystal reference.

Use Value: Achieves 0.7 ps RMS jitter (typ) on all outputs; supports LVDS and HCSL formats natively; enables deterministic inter-clock phase alignment for TSN synchronization.

Broadcast Video Timing

Processor & FPGA Clocking

Use Scenario: SMPTE ST 2082/ST 2110 video router requiring genlock-stable 74.25 MHz, 148.5 MHz, and 297 MHz pixel clocks with sub-ns skew.

IC Role / Device Role / Timing Role: Low-phase-noise clock generator with independent phase offset control per output for frame-aligned timing distribution.

Use Value: Delivers <100 ps output-to-output skew and <20 ps phase step resolution - critical for multi-link 4K/8K video transport without frame tearing.

Use Scenario: Xilinx Versal or Intel Agilex FPGA platform needing 100 MHz configuration, 300 MHz logic, 500 MHz transceiver, and 1 GHz DDR4 memory clocks.

IC Role / Device Role / Timing Role: Programmable quad clock source supporting mixed-voltage (1.8 V/2.5 V/3.3 V) and mixed-format (LVDS/CMOS/HCSL) outputs from one IC.

Use Value: Reduces BOM count and PCB area vs. discrete oscillators; enables dynamic reconfiguration via I²C during FPGA partial reconfiguration sequences.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06154-GM	Higher integration: 8 outputs, integrated LDOs, lower jitter (0.35 ps RMS), supports JESD204B deterministic latency	Targeted at JESD204B ADC/DAC timing and high-end data converters where deterministic delay matters	Choose if >4 outputs, ultra-low jitter, or JESD204B sync is required; higher cost and larger 32-QFN package
ICS8430I-01T	Fixed-frequency quad LVDS generator (no I²C programming); 1.2 ps RMS jitter; 3.3 V only; no spread spectrum	Cost-sensitive, static-clock applications like legacy telecom line cards with fixed 125/156.25 MHz requirements	Choose only for non-programmable, fixed-rate deployments where design flexibility and jitter margin are secondary to unit cost

Compared with Si5332A-D06154-GM and ICS8430I-01T, the SI5338N-B06154-GMR uniquely balances field-programmability, PCIe Gen 4 compliance, and 24-QFN compactness - making it optimal for mid-tier FPGA-based systems requiring reconfigurable timing without over-engineering.

Availability

SI5338N-B06154-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching/routing, and broadcast video timing requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338N-B06154-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, mobile, infrastructure, and timing solutions with broad manufacturing scale and automotive-grade reliability.

The SI5338 product line was designed for high-performance, software-configurable clock generation in datacenter, telecom, and broadcast equipment - replacing multiple fixed-frequency oscillators with a single, field-programmable timing IC.

FAQ

What is the maximum output frequency supported by SI5338N-B06154-GMR?

The SI5338N-B06154-GMR supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. However, only two unique frequencies above 350 MHz can be generated simultaneously (Fvco/4 and Fvco/6), as defined by the internal VCO architecture. All outputs maintain 0.7 ps RMS jitter (typ) within their respective rated ranges.

Does SI5338N-B06154-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338N-B06154-GMR is explicitly validated for PCIe Gen 4 SRNS operation with 0.11–0.32 ps RMS jitter (typ/max) when configured with a 2–5 MHz PLL loop bandwidth and CDR = 10 MHz. This compliance is documented in Table 12 of the official Skyworks datasheet Rev. 1.6 and verified using the Skyworks PCIe Clock Jitter Tool.

Can SI5338N-B06154-GMR generate different output voltages on each channel?

Yes, SI5338N-B06154-GMR provides independent VDDO0–VDDO3 supplies, allowing each of its four output banks to operate at 1.5 V, 1.8 V, 2.5 V, or 3.3 V - selectable per bank. This enables mixed-voltage system interfaces (e.g., 1.8 V FPGA I/O, 2.5 V SerDes, 3.3 V legacy logic) without external level shifters.

Is an external crystal required for SI5338N-B06154-GMR operation?

No - SI5338N-B06154-GMR accepts multiple reference sources: an 8–30 MHz crystal (directly connected to IN1/IN2), a single-ended CMOS clock (5–200 MHz on IN3/IN4), or a differential clock (5–710 MHz on IN1/IN2 or IN5/IN6). Crystal operation requires no external load capacitors due to on-chip 12 pF tuning capability.

How is SI5338N-B06154-GMR programmed and configured?

SI5338N-B06154-GMR is programmed via its I²C/SMBus interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software, which generates custom configuration files and registers. Hardware pin control (PINC/FDEC) also enables real-time, glitchless frequency adjustments without host processor intervention - critical for dynamic power management.

SI5338N-B06154-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B06154-GMR FAQ

1.How can I place an order for SI5338N-B06154-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B06154-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B06154-GMR reliable?

The price and inventory of SI5338N-B06154-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B06154-GMR is usually 5 days.

3.What payment methods are accepted for SI5338N-B06154-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B06154-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B06154-GMR?

SI5338N-B06154-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B06154-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B06154-GMR?

For technical support, including SI5338N-B06154-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B06154-GMR requirements.

6.How does Aetrix verify that SI5338N-B06154-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338N-B06154-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B06154-GMR meets industry standards.

7.What is the process for return or replacement of SI5338N-B06154-GMR?

All SI5338N-B06154-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B06154-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B06154-GMR part is unused and in its original packaging.

Return procedure for SI5338N-B06154-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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