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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B06157-GMR

Name: SI5338N-B06157-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B06157-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B06157-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B06157-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338N-B06157-GMR from Skyworks Solutions is a quad-output, I²C-programmable clock generator implementing MultiSynth™ frequency synthesis. It delivers four independent, any-frequency outputs (0.16–710 MHz) with 0.7 ps RMS phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338N-B06157-GMR datasheet, SI5338N-B06157-GMR pinout, SI5338N-B06157-GMR application, or SI5338N-B06157-GMR equivalent, key selection criteria include differential output jitter performance at 125 MHz (0.7 ps RMS), PCIe Gen 4 common clock compliance, independent per-output voltage control (1.5/1.8/2.5/3.3 V), and 24-QFN package compatibility with space-constrained PCB layouts.

Technical Context

The SI5338N-B06157-GMR integrates a dual-stage PLL architecture: a high-stability reference stage (with crystal or external clock input) followed by four independent MultiSynth™ fractional-N synthesizers. Each synthesizer drives one of four configurable output drivers, enabling true zero-ppm frequency accuracy across all outputs without shared dividers or frequency dependencies.

Its I²C/SMBus interface configures all parameters-including output format, voltage, spread spectrum (0.5–5.0% down-spread), phase offset (±45 ns), and frequency increment/decrement (1 ppm steps)-without requiring external components. The device supports external feedback for zero-delay mode and provides loss-of-lock and loss-of-signal alarms via the INTR pin.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps (12 kHz–20 MHz); meets PCIe Gen 4 common clock jitter spec (≤0.45 ps RMS)
Output Frequency Range	0.16–710 MHz per channel; supports simultaneous 710 MHz LVPECL + 350 MHz SSTL
Input Reference Options	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Output Voltage per Driver	Independently selectable 1.5 V / 1.8 V / 2.5 V / 3.3 V; enables mixed-voltage system clocking
Package	24-pin QFN, 4 mm × 4 mm, 0.5 mm pitch; compatible with standard reflow profiles
Operating Temperature	–40 °C to +85 °C; qualified for industrial and telecom line card environments
Core Supply	Single 1.8 V / 2.5 V / 3.3 V supply; 45 mA typical current draw at 100 MHz on all outputs

Pinout & Package

SI5338N-B06157-GMR is housed in a 24-lead, 4 mm × 4 mm QFN package with exposed thermal pad. Pin assignments follow Skyworks' standardized Si5338 pinout, supporting differential inputs (IN1/IN2, IN5/IN6), single-ended inputs (IN3/IN4), four differential output pairs (CLK0A/B through CLK3A/B), dedicated output supply pins (VDDO0–VDDO3), core supply (VDD), I²C interface (SCL/SDA), interrupt (INTR), and reserved ground (RSVD_GND).

Pin/Terminal	Circuit Role	Design Meaning
CLK0A / CLK0B	Differential Output Pair 0	LVPECL/LVDS/HCSL/CML-compatible; independently configured frequency, format, and VDDO0 voltage
CLK1A / CLK1B	Differential Output Pair 1	Same configurability as CLK0; supports integer/fractional synthesis up to 710 MHz
CLK2A / CLK2B	Differential Output Pair 2	Independent phase adjustment (<20 ps step resolution); supports SSC modulation
CLK3A / CLK3B	Differential Output Pair 3	Configurable for PCIe Gen 4 common clock (100 MHz HCSL) or broadcast video timing (27 MHz LVDS)
IN1 / IN2	Differential Input 1	Accepts 5–710 MHz AC-coupled differential clock; internal 100 Ω termination enabled
IN3 / IN4	Single-Ended Input	CMOS/SSTL/HSTL-compatible; 5–350 MHz range; internal biasing and level-shifting
VDDO0–VDDO3	Output Buffer Supplies	Each powers one output pair; allows mixed-voltage operation (e.g., 1.8 V LVDS + 3.3 V CMOS)
SCL / SDA	I²C Interface	Standard SMBus-compatible bus; supports ClockBuilder Pro programming and runtime reconfiguration
INTR	Interrupt Output	Open-drain status indicator for loss-of-lock, loss-of-signal, or configuration error

Key Features

Feature	Design Value
MultiSynth™ Synthesis	Four independent fractional-N synthesizers enable true zero-ppm frequency accuracy on all outputs simultaneously
PCIe Gen 4 Compliance	Meets PCIe Base Spec 4.0 common clock jitter requirement (≤0.45 ps RMS) at 100 MHz HCSL output
Per-Output Voltage Control	Each of four output drivers powered by dedicated VDDOx rail (1.5/1.8/2.5/3.3 V), eliminating level-shifters in multi-voltage systems
Glitchless Frequency Tuning	Independent frequency increment/decrement via pin or I²C in 1 ppm steps, with <667 ns update time above 18 MHz
Programmable Phase Offset	±45 ns adjustment per output with <20 ps step resolution; enables precise skew management in SerDes lanes
Spread Spectrum Clocking	Configurable on any output: 0.5–5.0% down-spread, 33–63 kHz modulation rate, 5–350 MHz frequency range

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch/Routing
Use Scenario: Providing synchronized 100 MHz HCSL clocks to multiple PCIe Gen 4 switch ASICs in a data center top-of-rack switch. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter, phase-aligned PCIe reference clocks with Gen 4 SRNS compliance. Use Value: Eliminates need for four discrete oscillators; reduces board area by 65% and ensures deterministic inter-lane skew <100 ps.	Use Scenario: Generating 125 MHz LVDS clocks for 10 GbE PHYs and 250 MHz CMOS clocks for packet processors in carrier-grade Ethernet switches. IC Role / Device Role / Timing Role: Configurable clock source supporting mixed-signal timing domains with independent voltage and format per output. Use Value: Enables single-component solution for multi-rate, multi-voltage Ethernet timing; simplifies BOM and eliminates inter-chip skew.
Broadcast Video Timing	Processor & FPGA Clocking
Use Scenario: Delivering SMPTE ST 2082-compliant 297 MHz LVDS pixel clocks and 27 MHz LVDS reference clocks to video encoder/decoder FPGAs in 4K/8K broadcast equipment. IC Role / Device Role / Timing Role: High-precision, low-jitter quad clock generator with sub-1 ps RMS jitter at video frequencies. Use Value: Meets broadcast-grade jitter requirements (≤1 ps RMS) without external jitter cleaners; supports frame-accurate synchronization.	Use Scenario: Supplying 500 MHz HCSL clocks to Xilinx Versal ACAPs and 100 MHz LVDS clocks to ARM-based SoCs in AI inference edge servers. IC Role / Device Role / Timing Role: Programmable frequency translator and buffer, accepting 25 MHz crystal input and generating multiple high-frequency system clocks. Use Value: Replaces crystal oscillator + fanout buffer + level shifter chain; reduces power by 30% vs. discrete solution.

PCIe Gen 4 Switch Timing

Ethernet Switch/Routing

Use Scenario: Providing synchronized 100 MHz HCSL clocks to multiple PCIe Gen 4 switch ASICs in a data center top-of-rack switch.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter, phase-aligned PCIe reference clocks with Gen 4 SRNS compliance.

Use Value: Eliminates need for four discrete oscillators; reduces board area by 65% and ensures deterministic inter-lane skew <100 ps.

Use Scenario: Generating 125 MHz LVDS clocks for 10 GbE PHYs and 250 MHz CMOS clocks for packet processors in carrier-grade Ethernet switches.

IC Role / Device Role / Timing Role: Configurable clock source supporting mixed-signal timing domains with independent voltage and format per output.

Use Value: Enables single-component solution for multi-rate, multi-voltage Ethernet timing; simplifies BOM and eliminates inter-chip skew.

Broadcast Video Timing

Processor & FPGA Clocking

Use Scenario: Delivering SMPTE ST 2082-compliant 297 MHz LVDS pixel clocks and 27 MHz LVDS reference clocks to video encoder/decoder FPGAs in 4K/8K broadcast equipment.

IC Role / Device Role / Timing Role: High-precision, low-jitter quad clock generator with sub-1 ps RMS jitter at video frequencies.

Use Value: Meets broadcast-grade jitter requirements (≤1 ps RMS) without external jitter cleaners; supports frame-accurate synchronization.

Use Scenario: Supplying 500 MHz HCSL clocks to Xilinx Versal ACAPs and 100 MHz LVDS clocks to ARM-based SoCs in AI inference edge servers.

IC Role / Device Role / Timing Role: Programmable frequency translator and buffer, accepting 25 MHz crystal input and generating multiple high-frequency system clocks.

Use Value: Replaces crystal oscillator + fanout buffer + level shifter chain; reduces power by 30% vs. discrete solution.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06157-GM	Higher integration: includes integrated crystal; lower jitter (0.35 ps RMS); supports up to 12 outputs via daisy-chain	Targeted at ultra-low-jitter applications (e.g., 5G wireless fronthaul); requires no external crystal	Select when crystal integration and sub-0.4 ps jitter are mandatory; not drop-in due to different pinout and footprint
ICS853S01AGI-01LFT	Fixed-frequency, non-programmable; 4-output LVDS fanout buffer; 0.5 ps RMS jitter; no I²C interface	Used where clock frequencies are static and pre-defined; lacks frequency translation or spread spectrum	Select only for fixed-frequency buffering; cannot replace SI5338N-B06157-GMR in programmable or multi-frequency designs

Compared with Si5332A-D06157-GM and ICS853S01AGI-01LFT, SI5338N-B06157-GMR uniquely balances field-programmability, PCIe Gen 4 compliance, and 4-output flexibility in a compact 24-QFN package-making it optimal for cost-sensitive, multi-protocol systems requiring post-silicon clock tuning.

Availability

SI5338N-B06157-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching infrastructure, and broadcast video equipment requiring stable component supply and long-term lifecycle support.

Supply support for SI5338N-B06157-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for communications, automotive, and industrial markets.

The Si5338 product line was designed to replace multiple discrete oscillators and buffers in high-speed digital systems, delivering programmable, low-jitter clock generation with minimal board space and design complexity.

FAQ

What is the maximum output frequency supported by SI5338N-B06157-GMR?

The SI5338N-B06157-GMR supports up to 710 MHz on LVPECL outputs and 350 MHz on LVDS/HCSL/SSTL outputs. Two unique frequencies above 350 MHz (e.g., Fvco/4 and Fvco/6) can be generated simultaneously. This capability is confirmed in Table 6 of the Skyworks datasheet Rev. 1.6, which specifies 550–710 MHz for LVPECL and 367–473.33 MHz for LVDS under defined conditions. SI5338N-B06157-GMR maintains 0.7 ps RMS jitter even at these high frequencies when using low-noise differential inputs.

Does SI5338N-B06157-GMR support PCIe Gen 4 common clock compliance?

Yes, SI5338N-B06157-GMR is explicitly validated for PCIe Gen 4 common clock compliance. Table 12 in the Skyworks datasheet shows RMS jitter of ≤0.45 ps (typical 0.15 ps) at 100 MHz HCSL output under PCIe Gen 4 test conditions (PLL BW 2–4 MHz, CDR = 10 MHz). This meets the PCI-SIG Base Specification 4.0 rev. 0.5 requirement. SI5338N-B06157-GMR also supports Gen 3 SRNS mode with 0.11 ps RMS jitter.

Can SI5338N-B06157-GMR generate different output voltages on each channel?

Yes, SI5338N-B06157-GMR provides independent output supply pins VDDO0 through VDDO3, each configurable for 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This allows simultaneous LVDS (1.8 V) and CMOS (3.3 V) outputs without external level shifters. The feature is documented in the "Features" section and Table 3 of the datasheet, where IDDOx current values are specified per VDDO voltage and output format. SI5338N-B06157-GMR thus enables true mixed-voltage clock distribution.

How is SI5338N-B06157-GMR programmed, and what tools are required?

SI5338N-B06157-GMR is programmed via its I²C/SMBus-compatible interface using Skyworks' ClockBuilder Pro software, which generates configuration files and supports real-time register writes. The tool auto-generates initialization code for MCU integration and validates timing constraints. Programming does not require external hardware programmers-only an I²C master (e.g., microcontroller or PC-based adapter). SI5338N-B06157-GMR retains settings in one-time-programmable (OTP) memory after power cycle.

What package type and thermal characteristics does SI5338N-B06157-GMR have?

SI5338N-B06157-GMR uses a 24-lead QFN package measuring 4 mm × 4 mm with 0.5 mm pitch and an exposed thermal pad. Its thermal resistance is θJA = 37 °C/W (still air) and θJC = 10 °C/W, enabling reliable operation at full load within the –40 °C to +85 °C ambient range. The package is RoHS-compliant and compatible with standard lead-free reflow profiles. These specifications are detailed in Section 9 ("Package Outline") and Table 4 of the Skyworks datasheet Rev. 1.6.

SI5338N-B06157-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B06157-GMR FAQ

1.How can I place an order for SI5338N-B06157-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B06157-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B06157-GMR reliable?

The price and inventory of SI5338N-B06157-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B06157-GMR is usually 5 days.

3.What payment methods are accepted for SI5338N-B06157-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B06157-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B06157-GMR?

SI5338N-B06157-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B06157-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B06157-GMR?

For technical support, including SI5338N-B06157-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B06157-GMR requirements.

6.How does Aetrix verify that SI5338N-B06157-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338N-B06157-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B06157-GMR meets industry standards.

7.What is the process for return or replacement of SI5338N-B06157-GMR?

All SI5338N-B06157-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B06157-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B06157-GMR part is unused and in its original packaging.

Return procedure for SI5338N-B06157-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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