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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B06173-GM

Name: SI5338N-B06173-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B06173-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B06173-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B06173-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338N-B06173-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 and SRNS compliance, and MultiSynth™ frequency synthesis supporting 0.16–710 MHz output ranges across LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats. It replaces up to four crystal oscillators in high-speed networking and FPGA timing applications.

For engineers reviewing the SI5338N-B06173-GM datasheet, SI5338N-B06173-GM pinout, SI5338N-B06173-GM application, or SI5338N-B06173-GM equivalent, key selection criteria include PCIe Gen 4 common-clock jitter (0.15–0.45 ps RMS), independent per-output voltage control (1.5/1.8/2.5/3.3 V), 24-pin 4×4 mm QFN package, and I²C/SMBus programmability with ClockBuilder Pro support.

Technical Context

The SI5338N-B06173-GM implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers, each driving one output pair (CLKxA/CLKxB). Each synthesizer supports integer or fractional mode operation with <1 ppb frequency resolution and programmable initial phase offset (±45 ns).

It accepts six input references-including 8–30 MHz crystals, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, and 5–710 MHz differential clocks-and provides loss-of-lock and loss-of-signal alarms. Output drivers support independent format, voltage, spread-spectrum, and glitchless frequency increment/decrement (1 ppm steps) per channel.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 4 common-clock spec (≤0.45 ps RMS)
Output Frequency Range	0.16–710 MHz; supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats per channel
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, –40 to +85 °C operating range
Interface	I²C/SMBus-compatible serial interface; programmable via ClockBuilder Pro software
PCIe Compliance	Gen 1/2/3/4 Common Clock and Gen 3 SRNS compliant; validated with Intel Clock Jitter Tool

Pinout & Package

SI5338N-B06173-GM uses a 24-pin, 4 × 4 mm QFN package with exposed thermal pad. Pin assignments are fixed per the Si5338 family: IN1/IN2 (differential ref 1), IN3/IN4 (single-ended ref 1/2), IN5/IN6 (differential ref 2/3), CLK0A/CLK0B through CLK3A/CLK3B (four differential output pairs), VDDO0–VDDO3 (independent output supply pins), VDD (core supply), SCL/SDA (I²C bus), INTR (interrupt output), and RSVD_GND (reserved ground).

Pin/Terminal	Circuit Role	Design Meaning
CLK0A / CLK0B	Differential Output Pair 0	LVPECL/LVDS/HCSL/CML-capable; independently configured format, frequency, and voltage
CLK1A / CLK1B	Differential Output Pair 1	Supports same signal formats as CLK0; enables multi-frequency clock domain isolation
CLK2A / CLK2B	Differential Output Pair 2	Configurable for PCIe Gen 4 100 MHz HCSL or broadcast video 27 MHz LVDS
CLK3A / CLK3B	Differential Output Pair 3	Independent phase adjustment (<20 ps step) and spread-spectrum modulation (0.5–5.0%, 33–63 kHz)
IN1 / IN2	Differential Reference Input 1	Accepts 5–710 MHz low-jitter differential clock; internal 100 Ω termination support
IN3 / IN4	Single-Ended Reference Inputs	CMOS-compatible; 5–200 MHz; 0.7×VDD VIH threshold; supports crystal oscillator bypass
VDDO0–VDDO3	Per-Output Buffer Supply	Enables mixed-voltage system timing: e.g., 1.8 V FPGA core + 3.3 V legacy PHY
SCL / SDA	I²C Serial Interface	Standard 100/400 kHz operation; supports in-system reconfiguration without reset
INTR	Interrupt Output	Open-drain status flag for loss-of-lock or loss-of-signal events; active-low assertion

Key Features

Feature	Design Value
MultiSynth™ Synthesis	Four independent fractional-N synthesizers enable true zero-ppm accuracy on all outputs simultaneously
Glitchless Frequency Tuning	1 ppm step size with pin-controlled increment/decrement; no output interruption during dynamic adjustment
Per-Output Voltage Control	Each of four output banks powered separately at 1.5/1.8/2.5/3.3 V to match diverse load requirements
PCIe Gen 4 Ready	Validated 0.15–0.45 ps RMS jitter performance in common-clock mode per PCI-SIG specification
Spread Spectrum Clocking	Programmable on any output: 0.5–5.0% down-spread, 33–63 kHz modulation rate, reducing EMI peaks

Applications

Ethernet Switch/Routing	PCIe Gen 1–4 Timing
Use Scenario: 10 GbE line card requiring synchronous 156.25 MHz and 312.5 MHz clocks for MAC and PHY layers. IC Role / Device Role / Timing Role: Quad clock generator providing four precisely aligned, low-jitter clocks with independent voltage domains. Use Value: Eliminates four discrete oscillators; reduces board area by >60% while meeting IEEE 802.3bj jitter limits.	Use Scenario: Server motherboard with CPU, GPU, and NVMe SSD all requiring Gen 4-compliant 100 MHz reference clocks. IC Role / Device Role / Timing Role: PCIe common-clock source delivering four synchronized 100 MHz HCSL outputs with <0.45 ps RMS jitter. Use Value: Passes PCIe Gen 4 compliance testing without external jitter cleaners; supports hot-plug and link training stability.
Broadcast Video/Audio Timing	FPGA & Processor Clocking
Use Scenario: SMPTE ST 2082-1 12G-SDI encoder needing 297 MHz, 148.5 MHz, and 74.25 MHz clocks with sub-20 ps inter-channel skew. IC Role / Device Role / Timing Role: Multi-frequency clock synthesizer generating three harmonically related rates from a single 27 MHz crystal. Use Value: Achieves <100 ps output-to-output skew; eliminates timing misalignment causing video frame tearing or audio sync drift.	Use Scenario: Xilinx Kria KV260 vision AI starter kit requiring 300 MHz processor clock, 200 MHz DDR4 interface clock, and 100 MHz peripheral clock. IC Role / Device Role / Timing Role: Configurable clock source supporting mixed-signal SoC with independent voltage and format requirements per domain. Use Value: Enables single-chip clock tree for heterogeneous processing subsystems; simplifies power sequencing and layout.

Ethernet Switch/Routing

PCIe Gen 1–4 Timing

Use Scenario: 10 GbE line card requiring synchronous 156.25 MHz and 312.5 MHz clocks for MAC and PHY layers.

IC Role / Device Role / Timing Role: Quad clock generator providing four precisely aligned, low-jitter clocks with independent voltage domains.

Use Value: Eliminates four discrete oscillators; reduces board area by >60% while meeting IEEE 802.3bj jitter limits.

Use Scenario: Server motherboard with CPU, GPU, and NVMe SSD all requiring Gen 4-compliant 100 MHz reference clocks.

IC Role / Device Role / Timing Role: PCIe common-clock source delivering four synchronized 100 MHz HCSL outputs with <0.45 ps RMS jitter.

Use Value: Passes PCIe Gen 4 compliance testing without external jitter cleaners; supports hot-plug and link training stability.

Broadcast Video/Audio Timing

FPGA & Processor Clocking

Use Scenario: SMPTE ST 2082-1 12G-SDI encoder needing 297 MHz, 148.5 MHz, and 74.25 MHz clocks with sub-20 ps inter-channel skew.

IC Role / Device Role / Timing Role: Multi-frequency clock synthesizer generating three harmonically related rates from a single 27 MHz crystal.

Use Value: Achieves <100 ps output-to-output skew; eliminates timing misalignment causing video frame tearing or audio sync drift.

Use Scenario: Xilinx Kria KV260 vision AI starter kit requiring 300 MHz processor clock, 200 MHz DDR4 interface clock, and 100 MHz peripheral clock.

IC Role / Device Role / Timing Role: Configurable clock source supporting mixed-signal SoC with independent voltage and format requirements per domain.

Use Value: Enables single-chip clock tree for heterogeneous processing subsystems; simplifies power sequencing and layout.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5338A-B06173-GM	Same pinout and register map; differs only in factory-programmed NVM configuration (A vs N variant)	Pre-configured for different default output frequencies and formats; requires reprogramming for identical behavior	Select SI5338N-B06173-GM when factory OTP settings align with target design's startup timing requirements
LMK04832RHAR	Two PLLs + eight outputs; higher power (120 mA typ); supports JESD204B deterministic latency	Targeted at RF/data converter timing; lacks PCIe Gen 4 SRNS validation and integrated crystal drive	Choose LMK04832RHAR only when deterministic delay alignment across multiple devices is required

Compared with Si5338A-B06173-GM, the SI5338N-B06173-GM offers identical hardware but distinct factory OTP content; versus LMK04832RHAR, it delivers lower power, smaller footprint, and PCIe-validated jitter-making it optimal for space-constrained, standards-compliant digital systems.

Availability

SI5338N-B06173-GM is available at Aetrix Electronics and suitable for Ethernet switch/router, PCIe Gen 4 server boards, broadcast video equipment, and FPGA-based embedded systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338N-B06173-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line was designed as a highly configurable, low-jitter clock generator family targeting high-speed serial interfaces (PCIe, Ethernet, Fibre Channel) and multi-domain digital systems requiring precise, flexible timing synthesis.

FAQ

What is the maximum output frequency supported by the SI5338N-B06173-GM?

The SI5338N-B06173-GM supports up to 710 MHz on LVPECL and LVDS outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. Frequencies above 350 MHz are limited to two unique values simultaneously (Fvco/4 and Fvco/6) due to VCO constraints. All outputs maintain ≤0.7 ps RMS jitter at rated frequencies when using low-noise differential inputs.

Does the SI5338N-B06173-GM support crystal oscillator input?

Yes, the SI5338N-B06173-GM supports external crystals from 8 to 30 MHz on IN3/IN4 pins with on-chip load capacitance tuning (11–13 pF supported, 17–19 pF recommended). Crystal drive level is limited to 100 µW max, and ESR must be ≤300 Ω for 8–11 MHz units. No external components are required beyond the crystal itself.

How does the SI5338N-B06173-GM achieve PCIe Gen 4 compliance?

The SI5338N-B06173-GM achieves PCIe Gen 4 compliance through optimized PLL loop bandwidth (2–5 MHz), low intrinsic phase noise design, and factory-validated jitter performance: 0.15–0.45 ps RMS (10 kHz–50 MHz) in common-clock mode. It has been tested per PCI-SIG Base Spec 4.0 rev 0.5 using the Skyworks PCIe Clock Jitter Tool and Intel Clock Jitter Tool v1.6.4.

Can the SI5338N-B06173-GM generate different output voltages on each channel?

Yes, the SI5338N-B06173-GM provides four independent VDDOx pins (VDDO0–VDDO3), each powering one output pair. Each can be set to 1.5 V, 1.8 V, 2.5 V, or 3.3 V, enabling direct interfacing with mixed-voltage systems-for example, 1.8 V FPGA I/O banks and 3.3 V legacy peripherals-without external level shifters.

Is ClockBuilder Pro software required to configure the SI5338N-B06173-GM?

No, ClockBuilder Pro is optional but strongly recommended for SI5338N-B06173-GM configuration. The device supports full I²C/SMBus register access for custom firmware integration. However, ClockBuilder Pro automates complex MultiSynth™ calculations, validates jitter performance, generates initialization code, and exports configuration files-reducing development time from days to hours.

SI5338N-B06173-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B06173-GM FAQ

1.How can I place an order for SI5338N-B06173-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B06173-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B06173-GM reliable?

The price and inventory of SI5338N-B06173-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B06173-GM is usually 5 days.

3.What payment methods are accepted for SI5338N-B06173-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B06173-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B06173-GM?

SI5338N-B06173-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B06173-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B06173-GM?

For technical support, including SI5338N-B06173-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B06173-GM requirements.

6.How does Aetrix verify that SI5338N-B06173-GM is sourced from the original manufacturer or authorized distributors?

All SI5338N-B06173-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B06173-GM meets industry standards.

7.What is the process for return or replacement of SI5338N-B06173-GM?

All SI5338N-B06173-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B06173-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B06173-GM part is unused and in its original packaging.

Return procedure for SI5338N-B06173-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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