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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B06174-GM

Name: SI5338N-B06174-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B06174-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B06174-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B06174-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338N-B06174-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis. It delivers four independent, any-frequency clocks (0.16–710 MHz) with 0.7 ps RMS phase jitter, PCIe Gen 1–4 compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL outputs. It replaces up to four crystal oscillators in FPGA, processor, and Ethernet switch timing systems.

For engineers reviewing the SI5338N-B06174-GM datasheet, SI5338N-B06174-GM pinout, SI5338N-B06174-GM application, or SI5338N-B06174-GM equivalent, key selection criteria include differential output jitter performance, I²C configurability across four independent channels, PCIe Gen 4 SRNS compliance, spread-spectrum control per output, and 4×4 mm 24-QFN package integration.

Technical Context

The SI5338N-B06174-GM implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers. Each output driver supports programmable voltage (1.5/1.8/2.5/3.3 V), format, and phase offset (±45 ns in <20 ps steps).

It accepts six input references - including 8–30 MHz crystals, 5–200 MHz CMOS, and 5–710 MHz differential signals - and enables zero-ppm accuracy on all outputs via integer or fractional synthesis. External feedback mode supports zero-delay operation with loss-of-lock and loss-of-signal alarms.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Count & Type	4 differential clock outputs (CLK0A/B through CLK3A/B); supports LVPECL, LVDS, HCSL, CML, SSTL, HSTL, CMOS
Frequency Range	0.16–710 MHz per output; up to two >350 MHz frequencies simultaneously (Fvco/4 and Fvco/6)
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz), meeting PCIe Gen 3/4 SRNS and GbE jitter requirements
Supply Voltages	Core: 1.8/2.5/3.3 V; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V per driver
Input Flexibility	6 inputs: 2 differential pairs (IN1/2, IN5/6), 2 single-ended (IN3/IN4), 1 crystal (IN1/IN2), 1 external feedback path
Control Interface	I²C/SMBus-compatible serial interface; ClockBuilder Pro software support for register configuration
Operating Temperature	–40 °C to +85 °C ambient, qualified for industrial and telecom line card environments

Pinout & Package

SI5338N-B06174-GM is housed in a 4 × 4 mm, 24-pin QFN package with exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.

Pin/Terminal	Circuit Role	Design Meaning
CLK0A / CLK0B	Differential Output Pair 0	LVPECL/LVDS/HCSL/CML-capable; independently configured frequency, format, voltage, and phase
CLK1A / CLK1B	Differential Output Pair 1	Same configurability as CLK0; supports integer/fractional synthesis and SSC modulation
CLK2A / CLK2B	Differential Output Pair 2	Programmable drive strength and termination; compatible with PCIe Gen 4 common clock topology
CLK3A / CLK3B	Differential Output Pair 3	Supports independent spread-spectrum control (0.5–5.0% spread, 33–63 kHz modulation rate)
IN1 / IN2	Differential Input / Crystal Terminal	Accepts 5–710 MHz differential clock or 8–30 MHz crystal; internal load capacitance selectable (11–13 pF)
IN3 / IN4	Single-Ended Input	CMOS-compatible (5–200 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD; 4 pF input capacitance
IN5 / IN6	Secondary Differential Input	Full 5–710 MHz range; supports redundant reference switching or multi-source timing architectures
SCL / SDA	I²C Serial Interface	Standard 100/400 kHz operation; supports write-only programming and read-back of status registers
INTR	Interrupt Output	Open-drain alarm signal indicating loss-of-lock, loss-of-signal, or configuration error
VDD / VDDO0–VDDO3	Power Supplies	VDD = core supply (1.8/2.5/3.3 V); VDDOx = independent output buffer supplies (1.5–3.3 V)
GND / RSVD_GND	Ground Connections	Multiple dedicated ground pins and reserved ground pad for low-impedance return path and EMI reduction

Key Features

Feature	Design Value
MultiSynth™ Synthesis	Four independent fractional-N synthesizers enabling true zero-ppm frequency accuracy on each output
PCIe Gen 4 Compliance	Meets SRNS jitter spec (≤0.32 ps RMS) at 100 MHz HCSL with 2–5 MHz PLL bandwidth and 10 MHz CDR
Per-Output Spread Spectrum	Configurable down-spread (0.5–5.0%) and modulation rate (33–63 kHz) to reduce EMI without affecting system timing margin
Glitchless Frequency Tuning	Independent ±1 ppm frequency increment/decrement via pin control or I²C, updating in ≤667 ns
Phase Adjustment Precision	Programmable initial phase offset (±45 ns) and fine-tuning in <20 ps steps for skew-critical applications
Flexible Reference Inputs	Supports crystal, CMOS, SSTL/HSTL, and differential inputs - enabling drop-in replacement of legacy clock sources

Applications

Processor & FPGA Clocking	PCIe Gen 1–4 Timing
Use Scenario: Providing synchronized, low-jitter clocks to multi-core processors and high-speed FPGAs in embedded computing and AI acceleration platforms. IC Role / Device Role / Timing Role: Quad-output clock generator delivering independent CPU, DDR, PCIe, and peripheral clocks from a single device. Use Value: Eliminates four discrete oscillators; reduces board area by >60% and simplifies layout with matched trace lengths and deterministic skew (<100 ps).	Use Scenario: Generating compliant reference clocks for PCIe root complexes, switches, and endpoints in servers and storage systems. IC Role / Device Role / Timing Role: Common clock source meeting PCIe Gen 4 SRNS jitter limits (≤0.32 ps RMS) and supporting spread-spectrum modulation. Use Value: Enables single-chip timing for x16 lanes while maintaining PCIe Base Spec 4.0 compliance and reducing EMI emissions.
Ethernet Switch/Routing	Broadcast Video Timing
Use Scenario: Delivering precise 125 MHz, 156.25 MHz, and 312.5 MHz clocks to 1/10 GbE PHYs, MACs, and packet processors. IC Role / Device Role / Timing Role: Any-frequency synthesizer generating IEEE 802.3-compliant clocks with sub-ps jitter for deterministic latency. Use Value: Supports multi-rate Ethernet (1G/2.5G/5G/10G) from one device; eliminates need for separate oscillators per speed grade.	Use Scenario: Synchronizing frame-accurate timing across SDI transmitters, video encoders, and genlock systems in broadcast infrastructure. IC Role / Device Role / Timing Role: Low-phase-noise clock generator producing SMPTE ST 2059-2–compliant 27 MHz, 74.25 MHz, and 148.5 MHz outputs. Use Value: Achieves <10 ps cycle-cycle jitter critical for 4K/8K video transport; supports dual-reference redundancy via IN5/IN6 inputs.

Processor & FPGA Clocking

PCIe Gen 1–4 Timing

Use Scenario: Providing synchronized, low-jitter clocks to multi-core processors and high-speed FPGAs in embedded computing and AI acceleration platforms.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering independent CPU, DDR, PCIe, and peripheral clocks from a single device.

Use Value: Eliminates four discrete oscillators; reduces board area by >60% and simplifies layout with matched trace lengths and deterministic skew (<100 ps).

Use Scenario: Generating compliant reference clocks for PCIe root complexes, switches, and endpoints in servers and storage systems.

IC Role / Device Role / Timing Role: Common clock source meeting PCIe Gen 4 SRNS jitter limits (≤0.32 ps RMS) and supporting spread-spectrum modulation.

Use Value: Enables single-chip timing for x16 lanes while maintaining PCIe Base Spec 4.0 compliance and reducing EMI emissions.

Ethernet Switch/Routing

Broadcast Video Timing

Use Scenario: Delivering precise 125 MHz, 156.25 MHz, and 312.5 MHz clocks to 1/10 GbE PHYs, MACs, and packet processors.

IC Role / Device Role / Timing Role: Any-frequency synthesizer generating IEEE 802.3-compliant clocks with sub-ps jitter for deterministic latency.

Use Value: Supports multi-rate Ethernet (1G/2.5G/5G/10G) from one device; eliminates need for separate oscillators per speed grade.

Use Scenario: Synchronizing frame-accurate timing across SDI transmitters, video encoders, and genlock systems in broadcast infrastructure.

IC Role / Device Role / Timing Role: Low-phase-noise clock generator producing SMPTE ST 2059-2–compliant 27 MHz, 74.25 MHz, and 148.5 MHz outputs.

Use Value: Achieves <10 ps cycle-cycle jitter critical for 4K/8K video transport; supports dual-reference redundancy via IN5/IN6 inputs.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06174-GM	Higher integration: includes integrated LDOs, enhanced jitter filtering, and higher-frequency VCO (up to 14 GHz); supports up to 12 outputs	Targeted at high-end networking and optical transport where ultra-low jitter (<0.2 ps RMS) and multi-output fanout are required	Select when needing lower jitter, integrated power regulation, or >4 outputs; not pin-compatible with SI5338N-B06174-GM
ICS853S01AG-01LF	Fixed-frequency, non-programmable quad LVDS buffer; no synthesis capability; 0.5 ps RMS jitter at 156.25 MHz	Suitable only for static clock distribution; lacks I²C configuration, spread spectrum, or frequency agility	Choose only for cost-sensitive, fixed-clock applications where reconfiguration is unnecessary and external synthesizer exists

Compared with Si5332A-D06174-GM, SI5338N-B06174-GM offers broader input flexibility and lower BOM count for mid-tier designs, while ICS853S01AG-01LF provides simpler, lower-power buffering where synthesis is handled elsewhere.

Availability

SI5338N-B06174-GM is available at Aetrix Electronics and suitable for Ethernet switch/router, PCIe Gen 1–4 endpoint timing, and broadcast video synchronization requiring stable component supply and long-term industrial lifecycle support.

Supply support for SI5338N-B06174-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, and industrial markets.

The Si5338 product line was designed for high-performance, software-configurable clock generation in space-constrained systems requiring PCIe, Ethernet, and video timing compliance - emphasizing low jitter, multi-format outputs, and field-programmability.

FAQ

What is the maximum output frequency supported by SI5338N-B06174-GM?

The SI5338N-B06174-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. However, only two unique frequencies above 350 MHz can be generated simultaneously - specifically Fvco/4 and Fvco/6 - due to VCO architecture constraints confirmed in the Si5338 datasheet Section 3.3.

Does SI5338N-B06174-GM support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338N-B06174-GM meets PCIe Gen 4 SRNS jitter requirements (≤0.32 ps RMS) when configured with a 2–5 MHz PLL bandwidth and 10 MHz CDR, using HCSL outputs at 100 MHz. This is verified in Table 12 of the official Skyworks datasheet Rev. 1.6 under "PCIe Gen 3 Separate Reference No Spread, SRNS" test conditions.

Can SI5338N-B06174-GM operate with a 25 MHz crystal input?

No - SI5338N-B06174-GM supports crystal inputs only in the 8–30 MHz range, but the datasheet specifies four distinct crystal bands (8–11, 11–19, 19–26, 26–30 MHz) with defined load capacitance and ESR limits. A 25 MHz crystal falls within the 19–26 MHz band and is fully supported with recommended 18 pF load capacitance and ≤100 Ω ESR.

How many independent spread-spectrum modulation settings does SI5338N-B06174-GM support?

SI5338N-B06174-GM supports independent spread-spectrum control on any enabled output: each of the four outputs can be configured with unique spread percentage (0.5–5.0%), modulation rate (33–63 kHz), and direction (down-spread only). This is explicitly documented in the Features section and Table 5 of the datasheet.

Is SI5338N-B06174-GM pin-compatible with other Si5338 variants like SI5338A or SI5338B?

Yes - all Si5338 variants, including SI5338N-B06174-GM, share identical 24-QFN package dimensions, pinout, and footprint per Skyworks Package Outline Document (Section 9, Rev. 1.6). The 'N' suffix denotes factory-programmed configuration, but mechanical and electrical pin compatibility is maintained across the Si5338 family.

SI5338N-B06174-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B06174-GM FAQ

1.How can I place an order for SI5338N-B06174-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B06174-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B06174-GM reliable?

The price and inventory of SI5338N-B06174-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B06174-GM is usually 5 days.

3.What payment methods are accepted for SI5338N-B06174-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B06174-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B06174-GM?

SI5338N-B06174-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B06174-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B06174-GM?

For technical support, including SI5338N-B06174-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B06174-GM requirements.

6.How does Aetrix verify that SI5338N-B06174-GM is sourced from the original manufacturer or authorized distributors?

All SI5338N-B06174-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B06174-GM meets industry standards.

7.What is the process for return or replacement of SI5338N-B06174-GM?

All SI5338N-B06174-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B06174-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B06174-GM part is unused and in its original packaging.

Return procedure for SI5338N-B06174-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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