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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B06177-GM

Name: SI5338N-B06177-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B06177-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B06177-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B06177-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

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Product details

Overview

SI5338N-B06177-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338N-B06177-GM datasheet, SI5338N-B06177-GM pinout, SI5338N-B06177-GM application, or SI5338N-B06177-GM equivalent, key selection considerations include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage per driver (1.5–3.3 V), flexible reference inputs (crystal, CMOS, SSTL/HSTL, differential), and PCIe/10GbE/Ethernet switch timing validation support.

Technical Context

The SI5338N-B06177-GM implements a two-stage PLL architecture: a high-stability integer-N PLL (Stage 1) locks to one of six input references, followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating each output with zero-ppm precision. Its output stage supports mixed-signal formats-LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL-with per-driver voltage control and programmable phase/frequency increment/decrement.

It features loss-of-lock and loss-of-signal alarms, external feedback mode for zero-delay operation, and spread-spectrum clocking (0.5–5.0% spread, 33–63 kHz modulation) on any output. The device operates across –40 to +85 °C and supports I²C/SMBus programming via ClockBuilder Pro software.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS & Gen 4 common clock jitter requirements
Output Frequency Range	0.16–710 MHz per channel; supports LVPECL/LVDS (≤710 MHz), HCSL (≤250 MHz), CMOS (≤200 MHz), SSTL/HSTL (≤350 MHz)
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, moisture sensitivity level 3
Operating Temperature	–40 °C to +85 °C ambient; validated for industrial and telecom line card environments
Power Consumption	45 mA typical core current at 100 MHz on all outputs with 25 MHz reference

Pinout & Package

SI5338N-B06177-GM uses a 24-pin QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per Si5338 family specification and include six input pins (IN1–IN6), eight output pins (CLK0A/B through CLK3A/B), four VDDOx power pins, dual VDD core supplies, SCL/SDA/I²C interface, INTR alarm output, and reserved ground.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential clock inputs	Accept AC-coupled differential references up to 710 MHz; require external 100 Ω termination
IN3, IN4	Single-ended clock inputs	Support CMOS/SSTL/HSTL references (5–350 MHz); DC-coupled with internal bias
CLK0A–CLK3B	Differential output pairs	Four independent output drivers; each pair supports LVPECL/LVDS/HCSL/CML with per-channel VDDO
VDDO0–VDDO3	Output buffer supply rails	Enable independent voltage setting per output driver (1.5–3.3 V) for mixed-interface systems
VDD	Core supply	Single 1.8/2.5/3.3 V supply powers PLL, logic, and MultiSynth engines
SCL, SDA	I²C/SMBus interface	Standard 2-wire serial interface for configuration; supports ClockBuilder Pro programming
INTR	Interrupt output	Open-drain status pin asserting on loss-of-lock or loss-of-signal events

Key Features

Feature	Design Value
MultiSynth™ frequency synthesis	Enables true zero-ppm accuracy on all four outputs with independent fractional-N synthesis per channel
PCIe Gen 1–4 timing compliance	Validated for Common Clock (Gen 1–4) and Gen 3 Separate Reference No Spread (SRNS) modes per PCI-SIG specs
Independent output voltage control	Each of four output drivers powered from separate VDDO rail (1.5/1.8/2.5/3.3 V), enabling mixed-voltage system clocking
Programmable phase adjustment	±45 ns range in <20 ps steps per output, supporting precise skew alignment in multi-lane interfaces like PCIe or Ethernet
Glitchless frequency tuning	1 ppm step size with pin-controlled increment/decrement, enabling real-time dynamic frequency scaling without output interruption
Spread-spectrum clocking (SSC)	Configurable on any output: 0.5–5.0% down-spread, 33–63 kHz modulation rate, reducing EMI in dense PCB layouts

Applications

PCIe Gen 3/4 Timing	Ethernet Switch Clocking
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 3/4 root complexes and endpoints in server backplanes or AI accelerator cards. IC Role / Device Role / Timing Role: Quad-output clock generator delivering Common Clock topology with sub-0.45 ps RMS jitter per PCIe Gen 4 spec. Use Value: Eliminates need for four discrete oscillators while meeting stringent PCIe jitter masks and enabling shared reference architecture.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs, MACs, and packet processors in enterprise switches. IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact IEEE 802.3-compliant rates with independent format/voltage per port. Use Value: Reduces BOM count and layout complexity while supporting mixed-rate, mixed-interface (LVDS/HCSL/CMOS) Ethernet subsystems.
Broadcast Video Timing	FPGA/Processor Clocking
Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) 297 MHz, ST 2081 (6G-SDI) 148.5 MHz, and genlock reference clocks to video processing FPGAs and serializers. IC Role / Device Role / Timing Role: Low-jitter (<1 ps RMS) quad generator with programmable phase offset for frame-synchronized multi-channel video paths. Use Value: Enables deterministic inter-frame alignment across multiple video pipelines without external delay lines or manual trimming.	Use Scenario: Supplying core, memory, and peripheral clocks (e.g., 500 MHz processor clock, 1600 MT/s DDR4 clock, 48 MHz USB clock) to Xilinx Versal or Intel Agilex FPGAs. IC Role / Device Role / Timing Role: Configurable clock source supporting mixed signal formats (LVDS for memory, HCSL for PCIe, CMOS for peripherals) from single IC. Use Value: Simplifies FPGA power-up sequencing and eliminates timing margin risks from multiple oscillator tolerances and aging drift.

PCIe Gen 3/4 Timing

Ethernet Switch Clocking

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 3/4 root complexes and endpoints in server backplanes or AI accelerator cards.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering Common Clock topology with sub-0.45 ps RMS jitter per PCIe Gen 4 spec.

Use Value: Eliminates need for four discrete oscillators while meeting stringent PCIe jitter masks and enabling shared reference architecture.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs, MACs, and packet processors in enterprise switches.

IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact IEEE 802.3-compliant rates with independent format/voltage per port.

Use Value: Reduces BOM count and layout complexity while supporting mixed-rate, mixed-interface (LVDS/HCSL/CMOS) Ethernet subsystems.

Broadcast Video Timing

FPGA/Processor Clocking

Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) 297 MHz, ST 2081 (6G-SDI) 148.5 MHz, and genlock reference clocks to video processing FPGAs and serializers.

IC Role / Device Role / Timing Role: Low-jitter (<1 ps RMS) quad generator with programmable phase offset for frame-synchronized multi-channel video paths.

Use Value: Enables deterministic inter-frame alignment across multiple video pipelines without external delay lines or manual trimming.

Use Scenario: Supplying core, memory, and peripheral clocks (e.g., 500 MHz processor clock, 1600 MT/s DDR4 clock, 48 MHz USB clock) to Xilinx Versal or Intel Agilex FPGAs.

IC Role / Device Role / Timing Role: Configurable clock source supporting mixed signal formats (LVDS for memory, HCSL for PCIe, CMOS for peripherals) from single IC.

Use Value: Simplifies FPGA power-up sequencing and eliminates timing margin risks from multiple oscillator tolerances and aging drift.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06177-GM	Higher integration: includes integrated crystal, lower jitter (0.35 ps RMS), supports up to 10 outputs, but larger 32-QFN package	Better suited for space-constrained designs requiring ultra-low jitter and crystal-free operation	Select when crystal integration and sub-0.4 ps jitter are mandatory; avoid if footprint or cost sensitivity favors Si5338N
ICS853S01AG-01	Fixed-frequency (non-programmable), 4-output LVDS clock fanout buffer; no synthesis capability, higher jitter (1.2 ps RMS)	Limited to static clock distribution; cannot replace multiple crystals or translate frequencies	Choose only for simple fanout where frequency flexibility and low jitter are not required

Compared with Si5332A-D06177-GM and ICS853S01AG-01, SI5338N-B06177-GM uniquely balances field-programmability, PCIe Gen 4 compliance, and compact 24-QFN packaging - making it optimal for mid-tier networking and FPGA-based systems needing reconfigurable timing without crystal integration overhead.

Availability

SI5338N-B06177-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 timing, 10GbE switch clocking, and broadcast video synchronization requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338N-B06177-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces including PCIe, Ethernet, Fibre Channel, and broadcast video - designed to replace multiple discrete oscillators with a single configurable IC.

FAQ

What is the maximum output frequency supported by SI5338N-B06177-GM in LVPECL format?

SI5338N-B06177-GM supports LVPECL outputs up to 710 MHz. This capability is confirmed in Table 6 of the official datasheet under "Output Clocks (Differential)" for LVPECL/LVDS/CML formats. Operation above 350 MHz is limited to two unique frequencies simultaneously (Fvco/4 and Fvco/6), and requires proper termination and layout to maintain jitter performance. SI5338N-B06177-GM maintains 0.7 ps RMS typical phase jitter at these frequencies when driven from a low-noise differential reference.

Does SI5338N-B06177-GM support PCIe Gen 4 Common Clock compliance?

Yes, SI5338N-B06177-GM is explicitly validated for PCIe Gen 4 Common Clock compliance, with RMS jitter ≤ 0.45 ps (10 kHz–50 MHz) per Table 12 of the datasheet. It achieves this using a PLL loop bandwidth of 2–5 MHz and supports the required CDR frequency of 10 MHz. SI5338N-B06177-GM also meets PCIe Gen 3 SRNS requirements, making it suitable for both legacy and next-generation host systems.

Can SI5338N-B06177-GM generate different output voltages on each of its four drivers?

Yes, SI5338N-B06177-GM provides independent VDDOx supply pins (VDDO0–VDDO3) allowing each of its four output drivers to be powered at 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This enables simultaneous generation of LVDS (2.5/3.3 V), HCSL (1.8 V), and CMOS (3.3 V) signals from a single device. The SI5338N-B06177-GM datasheet confirms this in the "Features" section and Table 1 under Recommended Operating Conditions.

How is SI5338N-B06177-GM programmed, and is external hardware required?

SI5338N-B06177-GM is programmed via its I²C/SMBus-compatible serial interface using Skyworks' ClockBuilder Pro software - a free GUI tool that generates configuration files and registers settings. No dedicated programmer hardware is required; standard I²C master (e.g., MCU or PC-based adapter) suffices. SI5338N-B06177-GM supports both volatile register writes and non-volatile OTP memory programming for factory pre-configuration.

What is the operating temperature range for SI5338N-B06177-GM?

SI5338N-B06177-GM is rated for industrial operation from –40 °C to +85 °C ambient temperature, as specified in Table 1 (Recommended Operating Conditions) and confirmed across electrical, jitter, and thermal characterization sections of the datasheet. This range supports deployment in telecom line cards, network switches, and broadcast equipment without derating.

SI5338N-B06177-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B06177-GM FAQ

1.How can I place an order for SI5338N-B06177-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B06177-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B06177-GM reliable?

The price and inventory of SI5338N-B06177-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B06177-GM is usually 5 days.

3.What payment methods are accepted for SI5338N-B06177-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B06177-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B06177-GM?

SI5338N-B06177-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B06177-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B06177-GM?

For technical support, including SI5338N-B06177-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B06177-GM requirements.

6.How does Aetrix verify that SI5338N-B06177-GM is sourced from the original manufacturer or authorized distributors?

All SI5338N-B06177-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B06177-GM meets industry standards.

7.What is the process for return or replacement of SI5338N-B06177-GM?

All SI5338N-B06177-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B06177-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B06177-GM part is unused and in its original packaging.

Return procedure for SI5338N-B06177-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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