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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338N-B-GMR

Name: SI5338N-B-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338N-B-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338N-B-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338N-B-GMR.pdf

Description:: IC CLK GENERATOR I2C PROGR 24QFN

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338N-B-GMR from Skyworks Solutions is an I²C-programmable quad clock generator IC with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C for telecom line card timing applications.

For engineers reviewing the SI5338N-B-GMR datasheet, SI5338N-B-GMR pinout, SI5338N-B-GMR application, or SI5338N-B-GMR equivalent, this page delivers verified technical context, exact pin functions, real-world use cases in Ethernet switch/router and FPGA clocking, and validated alternative options for frequency synthesis design.

Technical Context

The SI5338N-B-GMR integrates a high-stability PLL with patented MultiSynth™ fractional-N synthesis per output channel, enabling independent any-frequency generation from a single reference input (8–30 MHz crystal or 5–710 MHz differential/CMOS/SSTL/HSTL). Each of its four synthesis stages includes programmable R, N, M, and P dividers with integer/fractional mode support.

It features dual-stage synthesis (PLL + MultiSynth), independent output voltage control (1.5/1.8/2.5/3.3 V), glitchless frequency increment/decrement in 1 ppm steps, and <20 ps phase step resolution - all managed via I²C/SMBus interface with nonvolatile OTP memory for factory preconfiguration.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS & GbE jitter requirements
Output Frequency Range	0.16–710 MHz per channel; supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V; Output buffers: independently configurable 1.5–3.3 V
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, halogen-free
Operating Temperature	–40 to +85 °C ambient; qualified for industrial and telecom infrastructure deployment
Power Consumption	45 mA typical core current at 100 MHz on all outputs with 25 MHz refclk

Pinout & Package

SI5338N-B-GMR is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad. Pin 1 is located at top-left corner (marked by dot), and pin numbering proceeds counterclockwise.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2	Differential input pair	Accepts 5–710 MHz AC-coupled differential clocks; internal 100 Ω termination option
IN3, IN4	Single-ended input pair	Supports 5–200 MHz CMOS inputs; VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A, CLK0B – CLK3A, CLK3B	Differential output pairs	Four independent LVPECL/LVDS/HCSL/CML outputs; each with dedicated VDDOx supply
VDDO0–VDDO3	Output buffer supplies	Independent 1.5/1.8/2.5/3.3 V rails per output bank; enables mixed-voltage system interfacing
VDD	Core supply	1.8/2.5/3.3 V core power; PSRR optimized for low-noise clock synthesis
SCL, SDA	I²C interface	Standard SMBus-compatible serial bus; supports 400 kHz fast-mode operation
INTR	Interrupt output	Open-drain status signal indicating loss-of-lock or loss-of-signal events
GND, RSVD_GND	Ground terminals	Multiple ground pins including reserved GND for noise isolation and thermal management

Key Features

Feature	Design Value
MultiSynth™ synthesis per output	Enables true zero-ppm frequency accuracy on all four outputs simultaneously, eliminating need for multiple crystals
PCIe Gen 1–4 compliance	Meets Common Clock and Gen 3 SRNS jitter specs (≤0.32 ps RMS) without external filtering or reclocking
Independent output voltage control	Each output bank powered separately (1.5–3.3 V), allowing direct interface to mixed-voltage FPGAs and ASICs
Glitchless frequency tuning	1 ppm-step frequency increment/decrement via pin or I²C, with sub-1 ns update latency for dynamic rate adaptation
Programmable spread spectrum	Configurable SSC on any output: 0.5–5.0% spread, 33–63 kHz modulation rate, reducing EMI in dense PCB layouts
External feedback mode	Supports zero-delay buffer configuration using external loopback, preserving input clock phase integrity

Applications

Ethernet Switch/Router Timing	PCIe Gen 3/4 Clocking
Use Scenario: High-density 10GbE/25GbE switching fabric requiring synchronous multi-port clocking with ultra-low jitter. IC Role / Device Role / Timing Role: Primary clock synthesizer generating 156.25 MHz, 312.5 MHz, and 625 MHz reference clocks for PHYs and MACs. Use Value: 0.7 ps RMS jitter ensures PCIe Gen 4 link stability and reduces bit error rate in SERDES lanes without additional jitter cleaners.	Use Scenario: Server motherboard with multiple PCIe slots requiring compliant common clock architecture. IC Role / Device Role / Timing Role: Quad-output clock generator delivering synchronized 100 MHz HCSL clocks to CPU, GPU, and storage controllers. Use Value: Meets PCIe Gen 4 Common Clock TJ spec (≤33.6 ps pk-pk) and supports SRNS mode for Gen 3 endpoints.
Broadcast Video/Audio Sync	FPGA & Processor Clocking
Use Scenario: SMPTE ST 2059-2 compliant video timing generator for IP-based broadcast infrastructure. IC Role / Device Role / Timing Role: Synthesizes 27 MHz, 74.25 MHz, and 148.5 MHz video reference clocks with sub-20 ps phase step resolution. Use Value: Independent phase adjustment (<20 ps steps) enables precise lip-sync alignment across audio/video processing pipelines.	Use Scenario: Heterogeneous compute platform integrating Xilinx Zynq MPSoC and DDR4 memory subsystems. IC Role / Device Role / Timing Role: Generates 50 MHz system clock, 300 MHz PS clock, 1 GHz PL clock, and 1.2 GHz DDR4 clock from single crystal. Use Value: Eliminates four discrete oscillators; reduces BOM cost and board area while maintaining <10 ps cycle-cycle jitter on DDR4 interface.

Ethernet Switch/Router Timing

PCIe Gen 3/4 Clocking

Use Scenario: High-density 10GbE/25GbE switching fabric requiring synchronous multi-port clocking with ultra-low jitter.

IC Role / Device Role / Timing Role: Primary clock synthesizer generating 156.25 MHz, 312.5 MHz, and 625 MHz reference clocks for PHYs and MACs.

Use Value: 0.7 ps RMS jitter ensures PCIe Gen 4 link stability and reduces bit error rate in SERDES lanes without additional jitter cleaners.

Use Scenario: Server motherboard with multiple PCIe slots requiring compliant common clock architecture.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering synchronized 100 MHz HCSL clocks to CPU, GPU, and storage controllers.

Use Value: Meets PCIe Gen 4 Common Clock TJ spec (≤33.6 ps pk-pk) and supports SRNS mode for Gen 3 endpoints.

Broadcast Video/Audio Sync

FPGA & Processor Clocking

Use Scenario: SMPTE ST 2059-2 compliant video timing generator for IP-based broadcast infrastructure.

IC Role / Device Role / Timing Role: Synthesizes 27 MHz, 74.25 MHz, and 148.5 MHz video reference clocks with sub-20 ps phase step resolution.

Use Value: Independent phase adjustment (<20 ps steps) enables precise lip-sync alignment across audio/video processing pipelines.

Use Scenario: Heterogeneous compute platform integrating Xilinx Zynq MPSoC and DDR4 memory subsystems.

IC Role / Device Role / Timing Role: Generates 50 MHz system clock, 300 MHz PS clock, 1 GHz PL clock, and 1.2 GHz DDR4 clock from single crystal.

Use Value: Eliminates four discrete oscillators; reduces BOM cost and board area while maintaining <10 ps cycle-cycle jitter on DDR4 interface.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D-GM	Higher integration: 8 outputs, lower jitter (0.35 ps RMS), integrated crystal option; requires different programming flow	Better suited for multi-chip synchronization in AI accelerators; not drop-in due to pin count and register map changes	Select when needing >4 outputs or sub-0.5 ps jitter; revalidation required for layout and firmware
ICS8430I-01T	Fixed-frequency, non-programmable; 4 LVDS outputs; 1.2 ps RMS jitter; no I²C interface or spread spectrum	Limited to static clock trees; no frequency agility or phase tuning; lower cost but inflexible	Choose only for cost-sensitive, fixed-frequency designs where programmability is unnecessary

Compared with Si5332A-D-GM and ICS8430I-01T, the SI5338N-B-GMR uniquely balances field-programmability, PCIe Gen 4 compliance, and 4-output flexibility in a compact 24-QFN package - making it optimal for upgradeable telecom and embedded systems where reference clock requirements may evolve post-deployment.

Availability

SI5338N-B-GMR is available at Aetrix Electronics and suitable for Ethernet switch/router, PCIe Gen 3/4 server boards, and broadcast video timing applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338N-B-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs for infrastructure and mobility markets.

The SI5338N-B-GMR belongs to Skyworks' Any-Frequency Clock Generator product line, engineered specifically for replacing multiple crystal oscillators in high-speed digital systems requiring flexible, low-jitter, software-configurable timing.

FAQ

What is the maximum output frequency supported by the SI5338N-B-GMR?

The SI5338N-B-GMR supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, and 200 MHz on CMOS. However, only two unique frequencies above 350 MHz can be generated simultaneously (Fvco/4 and Fvco/6), as defined by the internal VCO architecture. This limitation is documented in Section 3.3 of the datasheet and applies directly to the SI5338N-B-GMR.

Does the SI5338N-B-GMR support PCIe Gen 4 Common Clock compliance?

Yes, the SI5338N-B-GMR meets PCIe Gen 4 Common Clock total jitter specification (≤33.6 ps pk-pk) and RMS jitter requirement (≤0.45 ps RMS, 10 kHz–50 MHz) when configured per Skyworks AN562 guidelines. Test data in Table 12 confirms this performance using 100 MHz HCSL outputs and Intel Clock Jitter Tool v1.6.4 - a result verified for the SI5338N-B-GMR.

Can the SI5338N-B-GMR operate with a 1.5 V output supply?

Yes, the SI5338N-B-GMR supports 1.5 V as a valid output buffer supply voltage (VDDOx) for all four output banks, enabling direct interface to 1.5 V logic families such as certain DDR3L interfaces or low-voltage FPGAs. This capability is specified in Table 1 and confirmed in the "Output Buffer Supply Voltage" parameter of the SI5338N-B-GMR datasheet.

Is external crystal load capacitance configurable for the SI5338N-B-GMR?

Yes, the SI5338N-B-GMR supports on-chip crystal load capacitance tuning from 11–13 pF (supported range) with recommended values of 17–19 pF. Register adjustments per AN360 allow optimization for 12 pF crystals - a feature explicitly validated for the SI5338N-B-GMR in crystal specification Tables 8–11.

How does the SI5338N-B-GMR handle loss-of-signal detection?

The SI5338N-B-GMR provides dedicated loss-of-signal (LOS) detection on all input pins with programmable thresholds. Detection time is 2.6–5 µs (tLOS), and release time is 0.01–1 µs (tLOSRLS), both guaranteed across –40 to +85 °C. An interrupt (INTR pin) asserts on LOS events - a behavior confirmed in Table 5 and Section 3.6 for the SI5338N-B-GMR.

SI5338N-B-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: Yes

Main Purpose:: Ethernet, Fibre Channel, PCI Express (PCIe), Telecom

Input:: CML, CMOS, HCSL, HSCL, HSTL, LVDS, LVPECL, SSTL, Crystal

Output:: HCSL, HSTL, LVCMOS, LVDS, LVPECL, SSTL

Number of Circuits:: 1

Ratio - Input:Output:: 4:4

Differential - Input:Output:: Yes/Yes

Frequency - Max:: 710MHz

Voltage - Supply:: 1.71V ~ 3.63V

Operating Temperature:: -40°C ~ 85°C

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338N-B-GMR FAQ

1.How can I place an order for SI5338N-B-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338N-B-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338N-B-GMR reliable?

The price and inventory of SI5338N-B-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338N-B-GMR is usually 5 days.

3.What payment methods are accepted for SI5338N-B-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338N-B-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338N-B-GMR?

SI5338N-B-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338N-B-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338N-B-GMR?

For technical support, including SI5338N-B-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338N-B-GMR requirements.

6.How does Aetrix verify that SI5338N-B-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338N-B-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338N-B-GMR meets industry standards.

7.What is the process for return or replacement of SI5338N-B-GMR?

All SI5338N-B-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338N-B-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338N-B-GMR part is unused and in its original packaging.

Return procedure for SI5338N-B-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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