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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338P-B04734-GM

Name: SI5338P-B04734-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338P-B04734-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338P-B04734-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338P-B04734-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338P-B04734-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis, delivering four independent low-jitter clocks (0.7 ps RMS typ), PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL output formats across 0.16–710 MHz. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338P-B04734-GM datasheet, SI5338P-B04734-GM pinout, SI5338P-B04734-GM application, or SI5338P-B04734-GM equivalent, key selection criteria include PCIe Gen 4 jitter compliance (0.15–0.45 ps RMS), independent per-output voltage control (1.5/1.8/2.5/3.3 V), 4× differential output capability, 24-QFN package footprint, and I²C/SMBus programmability with ClockBuilder Pro support.

Technical Context

The SI5338P-B04734-GM implements a two-stage PLL architecture: a high-stability reference stage (with external crystal or CMOS/SSTL/differential inputs) feeding a fractional-N MultiSynth™ synthesis stage per output. Each of the four outputs features independent R-, M-, and P-divider configuration, enabling true zero-ppm frequency accuracy and sub-20 ps phase step resolution.

It supports flexible input references (8–30 MHz crystal, 5–710 MHz differential), independent output format selection per driver, and advanced features including glitchless frequency increment/decrement (1 ppm steps), programmable spread spectrum (0.5–5.0% at 33–63 kHz), loss-of-lock/loss-of-signal alarms, and external feedback for zero-delay mode.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Count & Type	4 differential clock outputs (CLK0A/B through CLK3A/B); supports LVPECL, LVDS, HCSL, CML, CMOS, SSTL, HSTL
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 4 common clock spec (0.15–0.45 ps RMS)
Frequency Range	0.16–710 MHz per output; integer/fractional synthesis with 1 ppb resolution
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad
Operating Temp	–40 °C to +85 °C ambient; qualified for industrial and telecom line card environments

Pinout & Package

SI5338P-B04734-GM is housed in a 24-lead, 4 × 4 mm QFN package with wettable flanks and an exposed thermal pad. Pin 1 is top-left corner (IN1), pin 24 is bottom-right (GND). The package supports reflow soldering per JEDEC J-STD-020 (peak 260 °C).

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential Input Pair	Accepts AC-coupled differential reference clocks (5–710 MHz); internal 10 kΩ termination
IN3, IN4	Single-Ended Input	DC-coupled CMOS/SSTL/HSTL inputs (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A–CLK3B	Differential Output Pair	Four independent output pairs; each configurable for LVPECL/LVDS/HCSL/CML with per-driver VDDO
VDDO0–VDDO3	Output Buffer Supply	Independent 1.5/1.8/2.5/3.3 V supplies per output bank; enables mixed-voltage system interfacing
VDD	Core Supply	Single 1.8/2.5/3.3 V core supply; PSRR optimized for clean clock generation
SCL, SDA	I²C/SMBus Interface	Standard 100/400 kHz I²C bus; supports ClockBuilder Pro programming and runtime reconfiguration
INTR	Interrupt Output	Open-drain status indicator for loss-of-lock, loss-of-signal, or configuration error events

Key Features

Feature	Design Value
MultiSynth™ Synthesis	Four independent fractional-N synthesizers enable any-frequency generation (0.16–710 MHz) with 0 ppm precision and 1 ppb resolution
PCIe Gen 4 Compliance	Meets PCIe Base Spec 4.0 common clock jitter requirements (0.15–0.45 ps RMS) without external filtering
Per-Output Voltage Control	Each output bank (VDDO0–VDDO3) supports independent 1.5/1.8/2.5/3.3 V supply, enabling direct interface to mixed-voltage FPGAs and ASICs
Glitchless Frequency Tuning	Hardware-supported frequency increment/decrement (FINC/FDEC pins) enables real-time, sub-ppm adjustments without output interruption
Programmable Spread Spectrum	Configurable SSC on any output: 0.5–5.0% spread, 33–63 kHz modulation rate, reducing EMI in dense PCB layouts
Zero-Delay Mode	External feedback path allows synchronous alignment of output clocks to input reference-critical for deterministic latency in packet-switched systems

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch/Routing
Use Scenario: Providing synchronized, low-jitter reference clocks to multiple PCIe Gen 4 switch ICs in a 1U server backplane. IC Role / Device Role / Timing Role: Quad-output clock generator supplying four independent 100 MHz differential clocks (HCSL) with PCIe Gen 4 SRNS compliance and <0.32 ps RMS jitter. Use Value: Eliminates need for four discrete oscillators; reduces board area by >60% and ensures inter-lane skew <100 ps across all switch ports.	Use Scenario: Generating precise 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 10GbE/25GbE PHYs and packet processors in carrier-grade Ethernet switches. IC Role / Device Role / Timing Role: Programmable frequency translator converting a single 25 MHz crystal into three distinct high-stability Ethernet reference frequencies. Use Value: Enables single-crystal design with zero-ppm accuracy per output, simplifying BOM and improving long-term frequency stability vs. discrete XO solutions.
Broadcast Video Timing	FPGA/ASIC Clocking
Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) compliant 74.25 MHz and 148.5 MHz clocks alongside genlock-capable 27 MHz reference to video processing FPGAs. IC Role / Device Role / Timing Role: Multi-format clock generator supporting LVDS and HCSL outputs simultaneously, with programmable phase offset (<20 ps step) for frame synchronization. Use Value: Achieves sub-frame timing alignment across multi-FPGA video pipelines without external delay lines or manual calibration.	Use Scenario: Supplying heterogeneous clock domains (e.g., 100 MHz DDR4, 300 MHz logic, 500 MHz SerDes) to Xilinx Versal or Intel Agilex FPGAs in AI inference accelerators. IC Role / Device Role / Timing Role: Configurable buffer and level translator with independent VDDO per output bank, driving LVDS, SSTL, and HSTL loads from one device. Use Value: Reduces power delivery complexity and eliminates level-shifter ICs while maintaining <10 ps inter-clock skew across voltage domains.

PCIe Gen 4 Switch Timing

Ethernet Switch/Routing

Use Scenario: Providing synchronized, low-jitter reference clocks to multiple PCIe Gen 4 switch ICs in a 1U server backplane.

IC Role / Device Role / Timing Role: Quad-output clock generator supplying four independent 100 MHz differential clocks (HCSL) with PCIe Gen 4 SRNS compliance and <0.32 ps RMS jitter.

Use Value: Eliminates need for four discrete oscillators; reduces board area by >60% and ensures inter-lane skew <100 ps across all switch ports.

Use Scenario: Generating precise 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 10GbE/25GbE PHYs and packet processors in carrier-grade Ethernet switches.

IC Role / Device Role / Timing Role: Programmable frequency translator converting a single 25 MHz crystal into three distinct high-stability Ethernet reference frequencies.

Use Value: Enables single-crystal design with zero-ppm accuracy per output, simplifying BOM and improving long-term frequency stability vs. discrete XO solutions.

Broadcast Video Timing

FPGA/ASIC Clocking

Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) compliant 74.25 MHz and 148.5 MHz clocks alongside genlock-capable 27 MHz reference to video processing FPGAs.

IC Role / Device Role / Timing Role: Multi-format clock generator supporting LVDS and HCSL outputs simultaneously, with programmable phase offset (<20 ps step) for frame synchronization.

Use Value: Achieves sub-frame timing alignment across multi-FPGA video pipelines without external delay lines or manual calibration.

Use Scenario: Supplying heterogeneous clock domains (e.g., 100 MHz DDR4, 300 MHz logic, 500 MHz SerDes) to Xilinx Versal or Intel Agilex FPGAs in AI inference accelerators.

IC Role / Device Role / Timing Role: Configurable buffer and level translator with independent VDDO per output bank, driving LVDS, SSTL, and HSTL loads from one device.

Use Value: Reduces power delivery complexity and eliminates level-shifter ICs while maintaining <10 ps inter-clock skew across voltage domains.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06989-GM	Higher integration: includes integrated crystal, lower jitter (0.35 ps RMS), supports up to 12 outputs via fanout	Targeted at space-constrained, ultra-low-jitter applications (e.g., optical transport, 5G RU); lacks external crystal option	Select when crystal integration and sub-0.4 ps jitter are mandatory; not drop-in due to different pinout and no external XTAL pads
ICS8430I-01T	Fixed-frequency, non-programmable quad LVDS clock generator; 1.2 ps RMS jitter; no I²C interface or frequency flexibility	Used in cost-sensitive, static-clocking applications (e.g., legacy storage controllers); no spread spectrum or phase adjustment	Select only for fixed-frequency designs where programmability is unnecessary; requires redesign for any clock change

Compared with Si5332A-D06989-GM and ICS8430I-01T, the SI5338P-B04734-GM uniquely balances field-programmability, PCIe Gen 4 compliance, external crystal support, and 24-QFN compactness-making it optimal for mid-volume, multi-standard timing in networking and compute platforms where flexibility and qualification assurance are critical.

Availability

SI5338P-B04734-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching infrastructure, broadcast video synchronization, and FPGA-based acceleration requiring stable component supply, full traceability, and long-term lifecycle support.

Supply support for SI5338P-B04734-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for communications, automotive, and industrial markets.

The Si5338 product line delivers highly configurable, low-jitter clock generation for high-speed serial interfaces-including PCIe, Ethernet, Fibre Channel, and broadcast video-designed to replace multiple discrete oscillators with a single programmable IC.

FAQ

What is the maximum output frequency supported by the SI5338P-B04734-GM?

The SI5338P-B04734-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. Frequencies above 350 MHz are limited to two unique values simultaneously (Fvco/4 and Fvco/6) per the MultiSynth™ architecture. All outputs maintain 0.7 ps RMS typical jitter within their respective ranges.

Does the SI5338P-B04734-GM support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, the SI5338P-B04734-GM is explicitly validated for PCIe Gen 4 SRNS operation with 0.11–0.32 ps RMS jitter (typ/max) when configured with a PLL bandwidth of 2–4 MHz and CDR = 10 MHz. This compliance is documented in Table 12 of the official Skyworks datasheet Rev. 1.6.

Can the SI5338P-B04734-GM generate four different output voltages simultaneously?

Yes-the SI5338P-B04734-GM provides four independent VDDO pins (VDDO0–VDDO3), each configurable for 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This allows simultaneous LVDS (2.5 V), HCSL (1.8 V), SSTL (1.5 V), and CMOS (3.3 V) outputs without external level shifters.

Is an external crystal required for SI5338P-B04734-GM operation?

No-an external crystal is optional. The SI5338P-B04734-GM accepts multiple reference sources: 8–30 MHz crystal (on IN1/IN2), 5–200 MHz CMOS (IN3/IN4), or 5–710 MHz differential (IN1/IN2, IN5/IN6). Crystal-less operation is fully supported using a buffered system clock as reference.

How is the SI5338P-B04734-GM programmed and configured?

The SI5338P-B04734-GM is programmed via its I²C/SMBus interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software. Configuration includes output format, frequency, voltage, spread spectrum, phase offset, and alarm thresholds-all stored in on-chip OTP NVM for power-on readiness in <2 ms.

SI5338P-B04734-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338P-B04734-GM FAQ

1.How can I place an order for SI5338P-B04734-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338P-B04734-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338P-B04734-GM reliable?

The price and inventory of SI5338P-B04734-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338P-B04734-GM is usually 5 days.

3.What payment methods are accepted for SI5338P-B04734-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338P-B04734-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338P-B04734-GM?

SI5338P-B04734-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338P-B04734-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338P-B04734-GM?

For technical support, including SI5338P-B04734-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338P-B04734-GM requirements.

6.How does Aetrix verify that SI5338P-B04734-GM is sourced from the original manufacturer or authorized distributors?

All SI5338P-B04734-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338P-B04734-GM meets industry standards.

7.What is the process for return or replacement of SI5338P-B04734-GM?

All SI5338P-B04734-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338P-B04734-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338P-B04734-GM part is unused and in its original packaging.

Return procedure for SI5338P-B04734-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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