Skyworks Solutions Inc. SI5338P-B05983-GM

Overview

SI5338P-B05983-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338P-B05983-GM datasheet, SI5338P-B05983-GM pinout, SI5338P-B05983-GM application, or SI5338P-B05983-GM equivalent, key selection considerations include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage per driver (1.5–3.3 V), flexible reference inputs (crystal, CMOS, SSTL/HSTL, differential), and PCIe/10GbE/Ethernet switch timing validation support.

Technical Context

The SI5338P-B05983-GM implements a two-stage PLL architecture: a high-stability input stage with programmable R-divider followed by a fractional-N MultiSynth™ synthesis stage per output, enabling independent frequency generation with <1 ppb resolution. Each output path includes configurable format selection (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL) and per-driver VDDO supply control.

It supports both free-running synthesis and external feedback (zero-delay) modes, with loss-of-lock and loss-of-signal alarms, independent phase/frequency increment/decrement (20 ps / 1 ppm steps), and programmable spread spectrum on any output (0.5–5.0% spread, 33–63 kHz modulation).

Key Specifications

Pinout & Package

SI5338P-B05983-GM is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad. Pin assignments are standardized across Si5338 variants per Skyworks documentation (Rev. 1.6, p.37).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Compared with SI5338A-B-GM, the SI5338P-B05983-GM offers out-of-box PCIe Gen 4 timing compliance and pre-verified jitter performance, while ICS8430I-01LG provides lower cost but sacrifices programmability, jitter margin, and feature flexibility essential for multi-protocol systems.

Availability

SI5338P-B05983-GM is available at Aetrix Electronics and suitable for Ethernet switch/router, PCIe Gen 3/4 server platforms, and broadcast video equipment requiring stable component supply, long-term lifecycle assurance, and validated timing performance.

Supply support for SI5338P-B05983-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces including PCIe, Ethernet, Fibre Channel, and broadcast video, targeting systems requiring precise multi-frequency synthesis in minimal footprint.

FAQ

What is the primary function of the SI5338P-B05983-GM in a PCIe Gen 4 design?

The SI5338P-B05983-GM serves as a Common Clock source meeting PCIe Gen 4 jitter requirements (<0.45 ps RMS, 10 kHz–50 MHz) with its 0.7 ps RMS typical phase jitter and SRNS-compliant architecture. Its pre-configured B05983 variant is validated for 100 MHz PCIe reference clock generation, eliminating need for custom register setup during bring-up. The SI5338P-B05983-GM integrates spread spectrum and phase alignment features critical for EMI reduction and inter-lane skew control in Gen 4 root complexes.

Does the SI5338P-B05983-GM support both differential and single-ended output formats simultaneously?

Yes, the SI5338P-B05983-GM supports mixed-mode outputs: up to four differential pairs (CLK0A/B through CLK3A/B) and up to eight single-ended signals (derived from same pins via internal routing), or any combination thereof. Each output driver is independently configurable for LVPECL, LVDS, HCSL, CMOS, SSTL, or HSTL format and assigned its own VDDO supply (1.5–3.3 V). This capability enables the SI5338P-B05983-GM to drive heterogeneous loads such as FPGA banks, SerDes PHYs, and microcontroller peripherals from a single device.

How is the SI5338P-B05983-GM programmed, and what tools are required?

The SI5338P-B05983-GM is programmed via its I²C/SMBus-compatible interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software, which generates configuration files and performs real-time validation against jitter and timing constraints. Unlike generic Si5338 variants, the SI5338P-B05983-GM ships with a factory-programmed configuration (B05983) optimized for PCIe Gen 4 and Ethernet applications, allowing immediate use without initial setup. The SI5338P-B05983-GM retains full field reprogrammability for post-deployment tuning.

What reference inputs does the SI5338P-B05983-GM accept, and which is recommended for lowest jitter?

The SI5338P-B05983-GM accepts crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), and differential (5–710 MHz) references. For lowest additive jitter, a low-phase-noise differential input (e.g., 100 MHz LVDS) is recommended, achieving <0.165 ps RMS additive jitter in buffer mode. Crystal inputs yield higher integrated phase noise due to oscillator limitations; the SI5338P-B05983-GM's internal PLL cleanses jitter but cannot eliminate crystal intrinsic noise. All reference paths are validated in the SI5338P-B05983-GM's pre-tested configuration.

Is the SI5338P-B05983-GM pin-compatible with other Si5338 variants, and can it be substituted without PCB changes?

Yes, the SI5338P-B05983-GM is pin-compatible with all Si5338x-GM variants in the 24-QFN package, sharing identical pinout, footprint, and thermal pad layout per Skyworks Package Outline (Rev. 1.6, p.39). Substitution requires no PCB changes, though register configuration may differ: the SI5338P-B05983-GM includes factory-programmed settings for PCIe Gen 4 and Ethernet timing, whereas generic Si5338A/B/C variants ship unconfigured. Firmware updates or ClockBuilder Pro reprogramming may be needed if replacing with non-P-suffix parts.