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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338P-B06004-GM

Name: SI5338P-B06004-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338P-B06004-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338P-B06004-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338P-B06004-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

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Product details

Overview

SI5338P-B06004-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL output formats across 0.16–710 MHz. It replaces up to four crystal oscillators in high-speed serial interface timing applications such as PCIe root complexes and FPGA clock trees.

For engineers reviewing the SI5338P-B06004-GM datasheet, SI5338P-B06004-GM pinout, SI5338P-B06004-GM application, or SI5338P-B06004-GM equivalent, this device delivers any-frequency synthesis with ±20 ps phase step resolution, independent output voltage selection (1.5/1.8/2.5/3.3 V), and glitchless frequency adjustment in 1 ppm increments - critical for dynamic clock management in multi-protocol systems.

Technical Context

The SI5338P-B06004-GM implements a two-stage PLL architecture: a high-stability reference stage (with programmable R-divider) feeding a MultiSynth™ fractional-N synthesizer per output channel. Each of the four output drivers features independent M/N/P dividers, enabling true zero-ppm frequency accuracy on all outputs simultaneously.

It supports six input sources - external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) - and provides loss-of-lock and loss-of-signal alarms. The device operates from a single 1.8/2.5/3.3 V core supply and offers spread-spectrum clocking (0.5–5.0% spread, 33–63 kHz modulation) on any output.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count & type	4 differential clock outputs (CLK0A/B through CLK3A/B), each independently configurable
Phase jitter (RMS)	0.7 ps typical (12 kHz–20 MHz), meeting PCIe Gen 4 common clock jitter requirements
Frequency range	0.16–710 MHz per output; supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats
Input reference	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz)
Supply voltage	Core: 1.8/2.5/3.3 V ±10%; Output buffers: 1.4–3.63 V, independently selectable per driver
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad
Operating temperature	–40 °C to +85 °C ambient, suitable for industrial and telecom line card environments

Pinout & Package

SI5338P-B06004-GM is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad (pin 24 = GND). Pin assignments are fixed per the Si5338 family: dual differential inputs (IN1/IN2, IN5/IN6), two single-ended inputs (IN3, IN4), four differential output pairs (CLK0A/B–CLK3A/B), three output supply rails (VDDO0–VDDO3), core supply (VDD), I²C interface (SCL/SDA), interrupt (INTR), and reserved ground (RSVD_GND).

Pin/Terminal	Circuit Role	Design Meaning
IN1 / IN2	Differential reference input pair	Accepts 5–710 MHz AC-coupled differential clock; requires external 100 Ω termination
CLK0A / CLK0B	Differential output pair 0	Configurable format (LVPECL/LVDS/HCSL); independent voltage (VDDO0) and divider settings
VDDO0	Output buffer supply for CLK0A/B	1.4–3.63 V rail; sets output logic level and drive strength for CLK0 pair
SCL / SDA	I²C serial interface	Standard SMBus-compatible 2-wire bus for configuration and status readback
INTR	Interrupt output	Open-drain active-low signal indicating loss-of-lock or loss-of-signal events
VDD	Core supply	1.8/2.5/3.3 V ±10% input powering PLL, synthesizers, and control logic

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enable simultaneous zero-ppm precision at arbitrary frequencies
PCIe Gen 4 compliance	0.15–0.45 ps RMS jitter in common clock mode meets PCIe Base Spec 4.0 rev 0.5 requirements
Independent phase control	±45 ns programmable initial offset and <20 ps step resolution per output for skew compensation
Glitchless frequency tuning	1 ppm increment/decrement via PINC/FDEC pins enables real-time clock rate adaptation without output disruption
Flexible input support	Single device accepts crystal, CMOS, SSTL, HSTL, or differential references - eliminates need for external level translators
Spread-spectrum clocking	Configurable 0.5–5.0% down-spread at 33–63 kHz on any output to reduce EMI in dense PCB layouts

Applications

PCIe Gen 4 Root Complex Timing	Ethernet Switch Clock Tree
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 endpoints and switch fabric in a server motherboard. IC Role / Device Role / Timing Role: Quad-output clock generator delivering low-jitter, phase-aligned clocks with independent SSC per lane group. Use Value: Meets PCIe Gen 4 common clock jitter spec (≤0.45 ps RMS) while enabling EMI reduction via per-output spread-spectrum control.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1G/10G/25G Ethernet PHYs and MACs in a modular switch ASIC design. IC Role / Device Role / Timing Role: Any-frequency synthesizer replacing discrete oscillators and fanout buffers with programmable format and voltage per port. Use Value: Eliminates 4+ crystals and associated layout area; supports mixed-voltage PHY interfaces (1.8 V/2.5 V/3.3 V) from one IC.
FPGA-Based Broadcast Video Sync	Telecom Line Card Clock Translation
Use Scenario: Deriving SMPTE ST 2082 (27 Gbps) pixel clock, AES67 audio clock (48 kHz), and genlock reference from a single 10 MHz OCXO in broadcast video processing hardware. IC Role / Device Role / Timing Role: Frequency translator and jitter cleaner generating multiple unrelated rates with sub-20 ps phase step resolution. Use Value: Achieves <0.7 ps RMS jitter on high-frequency outputs while maintaining precise phase relationships between video/audio domains.	Use Scenario: Converting a 19.44 MHz SONET/SDH reference to 155.52 MHz, 622.08 MHz, and 2.488 GHz for OTN framer, SerDes, and DSP clock domains in a 100G line card. IC Role / Device Role / Timing Role: High-precision clock generator supporting both integer and fractional synthesis modes for legacy and next-gen protocols. Use Value: Enables single-chip migration from OC-48 to OTU4 without changing board layout or reference source.

PCIe Gen 4 Root Complex Timing

Ethernet Switch Clock Tree

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 endpoints and switch fabric in a server motherboard.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering low-jitter, phase-aligned clocks with independent SSC per lane group.

Use Value: Meets PCIe Gen 4 common clock jitter spec (≤0.45 ps RMS) while enabling EMI reduction via per-output spread-spectrum control.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1G/10G/25G Ethernet PHYs and MACs in a modular switch ASIC design.

IC Role / Device Role / Timing Role: Any-frequency synthesizer replacing discrete oscillators and fanout buffers with programmable format and voltage per port.

Use Value: Eliminates 4+ crystals and associated layout area; supports mixed-voltage PHY interfaces (1.8 V/2.5 V/3.3 V) from one IC.

FPGA-Based Broadcast Video Sync

Telecom Line Card Clock Translation

Use Scenario: Deriving SMPTE ST 2082 (27 Gbps) pixel clock, AES67 audio clock (48 kHz), and genlock reference from a single 10 MHz OCXO in broadcast video processing hardware.

IC Role / Device Role / Timing Role: Frequency translator and jitter cleaner generating multiple unrelated rates with sub-20 ps phase step resolution.

Use Value: Achieves <0.7 ps RMS jitter on high-frequency outputs while maintaining precise phase relationships between video/audio domains.

Use Scenario: Converting a 19.44 MHz SONET/SDH reference to 155.52 MHz, 622.08 MHz, and 2.488 GHz for OTN framer, SerDes, and DSP clock domains in a 100G line card.

IC Role / Device Role / Timing Role: High-precision clock generator supporting both integer and fractional synthesis modes for legacy and next-gen protocols.

Use Value: Enables single-chip migration from OC-48 to OTU4 without changing board layout or reference source.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06084-GM	Higher integration: includes integrated crystal, lower power (32 mA typ), supports up to 10 outputs with JESD204B alignment	Better suited for JESD204B-compliant data converters and radar systems requiring deterministic latency	Select when system-level jitter budget is tighter (<0.5 ps RMS) or crystal integration reduces BOM count
ICS853S02IAGLF	Fixed-frequency, non-programmable quad LVDS clock generator; no I²C interface or MultiSynth capability	Limited to static clock trees where frequency flexibility is unnecessary; lacks PCIe Gen 4 compliance	Select only for cost-sensitive, low-complexity applications with unchanging clock requirements

Compared with Si5332A-D06084-GM, SI5338P-B06004-GM offers broader frequency coverage (up to 710 MHz vs. 500 MHz) and higher output drive strength for backplane fanout, while ICS853S02IAGLF provides simpler bring-up but no field reconfiguration - making SI5338P-B06004-GM optimal for multi-standard, upgradeable platforms.

Availability

SI5338P-B06004-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 server motherboards, Ethernet switching ASICs, and broadcast video processing equipment requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338P-B06004-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces including PCIe, Ethernet, Fibre Channel, and broadcast video - designed to replace multiple fixed-frequency oscillators with a single configurable timing IC.

FAQ

What is the maximum output frequency supported by SI5338P-B06004-GM in LVPECL mode?

The SI5338P-B06004-GM supports up to 710 MHz in LVPECL mode when configured with appropriate VDDO voltage and load conditions. This capability is confirmed in Table 6 of the official datasheet under "Output Clocks (Differential)" specifications, where LVPECL frequency range is explicitly listed as 0.16–710 MHz.

Does SI5338P-B06004-GM support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338P-B06004-GM supports PCIe Gen 4 SRNS mode with 0.11–0.32 ps RMS jitter performance, as verified in Table 12 of the datasheet under "PCIe Gen 3 Separate Reference No Spread, SRNS" test conditions. The device achieves this using a 2–4 MHz PLL bandwidth and 10 MHz CDR setting.

Can SI5338P-B06004-GM generate four different output frequencies simultaneously?

Yes, SI5338P-B06004-GM can synthesize four independent output frequencies simultaneously using its patented MultiSynth™ technology. Each output (CLK0–CLK3) has dedicated M/N/P dividers and format/voltage controls, enabling true zero-ppm precision on all channels without shared resources.

What is the minimum input crystal frequency supported by SI5338P-B06004-GM?

The SI5338P-B06004-GM supports external crystals from 8 MHz to 30 MHz, as specified in Tables 8–11 of the datasheet. Crystals below 8 MHz are not supported; alternative reference sources (e.g., CMOS or differential inputs) must be used for frequencies under 8 MHz.

Is SI5338P-B06004-GM pin-compatible with other Si5338 variants like SI5338A or SI5338B?

Yes, all Si5338 variants - including SI5338P-B06004-GM - share identical 24-QFN packaging, pinout, and footprint per Section 8 ("Device Pinout by Part Number") and Section 9 ("Package Outline") of the datasheet. Functionality differences are implemented via OTP programming and register configuration, not physical layout.

SI5338P-B06004-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338P-B06004-GM FAQ

1.How can I place an order for SI5338P-B06004-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338P-B06004-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338P-B06004-GM reliable?

The price and inventory of SI5338P-B06004-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338P-B06004-GM is usually 5 days.

3.What payment methods are accepted for SI5338P-B06004-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338P-B06004-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338P-B06004-GM?

SI5338P-B06004-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338P-B06004-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338P-B06004-GM?

For technical support, including SI5338P-B06004-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338P-B06004-GM requirements.

6.How does Aetrix verify that SI5338P-B06004-GM is sourced from the original manufacturer or authorized distributors?

All SI5338P-B06004-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338P-B06004-GM meets industry standards.

7.What is the process for return or replacement of SI5338P-B06004-GM?

All SI5338P-B06004-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338P-B06004-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338P-B06004-GM part is unused and in its original packaging.

Return procedure for SI5338P-B06004-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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