Skyworks Solutions Inc. SI5338Q-B02153-GM

Overview

SI5338Q-B02153-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 and SRNS compliance, and MultiSynth™ frequency synthesis supporting 0.16–710 MHz output ranges across LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338Q-B02153-GM datasheet, SI5338Q-B02153-GM pinout, SI5338Q-B02153-GM application, or SI5338Q-B02153-GM equivalent, key selection criteria include PCIe Gen 4 common-clock jitter (0.15–0.45 ps RMS), independent per-output voltage control (1.5/1.8/2.5/3.3 V), spread-spectrum modulation (0.5–5.0% at 33–63 kHz), loss-of-lock detection, and I²C/SMBus programmability with ClockBuilder Pro support.

Technical Context

The SI5338Q-B02153-GM implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers, each driving one output pair. Each synthesizer supports integer or fractional mode operation with <1 ppb frequency resolution and programmable initial phase offset (±45 ns).

Input flexibility includes external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) references. Output drivers are fully independent-supporting mixed signal formats, voltages, and enable controls-with glitchless frequency increment/decrement (1 ppm steps) and phase adjustment (<20 ps steps) via pin or I²C.

Key Specifications

Pinout & Package

SI5338Q-B02153-GM uses a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments follow Skyworks' standard Si5338 pinout: dual differential inputs (IN1/IN2, IN5/IN6), single-ended inputs (IN3, IN4), four differential output pairs (CLK0A/B through CLK3A/B), six VDDOx supplies, dual VDD core rails, SCL/SDA/I²C interface, INTR alarm output, and reserved ground.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Compared with Si5332A-D05989-GM and ICS843002AGI-01LFT, the SI5338Q-B02153-GM delivers optimal balance of programmability, PCIe Gen 4 compliance, compact 24-QFN packaging, and industrial temperature support - making it ideal for next-generation switch, server, and FPGA-based embedded systems requiring field-upgradable timing.

Availability

SI5338Q-B02153-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch clocking, and FPGA processor clocking requiring stable component supply, long-term lifecycle assurance, and full traceability.

Supply support for SI5338Q-B02153-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line was designed to replace multiple discrete oscillators and buffers in high-speed digital systems, delivering programmable, low-jitter clock generation for PCIe, Ethernet, broadcast, and FPGA applications.

FAQ

What is the maximum output frequency supported by SI5338Q-B02153-GM in LVPECL mode?

The SI5338Q-B02153-GM supports LVPECL output frequencies up to 710 MHz. This capability is confirmed in Table 6 of the Skyworks datasheet under "Output Clocks (Differential)" for LVPECL format. Operation above 350 MHz requires use of Fvco/4 or Fvco/6 synthesis paths, with only two unique frequencies >350 MHz allowed simultaneously. The SI5338Q-B02153-GM maintains 0.7 ps RMS jitter performance across this full range when driven by a low-noise differential reference.

Does SI5338Q-B02153-GM support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338Q-B02153-GM is explicitly compliant with PCIe Gen 4 SRNS requirements. Per Table 12 in the datasheet, its RMS jitter is 0.11–0.32 ps RMS under SRNS test conditions (PLL BW 2–4 MHz, CDR = 10 MHz). This compliance is achieved using the device's independent MultiSynth™ synthesizers and configurable loop bandwidth, eliminating need for external jitter cleaners in SRNS-constrained designs.

Can SI5338Q-B02153-GM generate different output voltages on each channel?

Yes, SI5338Q-B02153-GM provides independent VDDOx supplies (VDDO0–VDDO3) allowing each of its four output pairs to operate at different voltages: 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This is documented in the "Features" section and Table 1, and enables direct interfacing with mixed-voltage ASICs, FPGAs, and PHYs without level-shifting components. Each VDDO rail must be separately decoupled per Skyworks layout guidelines.

What is the minimum input crystal frequency supported by SI5338Q-B02153-GM?

The SI5338Q-B02153-GM supports external crystals from 8 MHz to 30 MHz, as specified in Tables 8–11 of the datasheet. The lowest supported crystal frequency is 8 MHz, validated for use with on-chip load capacitance settings (11–13 pF supported, 17–19 pF recommended). Crystals below 8 MHz require external oscillator input rather than direct crystal connection.

How does SI5338Q-B02153-GM handle loss-of-signal detection?

SI5338Q-B02153-GM features dedicated loss-of-signal (LOS) detection on all input pins with configurable thresholds. Detection time is 2.6–5 µs (tLOS), and release time is 0.01–1 µs (tLOSRLS), per Table 5. An interrupt (INTR pin) asserts low upon LOS or loss-of-lock events, enabling system-level fault response. These functions are active in both PLL and clock buffer modes, and are factory-configurable via NVM registers.