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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338Q-B04069-GMR

Name: SI5338Q-B04069-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338Q-B04069-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338Q-B04069-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338Q-B04069-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338Q-B04069-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in FPGA clocking, Ethernet switch timing, and PCIe Gen 4 host systems.

For engineers reviewing the SI5338Q-B04069-GMR datasheet, SI5338Q-B04069-GMR pinout, SI5338Q-B04069-GMR application, or SI5338Q-B04069-GMR equivalent, this page delivers verified technical context, exact pin functions, real-world use-value per application, and two validated alternative parts - all grounded in Skyworks Rev. 1.6 documentation and functional block diagram data.

Technical Context

The SI5338Q-B04069-GMR implements a dual-stage synthesis architecture: a PLL-based Stage 1 (with 1.6 MHz loop bandwidth) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), then feeds a MultiSynth™ Stage 2 that generates four independent output frequencies with integer or fractional-N synthesis. Each output supports programmable voltage (1.5/1.8/2.5/3.3 V), format (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), and phase offset (<20 ps step resolution).

It features loss-of-lock and loss-of-signal alarms, independent frequency increment/decrement (1 ppm steps), spread-spectrum control (0.5–5.0% spread, 33–63 kHz modulation), and external feedback mode for zero-delay operation. All configuration is performed via I²C/SMBus interface with OTP NVM storage.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 4 common clock jitter requirement (≤0.45 ps RMS)
Output Count & Type	4 independent outputs; supports up to 4 differential (LVPECL/LVDS/HCSL/CML) or 8 single-ended (CMOS/SSTL/HSTL) clocks
Frequency Range	0.16–710 MHz per output; LVPECL/LVDS up to 710 MHz, HCSL up to 250 MHz, CMOS up to 200 MHz
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V (±10%); Output buffers: 1.4–3.63 V, independently configurable per driver
Package & Size	24-pin QFN, 4 × 4 mm footprint, 0.5 mm pitch, exposed thermal pad
Operating Temperature	–40 to +85 °C ambient; qualified for industrial and telecom line card environments

Pinout & Package

SI5338Q-B04069-GMR is housed in a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments follow Skyworks Rev. 1.6 pinout diagram (top view, pin 1 at top-left corner).

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2	Differential input pair #1	Accepts 5–710 MHz AC-coupled differential reference; requires external 100 Ω termination
IN3, IN4	Single-ended input pair	Supports CMOS/SSTL/HSTL inputs (5–350 MHz); IN3 = primary, IN4 = secondary
IN5, IN6	Differential input pair #2	Second 5–710 MHz differential reference path; enables multi-reference redundancy or translation
CLK0A, CLK0B	Differential output #0	LVPECL/LVDS/HCSL/CML configurable; independent voltage (VDDO0), format, and phase
CLK1A, CLK1B	Differential output #1	Same configurability as CLK0; supports independent frequency, format, and spread spectrum
CLK2A, CLK2B	Differential output #2	Third fully independent output channel; supports phase adjustment <20 ps step accuracy
CLK3A, CLK3B	Differential output #3	Fourth output; capable of glitchless frequency increment/decrement in 1 ppm steps
SCL, SDA	I²C serial interface	Standard SMBus-compatible bus (up to 400 kHz); used for register programming and status readback
INTR	Interrupt output	Open-drain alarm signal indicating loss-of-lock or loss-of-signal condition
VDD, VDDO0–VDDO3	Power supplies	VDD = core supply (1.8/2.5/3.3 V); VDDOx = dedicated output buffer supply per channel (1.4–3.63 V)
GND, RSVD_GND	Ground connections	Multiple GND pins including reserved ground for noise isolation; thermal pad must be soldered

Key Features

Feature	Design Value
MultiSynth™ synthesis	Enables true zero-ppm frequency accuracy on all four outputs via fractional-N or integer-N synthesis
PCIe Gen 4 compliance	Meets PCIe Gen 4 common clock RMS jitter spec (≤0.45 ps) and SRNS requirements for Gen 3
Independent output control	Each output has dedicated voltage, format, phase offset (–45 to +45 ns), and spread-spectrum settings
Glitchless frequency tuning	Hardware-supported frequency increment/decrement (1 ppm steps) without output interruption
Low-power operation	45 mA typical core current at 100 MHz on all outputs; optimized PSRR across supply voltages
Configurable alarms	Loss-of-lock and loss-of-signal detection with programmable thresholds and interrupt assertion

Applications

PCIe Gen 4 Host System Clocking	Ethernet Switch Timing
Use Scenario: Providing synchronized 100 MHz reference clocks to CPU, GPU, and NVMe controllers in a server motherboard with PCIe Gen 4 x16 slots. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter, independently configured clocks meeting PCIe Gen 4 common clock jitter spec (≤0.45 ps RMS). Use Value: Eliminates need for four discrete oscillators; reduces BOM count, PCB area, and timing skew between lanes by >50 ps vs. discrete solutions.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 10GbE PHYs, packet processors, and SerDes in a Layer 3 switch. IC Role / Device Role / Timing Role: Any-frequency synthesizer supporting mixed-rate outputs with sub-20 ps inter-channel skew and programmable phase alignment. Use Value: Enables deterministic latency control across data paths; supports IEEE 1588 PTP synchronization via precise phase offset tuning.
Broadcast Video Timing	FPGA-Based Protocol Converter
Use Scenario: Delivering SMPTE ST 2082 (28.63636 GHz derived) and ST 2081 (59.94 Hz frame sync) clocks to video encoder/decoder ASICs in a 4K/8K production switcher. IC Role / Device Role / Timing Role: High-precision frequency translator generating exact broadcast-standard frequencies from a 27 MHz crystal reference. Use Value: Achieves 0 ppm frequency error across all outputs; eliminates frame jitter and lip-sync drift in multi-format broadcast workflows.	Use Scenario: Converting 100 MHz PCI Express reference to 125 MHz Ethernet MAC clock and 200 MHz DDR4 memory clock in a reconfigurable FPGA carrier board. IC Role / Device Role / Timing Role: Configurable buffer and level translator with independent output voltage (1.8 V for FPGA I/O, 2.5 V for PHY interface). Use Value: Removes need for discrete level shifters and fanout buffers; simplifies power domain partitioning and reduces signal integrity risk.

PCIe Gen 4 Host System Clocking

Ethernet Switch Timing

Use Scenario: Providing synchronized 100 MHz reference clocks to CPU, GPU, and NVMe controllers in a server motherboard with PCIe Gen 4 x16 slots.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter, independently configured clocks meeting PCIe Gen 4 common clock jitter spec (≤0.45 ps RMS).

Use Value: Eliminates need for four discrete oscillators; reduces BOM count, PCB area, and timing skew between lanes by >50 ps vs. discrete solutions.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 10GbE PHYs, packet processors, and SerDes in a Layer 3 switch.

IC Role / Device Role / Timing Role: Any-frequency synthesizer supporting mixed-rate outputs with sub-20 ps inter-channel skew and programmable phase alignment.

Use Value: Enables deterministic latency control across data paths; supports IEEE 1588 PTP synchronization via precise phase offset tuning.

Broadcast Video Timing

FPGA-Based Protocol Converter

Use Scenario: Delivering SMPTE ST 2082 (28.63636 GHz derived) and ST 2081 (59.94 Hz frame sync) clocks to video encoder/decoder ASICs in a 4K/8K production switcher.

IC Role / Device Role / Timing Role: High-precision frequency translator generating exact broadcast-standard frequencies from a 27 MHz crystal reference.

Use Value: Achieves 0 ppm frequency error across all outputs; eliminates frame jitter and lip-sync drift in multi-format broadcast workflows.

Use Scenario: Converting 100 MHz PCI Express reference to 125 MHz Ethernet MAC clock and 200 MHz DDR4 memory clock in a reconfigurable FPGA carrier board.

IC Role / Device Role / Timing Role: Configurable buffer and level translator with independent output voltage (1.8 V for FPGA I/O, 2.5 V for PHY interface).

Use Value: Removes need for discrete level shifters and fanout buffers; simplifies power domain partitioning and reduces signal integrity risk.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05889-GM	Higher integration: 8 outputs, integrated crystal option, lower jitter (0.35 ps RMS), but larger 32-QFN package (5 × 5 mm)	Required for designs needing >4 outputs or ultra-low jitter in 5G baseband or optical transport	Select when output count, jitter margin, or crystal integration outweigh footprint constraints
ICS8430I-01T	Fixed-frequency, non-programmable quad LVDS generator; no I²C interface; 1.2 ps RMS jitter; 3.3 V only	Suitable only for stable, unchanging clock trees where field reconfiguration is unnecessary	Choose only for cost-sensitive, static-clock applications with no frequency flexibility requirement

Compared with SI5338Q-B04069-GMR, Si5332A-D05889-GM offers greater output count and lower jitter at the expense of size and cost, while ICS8430I-01T sacrifices programmability and jitter performance for simplicity and unit cost - making SI5338Q-B04069-GMR the optimal balance of flexibility, precision, and compactness for dynamic, multi-protocol systems.

Availability

SI5338Q-B04069-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 host systems, Ethernet switching infrastructure, and broadcast video equipment requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338Q-B04069-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 family was designed as a programmable, high-performance clock generator platform targeting applications demanding flexible, low-jitter timing - especially PCIe, Ethernet, broadcast, and FPGA-based systems requiring multiple synchronized clocks.

FAQ

What is the maximum output frequency supported by SI5338Q-B04069-GMR in LVPECL mode?

The SI5338Q-B04069-GMR supports LVPECL outputs up to 710 MHz, as confirmed in Table 6 of the Skyworks Rev. 1.6 datasheet. This capability enables direct clocking of high-speed SerDes blocks in PCIe Gen 4 and 100G Ethernet applications without external frequency multiplication.

Does SI5338Q-B04069-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338Q-B04069-GMR is explicitly compliant with PCIe Gen 3 SRNS and meets PCIe Gen 4 common clock jitter requirements (≤0.45 ps RMS). Its PLL bandwidth (1.6 MHz typical) and MultiSynth™ architecture support SRNS operation when configured per AN562 and PCIe Base Spec 4.0 rev. 0.5.

Can SI5338Q-B04069-GMR generate four different frequencies simultaneously?

Yes, SI5338Q-B04069-GMR uses independent MultiSynth™ dividers per output to synthesize four distinct frequencies - for example, 100 MHz, 125 MHz, 156.25 MHz, and 312.5 MHz - all with 0 ppm precision and sub-20 ps phase step resolution, as documented in Sections 3.3 and 3.4 of the datasheet.

What is the minimum input crystal frequency supported by SI5338Q-B04069-GMR?

The SI5338Q-B04069-GMR supports external crystals from 8 to 30 MHz, with specific load capacitance recommendations (17–19 pF) and ESR limits (≤300 Ω for 8–11 MHz crystals). Crystals below 8 MHz are not supported per Table 8–11 in the Rev. 1.6 datasheet.

Is SI5338Q-B04069-GMR pin-compatible with other Si5338 variants?

Yes, all Si5338 variants - including SI5338Q-B04069-GMR - share identical 24-QFN packaging, pinout, and footprint per Section 9 and Figure 1 of the Rev. 1.6 datasheet. Functionality differences (e.g., factory-programmed vs. blank OTP) do not affect mechanical or electrical pin compatibility.

SI5338Q-B04069-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338Q-B04069-GMR FAQ

1.How can I place an order for SI5338Q-B04069-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338Q-B04069-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338Q-B04069-GMR reliable?

The price and inventory of SI5338Q-B04069-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338Q-B04069-GMR is usually 5 days.

3.What payment methods are accepted for SI5338Q-B04069-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338Q-B04069-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338Q-B04069-GMR?

SI5338Q-B04069-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338Q-B04069-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338Q-B04069-GMR?

For technical support, including SI5338Q-B04069-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338Q-B04069-GMR requirements.

6.How does Aetrix verify that SI5338Q-B04069-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338Q-B04069-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338Q-B04069-GMR meets industry standards.

7.What is the process for return or replacement of SI5338Q-B04069-GMR?

All SI5338Q-B04069-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338Q-B04069-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338Q-B04069-GMR part is unused and in its original packaging.

Return procedure for SI5338Q-B04069-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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