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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338Q-B04071-GM

Name: SI5338Q-B04071-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338Q-B04071-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338Q-B04071-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338Q-B04071-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338Q-B04071-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 and SRNS compliance, and MultiSynth™ frequency synthesis supporting 0.16–710 MHz output ranges across LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338Q-B04071-GM datasheet, SI5338Q-B04071-GM pinout, SI5338Q-B04071-GM application, or SI5338Q-B04071-GM equivalent, key selection considerations include its 24-QFN package, independent per-output voltage (1.5/1.8/2.5/3.3 V), ±20 ps phase step resolution, 1 ppm frequency increment/decrement capability, and support for external crystal (8–30 MHz) or wideband differential inputs (5–710 MHz).

Technical Context

The SI5338Q-B04071-GM implements a two-stage PLL architecture: a high-stability reference PLL (Stage 1) locks to one of six input sources, followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating each output. Each synthesizer supports integer or fractional mode operation with <1 ppb frequency resolution and programmable initial phase offset (±45 ns).

Its output stage provides per-driver format selection (LVPECL, LVDS, HCSL, CMOS, SSTL, HSTL), per-output supply voltage control (VDDO0–VDDO3), and independent spread-spectrum modulation (0.5–5.0% spread, 33–63 kHz rate). Loss-of-lock and loss-of-signal monitoring are integrated with interrupt reporting via INTR pin.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps - meets PCIe Gen 3/4 common clock and SRNS requirements at 100 MHz output
Output Frequency Range	0.16–710 MHz - covers Ethernet (125/156.25 MHz), PCIe (100 MHz), Fibre Channel (1.0625 GHz × ½ = 531.25 MHz), and broadcast video (27/74.25 MHz)
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) - enables flexible system clock tree design
Output Format Flexibility	Four differential (LVPECL/LVDS/HCSL/CML) or eight single-ended (CMOS/SSTL/HSTL) - allows mixed-signal board-level clock distribution
Supply Voltages	VDD core: 1.8/2.5/3.3 V; VDDOx per output: 1.5/1.8/2.5/3.3 V - supports multi-voltage SoC/FPGA interfaces
Temperature Range	–40 to +85 °C - qualified for industrial and telecom line card environments
Package	24-pin QFN, 4 × 4 mm - space-efficient for dense PCB layouts with thermal pad for 10 °C/W junction-to-case conduction

Pinout & Package

The SI5338Q-B04071-GM is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad (pin 24 = GND). Pin assignments follow Skyworks' standard Si5338 pinout: dual differential inputs (IN1/IN2, IN5/IN6), two single-ended inputs (IN3, IN4), four differential output pairs (CLK0A/B through CLK3A/B), four independent VDDO supplies, shared VDD core, I²C interface (SCL/SDA), interrupt (INTR), and reserved ground (RSVD_GND).

Pin/Terminal	Circuit Role	Design Meaning
IN1 / IN2	Differential reference input pair	Accepts 5–710 MHz AC-coupled LVDS/LVPECL; internal 100 Ω termination enabled
IN3 / IN4	Single-ended reference inputs	Support CMOS/SSTL/HSTL at 5–350 MHz; VIH/VIL referenced to local VDD
CLK0A / CLK0B – CLK3A / CLK3B	Differential clock outputs	Each pair independently configured for LVPECL/LVDS/HCSL/CML; output swing and common-mode set per VDDOx
VDDO0 – VDDO3	Per-output buffer supply	Enables mixed-voltage clocking: e.g., CLK0 at 1.8 V LVDS for FPGA, CLK2 at 3.3 V CMOS for microcontroller
SCL / SDA	I²C/SMBus configuration interface	Standard 100/400 kHz operation; supports ClockBuilder Pro programming and runtime reconfiguration
INTR	Open-drain status interrupt	Asserts on loss-of-lock, loss-of-signal, or NVM error; requires external pull-up resistor

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enabling true zero-ppm accuracy on all outputs without external VCXO or loop filter components
Independent phase adjustment	±45 ns range with <20 ps step resolution per output - enables precise skew alignment in SerDes lanes or DDR memory interfaces
Glitchless frequency tuning	1 ppm incremental/decremental steps via PINC/FDEC pins or I²C - supports dynamic clock scaling without output interruption
Spread-spectrum modulation	Configurable on any output: 0.5–5.0% down-spread, 33–63 kHz modulation rate - reduces EMI peak emissions in noise-sensitive systems
Zero-delay mode	External feedback path (fb pin) enables synchronous buffering with sub-nanosecond propagation delay matching - critical for deterministic latency in packet processing

Applications

PCIe Gen 3/4 Timing	Ethernet Switch Clocking
Use Scenario: Providing synchronized 100 MHz common clock and separate 100 MHz SRNS reference to multiple PCIe Gen 3/4 endpoints on a server motherboard. IC Role / Device Role / Timing Role: Quad-output clock generator delivering compliant PCIe common clock and SRNS signals with <0.32 ps RMS jitter (Gen 3 SRNS) and <0.45 ps RMS jitter (Gen 4 CC). Use Value: Eliminates need for four discrete oscillators while meeting Intel's stringent jitter mask requirements and enabling layout simplification.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10/25 GbE PHYs and switch fabric ASICs in a modular data center switch. IC Role / Device Role / Timing Role: Programmable frequency translator converting a single 25 MHz crystal reference into multiple Ethernet line rates with independent output formats (LVDS for PHYs, CMOS for management MCU). Use Value: Reduces BOM count and enables field-upgradable clock configurations via I²C without hardware change.
Broadcast Video Sync	FPGA/Processor Clocking
Use Scenario: Distributing frame-synchronized 27 MHz, 74.25 MHz, and 148.5 MHz clocks to SDI transceivers, video encoders, and audio DSPs in a professional video production router. IC Role / Device Role / Timing Role: Low-jitter any-frequency generator supporting SMPTE ST 2082 (12G-SDI) and ST 2081 (6G-SDI) timing standards with <10 ps pk-pk period jitter. Use Value: Ensures bit-accurate sampling across multi-channel video paths and eliminates timing-induced artifacts like lip-sync drift.	Use Scenario: Supplying 500 MHz processor clock, 300 MHz DDR4 memory clock, 100 MHz peripheral bus clock, and 25 MHz debug UART clock from a single 25 MHz crystal in an industrial embedded controller. IC Role / Device Role / Timing Role: Configurable quad clock source with per-output voltage (1.2 V for CPU core, 1.8 V for DDR4, 3.3 V for UART) and independent phase alignment. Use Value: Replaces discrete clock ICs and discrete level shifters, reducing power delivery complexity and PCB area by >60%.

PCIe Gen 3/4 Timing

Ethernet Switch Clocking

Use Scenario: Providing synchronized 100 MHz common clock and separate 100 MHz SRNS reference to multiple PCIe Gen 3/4 endpoints on a server motherboard.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering compliant PCIe common clock and SRNS signals with <0.32 ps RMS jitter (Gen 3 SRNS) and <0.45 ps RMS jitter (Gen 4 CC).

Use Value: Eliminates need for four discrete oscillators while meeting Intel's stringent jitter mask requirements and enabling layout simplification.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10/25 GbE PHYs and switch fabric ASICs in a modular data center switch.

IC Role / Device Role / Timing Role: Programmable frequency translator converting a single 25 MHz crystal reference into multiple Ethernet line rates with independent output formats (LVDS for PHYs, CMOS for management MCU).

Use Value: Reduces BOM count and enables field-upgradable clock configurations via I²C without hardware change.

Broadcast Video Sync

FPGA/Processor Clocking

Use Scenario: Distributing frame-synchronized 27 MHz, 74.25 MHz, and 148.5 MHz clocks to SDI transceivers, video encoders, and audio DSPs in a professional video production router.

IC Role / Device Role / Timing Role: Low-jitter any-frequency generator supporting SMPTE ST 2082 (12G-SDI) and ST 2081 (6G-SDI) timing standards with <10 ps pk-pk period jitter.

Use Value: Ensures bit-accurate sampling across multi-channel video paths and eliminates timing-induced artifacts like lip-sync drift.

Use Scenario: Supplying 500 MHz processor clock, 300 MHz DDR4 memory clock, 100 MHz peripheral bus clock, and 25 MHz debug UART clock from a single 25 MHz crystal in an industrial embedded controller.

IC Role / Device Role / Timing Role: Configurable quad clock source with per-output voltage (1.2 V for CPU core, 1.8 V for DDR4, 3.3 V for UART) and independent phase alignment.

Use Value: Replaces discrete clock ICs and discrete level shifters, reducing power delivery complexity and PCB area by >60%.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05189-GM	Higher integration: includes integrated crystal, smaller 3 × 3 mm QFN, lower 0.35 ps RMS jitter, but fixed 4-output LVDS-only configuration	Best for space-constrained designs requiring ultra-low jitter and crystal integration; not suitable when mixed output formats or external crystal are needed	Select SI5338Q-B04071-GM when flexible input sourcing, multi-format outputs, or field-programmable frequency changes are required
ICS8430I-01LG	Non-programmable, fixed-frequency quad LVDS generator; 0.9 ps RMS jitter; no I²C interface or spread spectrum	Applicable only in static clock trees where frequencies never change post-manufacture; lacks diagnostic features (LOS/LOL)	Choose SI5338Q-B04071-GM for designs needing reprogrammability, jitter margin headroom, or real-time monitoring capabilities

Compared with Si5332A-D05189-GM and ICS8430I-01LG, the SI5338Q-B04071-GM delivers unmatched configurability-supporting six input types, four output formats, independent voltage rails, and runtime frequency/phase updates-making it optimal for evolving system architectures and multi-standard platforms.

Availability

SI5338Q-B04071-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 timing, 10/25 GbE switch clocking, and broadcast video synchronization requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338Q-B04071-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, mobile, infrastructure, and timing solutions with over 40 years of RF and precision timing expertise.

The Si5338 product line was designed specifically for high-performance, software-configurable clock generation in multi-standard serial interface systems-including PCIe, Ethernet, Fibre Channel, and broadcast video-where low jitter, flexible format support, and field-upgradability are mandatory.

FAQ

What is the maximum output frequency supported by the SI5338Q-B04071-GM in LVPECL format?

The SI5338Q-B04071-GM supports LVPECL outputs up to 710 MHz, as confirmed in Table 6 of the official Skyworks datasheet Rev. 1.6. This capability enables direct clocking of high-speed SerDes lanes in PCIe Gen 4 (16 GT/s) and 25 GbE applications without external frequency multiplication. The device maintains <1 ps RMS jitter at 710 MHz when driven by a low-noise differential reference.

Does the SI5338Q-B04071-GM support PCIe Gen 4 Separate Reference No Spread (SRNS) timing?

Yes, the SI5338Q-B04071-GM is explicitly compliant with PCIe Gen 4 SRNS requirements, delivering 0.15–0.45 ps RMS jitter under specified test conditions (PLL BW 2–5 MHz, CDR = 10 MHz), as documented in Table 12 of the Skyworks datasheet Rev. 1.6. Its independent output configuration allows dedicated SRNS reference generation alongside common clock outputs.

Can the SI5338Q-B04071-GM generate different output voltages simultaneously on its four outputs?

Yes, the SI5338Q-B04071-GM supports independent output supply voltages (VDDO0–VDDO3) selectable per output driver: 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This allows simultaneous LVDS at 1.8 V for an FPGA transceiver, HCSL at 1.5 V for a CPU, CMOS at 3.3 V for a legacy microcontroller, and SSTL at 1.8 V for DDR memory-all from a single SI5338Q-B04071-GM device.

How is the SI5338Q-B04071-GM programmed, and is external non-volatile memory required?

The SI5338Q-B04071-GM is programmed via its I²C/SMBus interface using Skyworks' ClockBuilder Pro software. Configuration is stored in on-chip one-time-programmable (OTP) NVM, so no external memory is required. Factory-programmed devices power up with valid clocks within 2 ms (tRDY), and field updates can be performed dynamically without reset.

What thermal performance can be expected from the SI5338Q-B04071-GM in a typical 4-layer PCB layout?

In a standard 4-layer PCB with 1-in² copper pour connected to the exposed thermal pad, the SI5338Q-B04071-GM achieves a junction-to-ambient thermal resistance (θJA) of 37 °C/W (Table 4, Rev. 1.6). At full load (45 mA core current), this yields ~1.7 °C temperature rise above ambient-well within the –40 to +85 °C operating range and eliminating need for forced air cooling.

SI5338Q-B04071-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: Yes

Main Purpose:: Ethernet, Fibre Channel, PCI Express (PCIe), Telecom

Input:: CML, CMOS, HCSL, HSCT, HSTL, LVDS, LVPECL, SSTL, Crystal

Output:: HCSL, HSTL, LVCMOS, LVDS, LVPECL, SSTL

Number of Circuits:: 1

Ratio - Input:Output:: 4:4

Differential - Input:Output:: Yes/Yes

Frequency - Max:: 200MHz

Voltage - Supply:: 1.71V ~ 1.98V, 2.25V ~ 2.75V, 2.97V ~ 3.63V

Operating Temperature:: -40°C ~ 85°C (TA)

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338Q-B04071-GM FAQ

1.How can I place an order for SI5338Q-B04071-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338Q-B04071-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338Q-B04071-GM reliable?

The price and inventory of SI5338Q-B04071-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338Q-B04071-GM is usually 5 days.

3.What payment methods are accepted for SI5338Q-B04071-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338Q-B04071-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338Q-B04071-GM?

SI5338Q-B04071-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338Q-B04071-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338Q-B04071-GM?

For technical support, including SI5338Q-B04071-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338Q-B04071-GM requirements.

6.How does Aetrix verify that SI5338Q-B04071-GM is sourced from the original manufacturer or authorized distributors?

All SI5338Q-B04071-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338Q-B04071-GM meets industry standards.

7.What is the process for return or replacement of SI5338Q-B04071-GM?

All SI5338Q-B04071-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338Q-B04071-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338Q-B04071-GM part is unused and in its original packaging.

Return procedure for SI5338Q-B04071-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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