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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338Q-B04074-GMR

Name: SI5338Q-B04074-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338Q-B04074-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338Q-B04074-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338Q-B04074-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

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Product details

Overview

SI5338Q-B04074-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338Q-B04074-GMR datasheet, SI5338Q-B04074-GMR pinout, SI5338Q-B04074-GMR application, or SI5338Q-B04074-GMR equivalent, this device supports any-frequency synthesis (0.16–710 MHz), independent output voltage selection (1.5/1.8/2.5/3.3 V), programmable phase/frequency adjustment (±45 ns / 1 ppm steps), spread-spectrum control (0.5–5.0% / 33–63 kHz), and loss-of-lock/loss-of-signal alarms.

Technical Context

The SI5338Q-B04074-GMR implements a two-stage PLL architecture: a reference PLL (Stage 1) locks to one of six input sources (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating each output. Each MultiSynth supports integer or fractional mode, enabling true zero-ppm accuracy and sub-Hz frequency resolution.

Output drivers are fully decoupled-each supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats, independent VDDO supply (1.4–3.63 V), and per-output spread spectrum, phase offset (–45 to +45 ns), and frequency increment/decrement control. The device operates from a single 1.8/2.5/3.3 V core supply with 45 mA typical current draw.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps - meets PCIe Gen 4 common clock RMS jitter spec (≤0.45 ps) with margin; enables clean sampling in 10 GbE and Fibre Channel receivers
Output Frequency Range	0.16–710 MHz - covers PCIe 100 MHz, Ethernet 125/156.25 MHz, broadcast video 27/74.25 MHz, and processor clocks up to 710 MHz
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) - eliminates need for external buffer or level translator
Output Format Flexibility	LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL - allows direct interface to FPGAs (LVDS), CPUs (HCSL), switches (CMOS), and SerDes (LVPECL)
Supply Voltage	VDD = 1.71–3.63 V; VDDO = 1.4–3.63 V - supports mixed-voltage system designs without external LDOs
Operating Temperature	–40 to +85 °C - qualified for industrial and telecom line card environments without derating
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch - compatible with standard reflow profiles and high-density PCB layouts

Pinout & Package

SI5338Q-B04074-GMR uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin numbering follows top-view layout with Pin 1 at top-left corner (IN1).

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential input pairs	Accept AC-coupled LVPECL/LVDS/CML references up to 710 MHz; internal 100 Ω termination enabled
IN3, IN4	Single-ended inputs	Support CMOS/SSTL/HSTL references (5–350 MHz); VIH/VIL referenced to VDD
CLK0A/CLK0B to CLK3A/CLK3B	Differential output pairs	Four independent outputs; each pair configurable as LVPECL/LVDS/HCSL/CML with dedicated VDDO
VDDO0–VDDO3	Output buffer supplies	Independent 1.4–3.63 V rails per output bank-enables mixed-signal SoC interfacing
VDD	Core supply	Single 1.8/2.5/3.3 V supply powers PLL, logic, and memory; PSRR optimized for noisy rail environments
SCL, SDA	I²C interface	SMBus-compatible 100/400 kHz bus; supports write-protection and register lock for production programming
INTR	Interrupt output	Open-drain status flag for loss-of-lock, loss-of-signal, or NVM error-connects directly to FPGA GPIO
RSVD_GND	Reserved ground	Internal no-connect; must be tied to GND for mechanical stability and thermal performance

Key Features

Feature	Design Value
MultiSynth™ fractional-N synthesis	Enables independent, any-frequency generation on all four outputs with 1 ppb resolution-eliminates need for multiple XO/VCXO parts
PCIe Gen 1–4 & SRNS compliance	Validated against PCIe Base Spec 4.0 for common clock and Gen 3 separate reference no spread (SRNS) modes-supports plug-and-play server/storage designs
Independent output voltage per driver	Each VDDO rail (VDDO0–VDDO3) sets output swing and logic threshold-allows simultaneous interfacing to 1.8 V FPGA banks and 3.3 V legacy peripherals
Glitchless frequency adjustment	1 ppm step size with pin-controlled increment/decrement-enables dynamic clock scaling in real-time systems without cycle slips
Programmable phase offset	±45 ns range in <20 ps steps-supports skew compensation across multi-lane SerDes interfaces (e.g., PCIe x16, 10G-KR)
Spread spectrum control	Configurable down-spread (0.5–5.0%) at 33–63 kHz on any output-reduces EMI peak emissions for FCC/CE certification

Applications

PCIe Gen 4 Server Backplane	Ethernet Switch Timing
Use Scenario: Providing synchronized 100 MHz common clock to CPU, GPU, and NVMe controllers on a dual-socket server motherboard with >30 cm trace lengths. IC Role / Device Role / Timing Role: Quad-output clock generator delivering low-jitter, phase-aligned clocks with independent SSC control per slot to meet PCIe Gen 4 jitter budget. Use Value: Replaces four discrete HCSL oscillators; reduces BOM count, board area, and inter-clock skew to <100 ps across 16 lanes.	Use Scenario: Generating 125 MHz (1 GbE), 156.25 MHz (10 GbE), and 312.5 MHz (25 GbE) clocks for multi-rate switch ASICs with shared reference architecture. IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact IEEE 802.3-compliant rates from a single 25 MHz crystal. Use Value: Eliminates need for multiple crystals or external dividers; achieves <0.7 ps RMS jitter required for 25G KR FEC lock.
Broadcast Video Master Clock	FPGA-Based Test Equipment
Use Scenario: Distributing frame-synchronized 27 MHz, 74.25 MHz, and 148.5 MHz clocks to SDI encoders, HDMI transmitters, and audio DACs in a 4K video processing chassis. IC Role / Device Role / Timing Role: Low-phase-noise clock generator with independent output format selection (LVDS for SDI, CMOS for microcontrollers). Use Value: Meets SMPTE ST 2082 jitter mask (<0.2 UI) via 0.7 ps RMS performance; avoids costly oven-controlled oscillators.	Use Scenario: Supplying precisely timed stimulus and capture clocks (100–500 MHz) to high-speed digital I/O banks on Xilinx Versal ACAPs during ATE pattern generation. IC Role / Device Role / Timing Role: Programmable jitter source with adjustable phase offset and frequency sweep for receiver stress testing. Use Value: Enables on-board clock perturbation without external signal generators; supports IEEE 1149.6 boundary scan at 500 MHz.

PCIe Gen 4 Server Backplane

Ethernet Switch Timing

Use Scenario: Providing synchronized 100 MHz common clock to CPU, GPU, and NVMe controllers on a dual-socket server motherboard with >30 cm trace lengths.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering low-jitter, phase-aligned clocks with independent SSC control per slot to meet PCIe Gen 4 jitter budget.

Use Value: Replaces four discrete HCSL oscillators; reduces BOM count, board area, and inter-clock skew to <100 ps across 16 lanes.

Use Scenario: Generating 125 MHz (1 GbE), 156.25 MHz (10 GbE), and 312.5 MHz (25 GbE) clocks for multi-rate switch ASICs with shared reference architecture.

IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact IEEE 802.3-compliant rates from a single 25 MHz crystal.

Use Value: Eliminates need for multiple crystals or external dividers; achieves <0.7 ps RMS jitter required for 25G KR FEC lock.

Broadcast Video Master Clock

FPGA-Based Test Equipment

Use Scenario: Distributing frame-synchronized 27 MHz, 74.25 MHz, and 148.5 MHz clocks to SDI encoders, HDMI transmitters, and audio DACs in a 4K video processing chassis.

IC Role / Device Role / Timing Role: Low-phase-noise clock generator with independent output format selection (LVDS for SDI, CMOS for microcontrollers).

Use Value: Meets SMPTE ST 2082 jitter mask (<0.2 UI) via 0.7 ps RMS performance; avoids costly oven-controlled oscillators.

Use Scenario: Supplying precisely timed stimulus and capture clocks (100–500 MHz) to high-speed digital I/O banks on Xilinx Versal ACAPs during ATE pattern generation.

IC Role / Device Role / Timing Role: Programmable jitter source with adjustable phase offset and frequency sweep for receiver stress testing.

Use Value: Enables on-board clock perturbation without external signal generators; supports IEEE 1149.6 boundary scan at 500 MHz.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06181-GM	Higher integration: includes integrated crystal, lower jitter (0.35 ps RMS), but fixed 4-output configuration and no spread spectrum	Best for space-constrained, ultra-low-jitter applications where crystal integration simplifies layout-but lacks SSC for EMI reduction	Select when absolute jitter minimization is critical and EMI is managed elsewhere; not drop-in due to different pinout and no SSC registers
ICS853S01AGI-01LFT	Non-programmable, fixed-frequency (100/125/156.25 MHz), LVDS-only outputs, higher jitter (1.2 ps RMS), no I²C interface	Suitable only for static, single-rate systems like legacy Gigabit Ethernet PHYs-no frequency agility or multi-format support	Choose only for cost-sensitive, low-complexity designs with unchanging clock requirements; requires redesign for any frequency change

Compared with Si5332A-D06181-GM and ICS853S01AGI-01LFT, SI5338Q-B04074-GMR uniquely balances field-programmability, multi-format flexibility, and PCIe Gen 4 compliance-making it optimal for evolving high-speed platforms requiring post-silicon clock tuning and mixed-voltage interoperability.

Availability

SI5338Q-B04074-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 server backplanes, multi-rate Ethernet switching, and broadcast video master clocking requiring stable component supply, long-term lifecycle support, and full programmability across production batches.

Supply support for SI5338Q-B04074-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and industrial markets.

The Si5338 family was designed as a programmable, high-performance clock generator platform for systems demanding flexible, low-jitter timing-targeting PCIe, Ethernet, broadcast, and FPGA-based applications where discrete oscillator replacement and dynamic clock provisioning are essential.

FAQ

What is the maximum output frequency supported by SI5338Q-B04074-GMR?

The SI5338Q-B04074-GMR supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. Frequencies above 350 MHz are limited to two unique values simultaneously (Fvco/4 and Fvco/6) per the MultiSynth architecture-verified in Table 6 of the datasheet.

Does SI5338Q-B04074-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338Q-B04074-GMR is explicitly validated for PCIe Gen 3 SRNS and Gen 4 Common Clock compliance per PCI-SIG specifications. Its 0.11–0.45 ps RMS jitter (Table 12) meets Gen 4 SRNS requirements when configured with PLL bandwidth of 2–5 MHz and CDR = 10 MHz.

Can SI5338Q-B04074-GMR generate different output formats simultaneously?

Yes, SI5338Q-B04074-GMR supports mixed output formats: for example, CLK0A/B as LVDS (100 MHz), CLK1A/B as HCSL (100 MHz), CLK2A/B as CMOS (25 MHz), and CLK3A/B as SSTL (156.25 MHz)-each with independent VDDO supply and drive strength, as confirmed in Section 3.4 and Table 6.

What crystal frequencies are compatible with SI5338Q-B04074-GMR?

SI5338Q-B04074-GMR accepts crystals from 8 to 30 MHz, segmented into four ranges: 8–11 MHz, 11–19 MHz, 19–26 MHz, and 26–30 MHz. Load capacitance support is 11–13 pF (on-chip), with 17–19 pF recommended-detailed in Tables 8–11 of the datasheet.

How is SI5338Q-B04074-GMR programmed in-system?

SI5338Q-B04074-GMR is programmed via its I²C/SMBus-compatible interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software. Configuration can be stored in on-chip OTP NVM for power-on initialization, or loaded dynamically during operation-fully supported in the functional block diagram and Section 5 of the datasheet.

SI5338Q-B04074-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338Q-B04074-GMR FAQ

1.How can I place an order for SI5338Q-B04074-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338Q-B04074-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338Q-B04074-GMR reliable?

The price and inventory of SI5338Q-B04074-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338Q-B04074-GMR is usually 5 days.

3.What payment methods are accepted for SI5338Q-B04074-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338Q-B04074-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338Q-B04074-GMR?

SI5338Q-B04074-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338Q-B04074-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338Q-B04074-GMR?

For technical support, including SI5338Q-B04074-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338Q-B04074-GMR requirements.

6.How does Aetrix verify that SI5338Q-B04074-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338Q-B04074-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338Q-B04074-GMR meets industry standards.

7.What is the process for return or replacement of SI5338Q-B04074-GMR?

All SI5338Q-B04074-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338Q-B04074-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338Q-B04074-GMR part is unused and in its original packaging.

Return procedure for SI5338Q-B04074-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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