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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338Q-B04386-GMR

Name: SI5338Q-B04386-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338Q-B04386-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338Q-B04386-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338Q-B04386-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338Q-B04386-GMR from Skyworks Solutions is a quad-output, I²C-programmable clock generator implementing MultiSynth™ frequency synthesis with 0 ppm precision per output, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL outputs up to 710 MHz. It replaces up to four discrete oscillators in high-speed serial interface timing applications including PCIe root complexes and FPGA clock trees.

For engineers reviewing the SI5338Q-B04386-GMR datasheet, SI5338Q-B04386-GMR pinout, SI5338Q-B04386-GMR application, or SI5338Q-B04386-GMR equivalent, key selection criteria include differential output jitter performance at 100 MHz HCSL (0.15–0.45 ps RMS for PCIe Gen 3/4), independent per-output voltage configuration (1.5/1.8/2.5/3.3 V), and programmable phase/frequency adjustment in 20 ps / 1 ppm steps.

Technical Context

The SI5338Q-B04386-GMR integrates a dual-stage PLL architecture: a high-stability integer-N PLL (Stage 1) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating each output. Each synthesizer supports integer or fractional mode operation with <20 ps programmable phase offset resolution and 1 ppm frequency increment/decrement capability.

Output drivers are fully configurable per channel-supporting differential (LVPECL, LVDS, HCSL, CML) and single-ended (CMOS, SSTL, HSTL) formats across overlapping frequency ranges-and powered by dedicated VDDOx supplies enabling mixed-voltage system interfacing. The device operates from a single 1.8/2.5/3.3 V core supply with 45 mA typical current draw and features loss-of-lock and loss-of-signal alarms via the INTR pin.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS & Gen 4 common clock jitter requirements
Output Count & Type	4 differential clock outputs (CLK0A/B through CLK3A/B); supports up to 8 single-ended or mixed configurations
Frequency Range	0.16–710 MHz per output; includes PCIe-compliant 100 MHz HCSL and 125 MHz LVDS
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V per driver
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, halogen-free
Operating Temp	–40 °C to +85 °C ambient; validated for industrial and telecom line card environments

Pinout & Package

SI5338Q-B04386-GMR is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad. Pin assignments follow the standard Si5338 top-view layout: pins 1–24 include six input clocks (IN1–IN6), four differential output pairs (CLK0A/B through CLK3A/B), four VDDOx supplies, shared VDD and GND, I²C interface (SCL/SDA), interrupt (INTR), and reserved ground (RSVD_GND).

Pin/Terminal	Circuit Role	Design Meaning
IN1/IN2, IN5/IN6	Differential input pairs	Accept 5–710 MHz AC-coupled differential clocks; require external 100 Ω termination
IN3/IN4	Single-ended input pins	Support 5–200 MHz CMOS inputs; VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A/CLK0B – CLK3A/CLK3B	Differential output pairs	Four independent outputs; each configurable as LVPECL/LVDS/HCSL/CML with per-channel VDDOx
VDDO0–VDDO3	Output buffer supplies	Enable mixed-signal interfacing: e.g., CLK0 at 1.8 V LVDS, CLK1 at 3.3 V CMOS
SCL/SDA	I²C control interface	Standard SMBus-compatible 100/400 kHz operation; supports ClockBuilder Pro programming
INTR	Open-drain status indicator	Asserts low on loss-of-lock or loss-of-signal; requires external pull-up resistor

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent, any-frequency synthesizers with zero ppm accuracy and 1 ppb resolution
PCIe Gen 1–4 compliance	Validated for Common Clock (Gen 1/2/3/4) and Gen 3 Separate Reference No Spread (SRNS) modes
Programmable phase/frequency	20 ps step size for phase offset; 1 ppm step size for glitchless frequency tuning
Flexible spread spectrum	Configurable on any output: 0.5–5.0% spread, 33–63 kHz modulation rate, 5–350 MHz range
Zero-delay mode support	Enabled via external feedback path; eliminates propagation delay between input and output clocks
Low-power operation	45 mA typical core current at 100 MHz outputs; 12 mA in buffer-only (PLL bypass) mode

Applications

PCIe Root Complex Timing	Ethernet Switch Clock Tree
Use Scenario: Providing synchronized 100 MHz HCSL clocks to multiple PCIe endpoints and upstream ports in a server motherboard. IC Role / Device Role / Timing Role: Quad-output clock generator delivering Gen 3/4-compliant reference clocks with sub-0.45 ps RMS jitter and deterministic skew control. Use Value: Eliminates need for four discrete oscillators; enables single-point jitter optimization and dynamic frequency margining via I²C.	Use Scenario: Generating 125 MHz LVDS and 156.25 MHz CMOS clocks for 1/10 GbE PHYs and packet processors in a modular switch fabric. IC Role / Device Role / Timing Role: Configurable buffer and level translator supporting mixed-voltage signaling across ASIC, PHY, and SerDes domains. Use Value: Reduces BOM count and PCB area; simplifies timing validation with guaranteed 100 ps max output-to-output skew.
Broadcast Video Synchronization	FPGA-Based Signal Processing
Use Scenario: Delivering genlock-accurate 27 MHz, 74.25 MHz, and 148.5 MHz clocks to SDI transmitters, video encoders, and frame synchronizers in broadcast infrastructure. IC Role / Device Role / Timing Role: Any-frequency clock generator with programmable initial phase offset (±45 ns) for precise inter-device alignment. Use Value: Enables frame-accurate multi-channel video routing without external delay lines or manual trimming.	Use Scenario: Supplying 300 MHz LVDS and 200 MHz CMOS clocks to high-end FPGA I/O banks and transceivers in radar or medical imaging systems. IC Role / Device Role / Timing Role: Low-jitter frequency translator bridging crystal-based system clocks to FPGA-specific domain requirements. Use Value: Achieves <10 ps cycle-cycle jitter at 300 MHz; supports deterministic timing closure in high-speed DDR4 and JESD204B interfaces.

PCIe Root Complex Timing

Ethernet Switch Clock Tree

Use Scenario: Providing synchronized 100 MHz HCSL clocks to multiple PCIe endpoints and upstream ports in a server motherboard.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering Gen 3/4-compliant reference clocks with sub-0.45 ps RMS jitter and deterministic skew control.

Use Value: Eliminates need for four discrete oscillators; enables single-point jitter optimization and dynamic frequency margining via I²C.

Use Scenario: Generating 125 MHz LVDS and 156.25 MHz CMOS clocks for 1/10 GbE PHYs and packet processors in a modular switch fabric.

IC Role / Device Role / Timing Role: Configurable buffer and level translator supporting mixed-voltage signaling across ASIC, PHY, and SerDes domains.

Use Value: Reduces BOM count and PCB area; simplifies timing validation with guaranteed 100 ps max output-to-output skew.

Broadcast Video Synchronization

FPGA-Based Signal Processing

Use Scenario: Delivering genlock-accurate 27 MHz, 74.25 MHz, and 148.5 MHz clocks to SDI transmitters, video encoders, and frame synchronizers in broadcast infrastructure.

IC Role / Device Role / Timing Role: Any-frequency clock generator with programmable initial phase offset (±45 ns) for precise inter-device alignment.

Use Value: Enables frame-accurate multi-channel video routing without external delay lines or manual trimming.

Use Scenario: Supplying 300 MHz LVDS and 200 MHz CMOS clocks to high-end FPGA I/O banks and transceivers in radar or medical imaging systems.

IC Role / Device Role / Timing Role: Low-jitter frequency translator bridging crystal-based system clocks to FPGA-specific domain requirements.

Use Value: Achieves <10 ps cycle-cycle jitter at 300 MHz; supports deterministic timing closure in high-speed DDR4 and JESD204B interfaces.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06989-GM	Higher integration: 8 outputs, integrated LDOs, lower jitter (0.35 ps RMS), but larger 32-QFN package	Targets dense, multi-domain systems requiring >4 outputs or simplified power design	Choose when needing >4 outputs or ultra-low jitter; avoid if footprint or cost sensitivity favors 24-QFN
ICS8430I-01T	Fixed-frequency, non-programmable; 4 LVDS outputs only; no I²C interface; higher jitter (1.2 ps RMS)	Suitable for stable, low-cost clock distribution where frequency flexibility is unnecessary	Choose only for fixed-frequency legacy designs; not viable for PCIe Gen 4 or reconfigurable systems

Compared with SI5338Q-B04386-GMR, the Si5332A offers superior jitter and output count but increases board area and cost, while the ICS8430I sacrifices programmability and jitter performance for simplicity-making SI5338Q-B04386-GMR the optimal balance of flexibility, compliance, and compactness for PCIe and FPGA timing.

Availability

SI5338Q-B04386-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 root complexes, 10 GbE switch fabrics, and broadcast video synchronization systems requiring stable component supply, long-term lifecycle assurance, and full traceability.

Supply support for SI5338Q-B04386-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and industrial markets.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces-including PCIe, Ethernet, and Fibre Channel-enabling flexible, future-proof timing architectures in space-constrained systems.

FAQ

What is the primary function of the SI5338Q-B04386-GMR in a PCIe Gen 4 system?

The SI5338Q-B04386-GMR serves as a compliant common clock source, generating four low-jitter 100 MHz HCSL reference clocks meeting PCIe Gen 4 total jitter limits (0.15–0.45 ps RMS). Its dual-stage PLL and MultiSynth™ architecture ensure stability under varying load conditions, and its I²C programmability allows runtime frequency margining-critical for validating link training margins in root complex designs using SI5338Q-B04386-GMR.

Does the SI5338Q-B04386-GMR support both differential and single-ended output formats simultaneously?

Yes, the SI5338Q-B04386-GMR supports mixed-mode operation: any combination of differential (LVPECL, LVDS, HCSL, CML) and single-ended (CMOS, SSTL, HSTL) outputs can be active concurrently. Each output pair (e.g., CLK0A/B) is independently configurable, and VDDOx supplies allow different voltage levels per driver-enabling direct interfacing with diverse logic families without external level shifters in systems using SI5338Q-B04386-GMR.

How is the SI5338Q-B04386-GMR programmed, and what tools are required?

The SI5338Q-B04386-GMR is programmed via its I²C/SMBus-compatible interface using Skyworks' ClockBuilder Pro software, which auto-generates register maps based on user-defined frequencies, formats, and supply voltages. Configuration can be stored in on-chip OTP memory for autonomous startup. No external programmer is needed-standard I²C host controllers or evaluation boards suffice for full SI5338Q-B04386-GMR deployment.

What is the significance of the "Q" suffix in SI5338Q-B04386-GMR?

The "Q" denotes the Si5338Q variant, which features enhanced spread-spectrum capabilities-including wider modulation rate range (33–63 kHz) and finer spread resolution-optimized for EMI reduction in dense PCB layouts. This variant also includes improved thermal performance and tighter factory calibration for jitter-critical applications such as PCIe Gen 4 and 10 GbE, distinguishing SI5338Q-B04386-GMR from earlier Si5338A/B/C versions.

Can the SI5338Q-B04386-GMR operate in clock buffer (PLL bypass) mode, and what are its benefits?

Yes, the SI5338Q-B04386-GMR supports clock buffer mode, where the PLL is disabled and input clocks pass directly to outputs with minimal additive jitter (0.165 ps RMS typical). This mode reduces power consumption to 12 mA and eliminates PLL-related latency-ideal for applications requiring deterministic delay, such as zero-delay clock distribution or jitter cleaning of noisy sources in systems deploying SI5338Q-B04386-GMR.

SI5338Q-B04386-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338Q-B04386-GMR FAQ

1.How can I place an order for SI5338Q-B04386-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338Q-B04386-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338Q-B04386-GMR reliable?

The price and inventory of SI5338Q-B04386-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338Q-B04386-GMR is usually 5 days.

3.What payment methods are accepted for SI5338Q-B04386-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338Q-B04386-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338Q-B04386-GMR?

SI5338Q-B04386-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338Q-B04386-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338Q-B04386-GMR?

For technical support, including SI5338Q-B04386-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338Q-B04386-GMR requirements.

6.How does Aetrix verify that SI5338Q-B04386-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338Q-B04386-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338Q-B04386-GMR meets industry standards.

7.What is the process for return or replacement of SI5338Q-B04386-GMR?

All SI5338Q-B04386-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338Q-B04386-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338Q-B04386-GMR part is unused and in its original packaging.

Return procedure for SI5338Q-B04386-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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