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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338Q-B04428-GM

Name: SI5338Q-B04428-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338Q-B04428-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338Q-B04428-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338Q-B04428-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

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Product details

Overview

SI5338Q-B04428-GM from Skyworks Solutions is an I²C-programmable quad clock generator IC with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply. It replaces up to four crystal oscillators in FPGA clocking, PCIe interconnect, and broadcast video timing systems.

For engineers reviewing the SI5338Q-B04428-GM datasheet, SI5338Q-B04428-GM pinout, SI5338Q-B04428-GM application, or SI5338Q-B04428-GM equivalent, key selection criteria include output format flexibility (LVPECL/LVDS/HCSL/CMOS/SSTL), independent per-output voltage (1.5–3.3 V), any-frequency synthesis capability (0.16–710 MHz), and spread-spectrum modulation support (0.5–5.0% at 33–63 kHz).

Technical Context

The SI5338Q-B04428-GM implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers, each driving one output channel. Each synthesizer supports integer- and fractional-mode operation with <1 ppb frequency resolution and programmable initial phase offset (±45 ns).

It features dual-input clock selection (six total inputs: IN1–IN6), loss-of-signal and loss-of-lock monitoring, independent output enable control, and glitchless frequency increment/decrement via dedicated pins or I²C. The device operates across –40 to +85 °C and supports external feedback for zero-delay mode.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS and Gen 4 common clock jitter requirements.
Output Frequency Range	0.16–710 MHz per channel; supports LVPECL/LVDS (≤710 MHz), HCSL (≤250 MHz), CMOS (≤200 MHz), SSTL/HSTL (≤350 MHz).
Input Reference Support	External crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz).
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; output buffers: independently configurable 1.5/1.8/2.5/3.3 V per driver.
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, moisture sensitivity level 3.
Operating Temperature	–40 °C to +85 °C ambient; validated for industrial and telecom line card environments.
Spread Spectrum	Configurable on any output: spread range 0.5–5.0%, modulation rate 33–63 kHz, supports EMI reduction without system-level changes.

Pinout & Package

SI5338Q-B04428-GM uses a 24-pin QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments follow standard Si5338 pinout: six input clocks (IN1–IN6), four differential output pairs (CLK0A/B through CLK3A/B), four VDDOx supplies (VDDO0–VDDO3), core VDD, SCL/SDA/I²C interface, INTR alarm output, and reserved ground.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential input pair	Accepts AC-coupled LVDS/LVPECL/CML reference clocks up to 710 MHz; internal 100 Ω termination enabled.
IN3, IN4	Single-ended input	Supports CMOS/SSTL/HSTL inputs (5–350 MHz); 20 kΩ internal pull-up/pull-down configurable via register.
CLK0A–CLK3B	Differential output pairs	Four independent output channels; each pair supports LVPECL/LVDS/HCSL/CML/SSTL formats with per-channel VDDO.
VDDO0–VDDO3	Output buffer supply	Independent 1.5/1.8/2.5/3.3 V supply per output bank; enables mixed-voltage signaling on same device.
SCL, SDA	I²C interface	SMBus-compatible 100/400 kHz interface for configuration; supports multi-drop addressing and interrupt-driven status reads.
INTR	Interrupt output	Open-drain active-low signal indicating loss-of-lock, loss-of-signal, or PLL unlock; configurable mask per event type.

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enabling true zero-ppm accuracy on all outputs simultaneously.
Glitchless frequency tuning	Pin-controlled or I²C-based frequency increment/decrement in 1 ppm steps without output interruption.
Per-output phase adjustment	Programmable phase offset <20 ps step resolution (±45 ns range) for skew compensation across multi-lane interfaces.
PCIe Gen 3/4 compliance	Validated for Common Clock and SRNS modes per PCI-SIG specifications; includes built-in jitter filter profiles.
Flexible clock buffering	PLL bypass mode enables low-additive-jitter (<0.165 ps RMS) clock distribution with sub-ns propagation delay (2.5–4 ns).

Applications

PCIe Interconnect Timing	FPGA & Processor Clocking
Use Scenario: Providing synchronized reference clocks to multiple PCIe Gen 3/4 endpoints and root complexes in server backplanes and switch fabrics. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent 100 MHz HCSL clocks with <0.32 ps RMS jitter (SRNS mode) and matched skew. Use Value: Enables full Gen 4 lane compliance without external jitter cleaners; eliminates need for four discrete oscillators and reduces board area by >60%.	Use Scenario: Supplying core, I/O, transceiver, and DDR memory clocks to Xilinx Versal or Intel Agilex FPGAs in high-speed data acquisition systems. IC Role / Device Role / Timing Role: Configurable clock source generating 300 MHz LVDS (transceivers), 156.25 MHz LVPECL (core), 100 MHz HCSL (PCIe), and 200 MHz CMOS (DDR) from single device. Use Value: Reduces BOM count and layout complexity; supports dynamic reconfiguration of clock frequencies during runtime via I²C.
Broadcast Video/Audio Sync	Telecom Line Card Timing
Use Scenario: Generating SMPTE ST 2059-2 PTP-synchronized clocks (e.g., 27 MHz, 74.25 MHz, 148.5 MHz) for SDI routers and IP media gateways. IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact video timing frequencies with <1 ppb accuracy and <10 ps cycle-cycle jitter. Use Value: Eliminates frame slips and lip-sync errors; supports seamless switching between multiple video standards without hardware change.	Use Scenario: Delivering OC-12/OC-48/SONET-compliant clocks (155.52 MHz, 622.08 MHz) and Ethernet timing (125 MHz, 156.25 MHz) in carrier-grade DSLAM and PON line cards. IC Role / Device Role / Timing Role: Dual-reference clock generator accepting 19.44 MHz crystal and 10 MHz GPS-disciplined input, synthesizing five telecom frequencies with holdover stability. Use Value: Meets GR-1244-CORE jitter limits; provides loss-of-signal detection and automatic failover to backup reference.

PCIe Interconnect Timing

FPGA & Processor Clocking

Use Scenario: Providing synchronized reference clocks to multiple PCIe Gen 3/4 endpoints and root complexes in server backplanes and switch fabrics.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent 100 MHz HCSL clocks with <0.32 ps RMS jitter (SRNS mode) and matched skew.

Use Value: Enables full Gen 4 lane compliance without external jitter cleaners; eliminates need for four discrete oscillators and reduces board area by >60%.

Use Scenario: Supplying core, I/O, transceiver, and DDR memory clocks to Xilinx Versal or Intel Agilex FPGAs in high-speed data acquisition systems.

IC Role / Device Role / Timing Role: Configurable clock source generating 300 MHz LVDS (transceivers), 156.25 MHz LVPECL (core), 100 MHz HCSL (PCIe), and 200 MHz CMOS (DDR) from single device.

Use Value: Reduces BOM count and layout complexity; supports dynamic reconfiguration of clock frequencies during runtime via I²C.

Broadcast Video/Audio Sync

Telecom Line Card Timing

Use Scenario: Generating SMPTE ST 2059-2 PTP-synchronized clocks (e.g., 27 MHz, 74.25 MHz, 148.5 MHz) for SDI routers and IP media gateways.

IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact video timing frequencies with <1 ppb accuracy and <10 ps cycle-cycle jitter.

Use Value: Eliminates frame slips and lip-sync errors; supports seamless switching between multiple video standards without hardware change.

Use Scenario: Delivering OC-12/OC-48/SONET-compliant clocks (155.52 MHz, 622.08 MHz) and Ethernet timing (125 MHz, 156.25 MHz) in carrier-grade DSLAM and PON line cards.

IC Role / Device Role / Timing Role: Dual-reference clock generator accepting 19.44 MHz crystal and 10 MHz GPS-disciplined input, synthesizing five telecom frequencies with holdover stability.

Use Value: Meets GR-1244-CORE jitter limits; provides loss-of-signal detection and automatic failover to backup reference.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06889-GM	Higher integration: 8 outputs, integrated jitter cleaner, lower 0.35 ps RMS jitter; requires external 100 MHz reference for best performance.	Targeted at 100G/400G optical modules and ultra-low-jitter SerDes applications where SI5338Q-B04428-GM's 0.7 ps is insufficient.	Select when sub-0.4 ps RMS jitter and >4 outputs are required; not drop-in due to different pinout and higher power (85 mA vs. 45 mA).
ICS853S01AG-01LF	Fixed-frequency, non-programmable quad LVDS buffer; no synthesis capability; 1.2 ps RMS jitter; 3.3 V only.	Used in cost-sensitive, static-clocking applications like legacy PCIe Gen 1/2 add-in cards where frequency agility is unnecessary.	Select only for fixed 100 MHz LVDS distribution; lacks I²C, spread spectrum, or multi-format support of SI5338Q-B04428-GM.

Compared with Si5332A-D06889-GM and ICS853S01AG-01LF, SI5338Q-B04428-GM uniquely balances programmability, jitter performance, and pin-count efficiency for mid-tier FPGA and telecom timing-offering full any-frequency synthesis in a compact 24-QFN without requiring external loop filters or high-cost references.

Availability

SI5338Q-B04428-GM is available at Aetrix Electronics and suitable for PCIe interconnect timing, FPGA clocking, broadcast video synchronization, and telecom line card applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338Q-B04428-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line delivers highly configurable, low-jitter clock generation for high-speed digital systems including PCIe, Ethernet, and broadcast infrastructure-designed to replace multiple discrete oscillators while maintaining sub-picosecond timing integrity.

FAQ

What is the maximum output frequency supported by SI5338Q-B04428-GM in LVPECL format?

The SI5338Q-B04428-GM supports LVPECL output frequencies up to 710 MHz. This capability is confirmed in Table 6 of the official Skyworks datasheet Rev. 1.6, which specifies 0.16–710 MHz for LVPECL, LVDS, and CML formats. Operation above 350 MHz is limited to two unique frequencies simultaneously (Fvco/4 and Fvco/6), but SI5338Q-B04428-GM maintains full specification compliance across its rated range.

Does SI5338Q-B04428-GM support PCIe Gen 4 Common Clock mode?

Yes, SI5338Q-B04428-GM is explicitly validated for PCIe Gen 4 Common Clock mode with 0.15–0.45 ps RMS jitter (Table 12, Rev. 1.6). It meets the PCI-SIG Base Specification 4.0 rev. 0.5 requirements when configured with a PLL bandwidth of 2–4 MHz or 2–5 MHz and CDR = 10 MHz, making SI5338Q-B04428-GM suitable for next-generation server and accelerator designs.

Can SI5338Q-B04428-GM generate different output voltages on each channel?

Yes, SI5338Q-B04428-GM provides independent VDDOx supplies (VDDO0–VDDO3) allowing each of its four output banks to operate at 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This enables mixed-signal interfacing-for example, driving 1.8 V LVDS SerDes lanes and 3.3 V CMOS control logic simultaneously-without external level shifters, a key design advantage of SI5338Q-B04428-GM.

How is spread-spectrum clocking configured on SI5338Q-B04428-GM?

Spread-spectrum clocking on SI5338Q-B04428-GM is configured per output via I²C registers to set spread range (0.5–5.0%), modulation rate (33–63 kHz), and direction (down-spread default). The feature is enabled independently on any output supporting frequencies from 5 to 350 MHz, and SI5338Q-B04428-GM applies it without affecting other outputs or requiring external components.

What development tools are available for programming SI5338Q-B04428-GM?

Skyworks provides ClockBuilder Pro software for GUI-based configuration of SI5338Q-B04428-GM, including frequency planning, jitter analysis, and register file generation. Additionally, the free PCIe Clock Jitter Tool validates SI5338Q-B04428-GM output compliance against PCI-SIG specifications. Both tools are downloadable from skyworksinc.com and fully support SI5338Q-B04428-GM device-specific settings.

SI5338Q-B04428-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338Q-B04428-GM FAQ

1.How can I place an order for SI5338Q-B04428-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338Q-B04428-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338Q-B04428-GM reliable?

The price and inventory of SI5338Q-B04428-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338Q-B04428-GM is usually 5 days.

3.What payment methods are accepted for SI5338Q-B04428-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338Q-B04428-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338Q-B04428-GM?

SI5338Q-B04428-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338Q-B04428-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338Q-B04428-GM?

For technical support, including SI5338Q-B04428-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338Q-B04428-GM requirements.

6.How does Aetrix verify that SI5338Q-B04428-GM is sourced from the original manufacturer or authorized distributors?

All SI5338Q-B04428-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338Q-B04428-GM meets industry standards.

7.What is the process for return or replacement of SI5338Q-B04428-GM?

All SI5338Q-B04428-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338Q-B04428-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338Q-B04428-GM part is unused and in its original packaging.

Return procedure for SI5338Q-B04428-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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