Skyworks Solutions Inc. SI5338Q-B05986-GM

Overview

SI5338Q-B05986-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis, delivering four independent, any-frequency clocks (0.16–710 MHz) with 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL output formats. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338Q-B05986-GM datasheet, SI5338Q-B05986-GM pinout, SI5338Q-B05986-GM application, or SI5338Q-B05986-GM equivalent, key selection criteria include PCIe SRNS jitter performance (0.11 ps RMS), independent per-output voltage control (1.5/1.8/2.5/3.3 V), 24-QFN package compatibility, and I²C-based field reprogramming capability without hardware changes.

Technical Context

The SI5338Q-B05986-GM implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesis blocks, each driving a configurable output buffer. This enables true zero-ppm frequency accuracy across all outputs while supporting integer and fractional synthesis modes.

It accepts six input sources - differential (5–710 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or external crystal (8–30 MHz) - and provides loss-of-lock and loss-of-signal alarms. Output drivers support independent format, voltage, phase offset (<20 ps step), and spread-spectrum modulation (0.5–5.0%, 33–63 kHz).

Key Specifications

Pinout & Package

SI5338Q-B05986-GM is housed in a 4 mm × 4 mm, 24-lead QFN package with exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Compared with Si5332D-A05986-GM and ICS853S02AGT, SI5338Q-B05986-GM delivers optimal balance of field-programmability, PCIe Gen 4 readiness, and compact 24-QFN packaging-making it ideal for reconfigurable systems requiring four independent, high-fidelity clocks without added power management complexity.

Availability

SI5338Q-B05986-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, 10GbE switch clocking, and broadcast video synchronization requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338Q-B05986-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line was designed for high-performance, multi-protocol clock generation in data center, telecom, and broadcast equipment-emphasizing jitter performance, configurability, and space efficiency over fixed-frequency alternatives.

FAQ

What is the primary function of the SI5338Q-B05986-GM in a PCIe Gen 4 system?

The SI5338Q-B05986-GM serves as a quad-output common clock generator, delivering four synchronized 100 MHz HCSL clocks that meet PCIe Gen 4 Common Clock jitter specifications (0.15–0.45 ps RMS). Its MultiSynth™ architecture ensures zero ppm frequency accuracy and tight inter-output skew (<100 ps), directly supporting switch and endpoint timing compliance per PCI-SIG Base Specification 4.0. SI5338Q-B05986-GM enables consolidation of multiple oscillators into a single programmable device.

Does the SI5338Q-B05986-GM support spread-spectrum clocking (SSC), and how is it configured?

Yes, the SI5338Q-B05986-GM supports fully configurable spread-spectrum clocking on any output: spread range 0.5–5.0%, modulation rate 33–63 kHz, and down-spread default. Configuration is performed via I²C register writes using ClockBuilder Pro software or direct register access. SSC parameters are stored in OTP memory and persist across power cycles. SI5338Q-B05986-GM allows independent SSC enable/disable per output without affecting other channels.

Can the SI5338Q-B05986-GM operate in clock buffer (PLL bypass) mode, and what are its jitter characteristics?

Yes, the SI5338Q-B05986-GM supports clock buffer mode with PLL bypass, achieving additive phase jitter of 0.165 ps RMS (12 kHz–20 MHz) and 0.225 ps RMS (50 kHz–80 MHz) for a 622.08 MHz differential input. In this mode, input-to-output propagation delay is 2.5–4 ns, and loss-of-signal detection remains active. SI5338Q-B05986-GM retains full output format and voltage configurability even when bypassing the PLL.

How many reference inputs does the SI5338Q-B05986-GM support, and what types are accepted?

The SI5338Q-B05986-GM supports six reference inputs: two differential pairs (IN1/IN2 and IN5/IN6, 5–710 MHz), two single-ended inputs (IN3/IN4, 5–350 MHz), and an internal crystal oscillator interface (8–30 MHz). All inputs are independently selectable per output channel via register configuration. SI5338Q-B05986-GM automatically detects input type and configures biasing and termination accordingly.

Is the SI5338Q-B05986-GM pin-compatible with other Si5338 variants, and what package does it use?

Yes, SI5338Q-B05986-GM uses the standard 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) shared across the Si5338 family, ensuring mechanical and pinout compatibility with all Si5338 variants including Si5338A/B/C/D/Q. Pin functions, power domains, and I²C interface locations are identical. SI5338Q-B05986-GM differs only in factory-programmed OTP configuration-not in physical or electrical pin behavior.