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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338Q-B06140-GM

Name: SI5338Q-B06140-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338Q-B06140-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338Q-B06140-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338Q-B06140-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338Q-B06140-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator implementing MultiSynth™ PLL architecture to synthesize any frequency on each of four differential outputs with 0 ppm precision. It supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL output formats, operates from 1.8/2.5/3.3 V core supply, and delivers 0.7 ps RMS typical phase jitter. It serves as a PCIe Gen 1–4 common clock source in high-speed switch/router designs.

For engineers reviewing the SI5338Q-B06140-GM datasheet, SI5338Q-B06140-GM pinout, SI5338Q-B06140-GM application, or SI5338Q-B06140-GM equivalent, key selection considerations include its 4-output independent frequency synthesis capability, PCIe Gen 4 SRNS compliance, 24-QFN package footprint, I²C programmability via ClockBuilder Pro, and configurable spread-spectrum support up to 5% deviation.

Technical Context

The SI5338Q-B06140-GM integrates a two-stage synthesis architecture: a primary PLL (with 1.6 MHz loop bandwidth) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesizers per output channel. Each synthesizer supports integer or fractional mode operation, enabling true zero-ppm accuracy and sub-ppb frequency resolution.

It features independent output voltage control (1.5/1.8/2.5/3.3 V per driver), programmable phase offset (±45 ns), glitchless frequency increment/decrement in 1 ppm steps, and loss-of-lock/loss-of-signal alarms. The device supports external feedback for zero-delay mode and offers highly configurable spread spectrum (33–63 kHz modulation rate, 0.5–5.0% spread) on any output.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count	Four independent differential clock outputs (CLK0A/B through CLK3A/B)
Phase jitter (RMS)	0.7 ps typical - meets PCIe Gen 3/4 SRNS and GbE jitter requirements
Frequency range	0.16–710 MHz per output - covers PCIe 100 MHz, Ethernet 125/156.25 MHz, Fibre Channel 1.0625 GHz (via /2 divider)
Input reference support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply voltages	Core: 1.8/2.5/3.3 V; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V
Package	24-pin QFN, 4 × 4 mm - compatible with standard PCB land pattern and reflow profiles
Operating temperature	–40 °C to +85 °C - qualified for industrial and telecom line card environments

Pinout & Package

SI5338Q-B06140-GM uses a 24-lead, 4 × 4 mm QFN package with exposed thermal pad. Pin 1 is top-left corner (IN1), pin 24 is bottom-right (GND). Pin functions are defined per Skyworks Rev. 1.6 datasheet Section 7 and Figure 1 (Top View).

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential input pairs	Accept 5–710 MHz AC-coupled differential clocks; require external 100 Ω termination
IN3, IN4	Single-ended input pins	Support CMOS/SSTL/HSTL inputs (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A–CLK3B	Differential output pairs	Four independent outputs; each pair supports LVPECL/LVDS/HCSL/CML/SSTL/HSTL formats
VDDO0–VDDO3	Output buffer supplies	Independent 1.5/1.8/2.5/3.3 V per output bank - enables mixed-voltage system interfacing
SCL, SDA	I²C interface	SMBus-compatible serial bus (up to 400 kHz) for configuration and status monitoring
INTR	Interrupt output	Open-drain alarm signal indicating loss-of-lock or loss-of-signal events

Key Features

Feature	Design Value
MultiSynth™ synthesis	Enables independent, any-frequency generation on all four outputs with zero ppm error - eliminates need for multiple crystal oscillators
PCIe Gen 4 SRNS compliance	0.15–0.45 ps RMS jitter in separate-reference-no-spread mode - satisfies PCIe Base Spec 4.0 rev 0.5 timing budget
Configurable spread spectrum	Programmable 0.5–5.0% down-spread at 33–63 kHz - reduces EMI without affecting system timing margins
Glitchless frequency tuning	1 ppm step size with <667 ns update time - enables real-time clock rate adaptation in FPGA-based systems
Independent phase adjustment	±45 ns range in <20 ps steps - allows precise skew compensation across multi-lane SerDes interfaces

Applications

PCIe Gen 4 Switch Fabric	Ethernet 10GbE Line Card
Use Scenario: High-density data center switch using PCIe Gen 4 x16 upstream links and NVMe SSD interconnects. IC Role / Device Role / Timing Role: Provides synchronized 100 MHz common clock to switch ASIC and endpoint devices while meeting PCIe Gen 4 SRNS jitter spec. Use Value: Eliminates four discrete oscillators; enables single-point clock management and dynamic frequency scaling during link training.	Use Scenario: 10GbE SFP+ line card with dual MACs and PHYs requiring low-jitter 156.25 MHz and 312.5 MHz clocks. IC Role / Device Role / Timing Role: Generates both frequencies simultaneously from one 25 MHz crystal reference using independent MultiSynth™ channels. Use Value: Reduces BOM count and board area; avoids trace-length matching issues between separate clock sources.
Broadcast Video Timing	FPGA-Based Protocol Converter
Use Scenario: SMPTE ST 2082-1 (12G-SDI) video processing module requiring 74.25 MHz and 148.5 MHz pixel clocks. IC Role / Device Role / Timing Role: Delivers two phase-aligned, low-jitter clocks with <100 ps output-to-output skew in LVDS format. Use Value: Ensures deterministic sampling across parallel video lanes; meets SMPTE jitter mask requirements without external cleanup.	Use Scenario: Industrial protocol gateway translating Modbus TCP to CAN FD, requiring isolated 40 MHz and 80 MHz clocks for CPU and transceiver domains. IC Role / Device Role / Timing Role: Supplies independent, voltage-isolated clocks (3.3 V for CPU, 5 V via level-shifter for CAN FD PHY) from single IC. Use Value: Simplifies power domain partitioning; enables synchronous cross-domain data transfer without metastability risk.

PCIe Gen 4 Switch Fabric

Ethernet 10GbE Line Card

Use Scenario: High-density data center switch using PCIe Gen 4 x16 upstream links and NVMe SSD interconnects.

IC Role / Device Role / Timing Role: Provides synchronized 100 MHz common clock to switch ASIC and endpoint devices while meeting PCIe Gen 4 SRNS jitter spec.

Use Value: Eliminates four discrete oscillators; enables single-point clock management and dynamic frequency scaling during link training.

Use Scenario: 10GbE SFP+ line card with dual MACs and PHYs requiring low-jitter 156.25 MHz and 312.5 MHz clocks.

IC Role / Device Role / Timing Role: Generates both frequencies simultaneously from one 25 MHz crystal reference using independent MultiSynth™ channels.

Use Value: Reduces BOM count and board area; avoids trace-length matching issues between separate clock sources.

Broadcast Video Timing

FPGA-Based Protocol Converter

Use Scenario: SMPTE ST 2082-1 (12G-SDI) video processing module requiring 74.25 MHz and 148.5 MHz pixel clocks.

IC Role / Device Role / Timing Role: Delivers two phase-aligned, low-jitter clocks with <100 ps output-to-output skew in LVDS format.

Use Value: Ensures deterministic sampling across parallel video lanes; meets SMPTE jitter mask requirements without external cleanup.

Use Scenario: Industrial protocol gateway translating Modbus TCP to CAN FD, requiring isolated 40 MHz and 80 MHz clocks for CPU and transceiver domains.

IC Role / Device Role / Timing Role: Supplies independent, voltage-isolated clocks (3.3 V for CPU, 5 V via level-shifter for CAN FD PHY) from single IC.

Use Value: Simplifies power domain partitioning; enables synchronous cross-domain data transfer without metastability risk.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5341-A01879-GM	8-output, higher integration (integrated LDOs), lower jitter (0.35 ps RMS), supports JESD204B	Targeted at RF/data converter systems requiring >4 outputs or ultra-low jitter; larger 32-QFN package	Select when >4 outputs or sub-0.5 ps jitter is required; not drop-in due to pin count and power architecture differences
ICS853S01AG-01LF	4-output, fixed-frequency (100/125/156.25 MHz), no I²C programming, 1.2 ps RMS jitter	Cost-sensitive, static-clock applications only; lacks frequency flexibility and spread spectrum	Choose for simple, unchanging clock trees where programmability is unnecessary and lower cost is critical

Compared with Si5341-A01879-GM, SI5338Q-B06140-GM offers lower system cost and smaller footprint for 4-output needs; compared with ICS853S01AG-01LF, it provides full frequency agility and jitter optimization features essential for PCIe Gen 4 and adaptive systems.

Availability

SI5338Q-B06140-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch fabrics, 10GbE line cards, broadcast video timing modules, and FPGA-based protocol converters requiring stable component supply across production lifecycles.

Supply support for SI5338Q-B06140-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces including PCIe, Ethernet, Fibre Channel, and broadcast video - designed to replace multiple fixed-frequency oscillators with a single configurable device.

FAQ

What is the maximum output frequency supported by SI5338Q-B06140-GM?

The SI5338Q-B06140-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, and 250 MHz on HCSL. Two unique frequencies above 350 MHz (e.g., Fvco/4 and Fvco/6) can be generated simultaneously. All outputs maintain 0.7 ps RMS typical jitter within their respective ranges. SI5338Q-B06140-GM achieves this using its patented MultiSynth™ fractional-N synthesis architecture with integrated VCO.

Does SI5338Q-B06140-GM support PCIe Gen 4 Separate Reference No Spread (SRNS) compliance?

Yes, SI5338Q-B06140-GM is explicitly validated for PCIe Gen 4 SRNS mode with 0.11–0.32 ps RMS jitter (typical 0.15 ps) when configured with 2–5 MHz PLL bandwidth and 10 MHz CDR. This meets PCI-SIG Base Specification 4.0 rev 0.5 requirements. SI5338Q-B06140-GM achieves this performance using low-noise charge pump design and optimized loop filter settings accessible via ClockBuilder Pro software.

How many input reference sources can SI5338Q-B06140-GM accept simultaneously?

SI5338Q-B06140-GM supports up to six input reference sources: two differential pairs (IN1/IN2 and IN5/IN6), two single-ended pins (IN3/IN4), and two additional differential inputs (IN1/IN2 used in alternate configuration). Only one reference is active at a time; switching between them requires I²C reconfiguration. SI5338Q-B06140-GM's input stage includes automatic loss-of-signal detection with 2.6–5 µs response time for all supported input types.

Can SI5338Q-B06140-GM generate different output voltage levels on each channel?

Yes, SI5338Q-B06140-GM provides independent VDDO0–VDDO3 supplies, allowing each of the four output banks to operate at 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This enables direct interfacing with mixed-voltage components (e.g., 1.8 V FPGA I/O and 3.3 V legacy PHY) without external level shifters. SI5338Q-B06140-GM maintains specified jitter performance across all supported output voltage configurations.

Is ClockBuilder Pro software required to configure SI5338Q-B06140-GM?

No, ClockBuilder Pro is optional but strongly recommended for SI5338Q-B06140-GM configuration. The device supports full I²C register-level programming per datasheet Section 6, but ClockBuilder Pro automates MultiSynth™ parameter calculation, validates frequency plans, generates initialization scripts, and performs PCIe jitter compliance checks. SI5338Q-B06140-GM factory-programmed units ship with default configurations usable out-of-box for common applications.

SI5338Q-B06140-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338Q-B06140-GM FAQ

1.How can I place an order for SI5338Q-B06140-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338Q-B06140-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338Q-B06140-GM reliable?

The price and inventory of SI5338Q-B06140-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338Q-B06140-GM is usually 5 days.

3.What payment methods are accepted for SI5338Q-B06140-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338Q-B06140-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338Q-B06140-GM?

SI5338Q-B06140-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338Q-B06140-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338Q-B06140-GM?

For technical support, including SI5338Q-B06140-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338Q-B06140-GM requirements.

6.How does Aetrix verify that SI5338Q-B06140-GM is sourced from the original manufacturer or authorized distributors?

All SI5338Q-B06140-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338Q-B06140-GM meets industry standards.

7.What is the process for return or replacement of SI5338Q-B06140-GM?

All SI5338Q-B06140-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338Q-B06140-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338Q-B06140-GM part is unused and in its original packaging.

Return procedure for SI5338Q-B06140-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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