Skyworks Solutions Inc. SI5342D-B04119-GMR
- Part No.:
- SI5342D-B04119-GMR
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- -
- Datasheet:
-
SI5342D-B04119-GMR.pdf
- Description:
- IC CLK MULTIPLIER ATTENUATOR
- Quantity:
- Payment:

- Shipping:

Inventory:4,975
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI5342D-B04119-GMR from Skyworks is a 4-input, 2-output jitter-attenuating clock multiplier with DSPLL™ and MultiSynth™ architecture, delivering 90 fs rms integrated jitter (12 kHz–20 MHz), programmable loop bandwidth (0.1 Hz–4 kHz), and support for LVDS/LVPECL/LVCMOS/CML/HCSL outputs. It operates across –40°C to +85°C and meets ITU-T G.8262 EEC Option 1 & 2 for Synchronous Ethernet applications.
For engineers reviewing the SI5342D-B04119-GMR datasheet, SI5342D-B04119-GMR pinout, SI5342D-B04119-GMR application, or SI5342D-B04119-GMR equivalent, key selection considerations include its 2-output count, 350 MHz max output frequency limit (per Ordering Guide), differential input support up to 750 MHz, and factory-programmed configuration indicated by "B04119" in the part number.
Technical Context
The SI5342D-B04119-GMR implements a fourth-generation DSPLL with fully integrated loop filter and digitally programmable jitter attenuation bandwidth, enabling precise optimization of phase noise suppression versus transient response. Its MultiSynth dividers support both integer and fractional synthesis, with independent R-divider synchronization per output.
It supports three operational modes-freerun (crystal-referenced), locked (input-synchronized), and holdover (averaged historical frequency)-with glitchless, hitless, and ramped input switching. The device uses in-circuit programmable OTP NVM and accepts I²C/SPI control, with ClockBuilder Pro software used for configuration.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Count | 2 independent, configurable clock outputs |
| Max Output Freq | 350 MHz - defines upper limit for all synthesized outputs per Si5342D ordering variant |
| Jitter (RMS) | 90 fs (12 kHz–20 MHz) - enables compliance with SyncE EEC Option 1/2 and OTN timing masks |
| Input Range (Diff) | 8 kHz–750 MHz - supports wide-range reference inputs including SONET/SDH, Ethernet, and broadcast video clocks |
| Loop BW Range | 0.1 Hz–4 kHz - digitally selectable to balance jitter attenuation vs. holdover stability and switching agility |
| Supply Voltages | VDD = 1.8 V ±5%; VDDA = 3.3 V ±5% - requires dual-rail power design with tight regulation |
| Temp Range | –40°C to +85°C - qualified for industrial and telecom line-card environments |
Pinout & Package
SI5342D-B04119-GMR is housed in a 44-pin QFN package (7 mm × 7 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks' official Si5345/44/42 Rev D Data Sheet Section 9 (Pin Descriptions).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN0–IN3 | Differential/single-ended clock inputs | Four selectable reference inputs; IN3 serves as FB_IN in zero-delay mode |
| OUT0, OUT1 | Differential or LVCMOS clock outputs | Two independently configured outputs supporting LVDS/LVPECL/CML/HCSL/LVCMOS with programmable amplitude |
| XA/XB | Crytal oscillator terminals | Connects 25–54 MHz fundamental-mode crystal; internal load caps eliminate external components |
| SCL/SDA | I²C serial interface | Two-wire bus for configuration and status monitoring; supports standard/fast-mode speeds |
| INTRb | Interrupt output | Open-drain flag indicating LOS/OOF/LOL events; enables real-time fault detection without polling |
| RSTb | Hardware reset input | Active-low asynchronous reset that reloads NVM configuration and reinitializes DSPLL state machine |
Key Features
| Feature | Design Value |
|---|---|
| Hitless Input Switching | Eliminates phase transients when switching between fractionally related inputs (e.g., 155.52 MHz ↔ 622.08 MHz), preserving system timing integrity |
| Programmable Holdover | Uses 120-second averaged frequency history with user-defined window/delay to minimize phase jump during input failure |
| DCO Mode | Enables fine frequency tuning (as low as 0.001 ppb step) via FINC/FDEC pins or register writes-critical for packet network wander correction |
| Zero-Delay Mode | Configures OUT0 as feedback path to IN3, enabling deterministic latency alignment for delay-sensitive SerDes interfaces |
| Status Monitoring | Real-time detection of Loss of Signal (LOS), Out of Frequency (OOF), and Loss of Lock (LOL) with interrupt assertion and register flags |
Applications
| OTN Muxponder Timing | SyncE Line Card |
|---|---|
Use Scenario: Provides jitter-attenuated, phase-aligned clocks for OTN framing and multiplexing in metro DWDM systems. IC Role / Device Role / Timing Role: Jitter attenuator and frequency translator synchronizing client-side 10G/100G Ethernet to line-side OTU frames. Use Value: Meets ITU-T G.709 jitter accumulation limits (< 0.3 UI p-p) and enables multi-tributary mapping without timing slip. | Use Scenario: Generates compliant SyncE clocks on carrier-grade Ethernet line cards requiring G.8262 EEC Option 1/2. IC Role / Device Role / Timing Role: Primary clock synthesizer locking to primary reference clock (PRC) or enhanced primary reference clock (ePRC) inputs. Use Value: Delivers 90 fs rms jitter and programmable loop bandwidth to meet wander transfer function requirements under gapped or degraded input conditions. |
| Broadcast Video Sync | Test & Measurement Reference |
Use Scenario: Supplies low-jitter, multi-format sync signals (e.g., tri-level, black burst, SDI clock) in professional video routers and converters. IC Role / Device Role / Timing Role: Precision clock generator translating master studio reference (e.g., 10 MHz GPSDO) into SMPTE-compliant video rates. Use Value: Achieves < 1 ps RMS period jitter at 27 MHz and 74.25 MHz, ensuring stable genlock and eliminating frame jitter in 4K/8K workflows. | Use Scenario: Serves as ultra-low-noise clock source in high-resolution oscilloscopes, bit-error-rate testers, and signal analyzers. IC Role / Device Role / Timing Role: Jitter-attenuated reference generator providing clean sampling clocks for ADCs/DACs and trigger timing for pattern generators. Use Value: Enables sub-100 fs measurement floor and supports > 50 GS/s sampling by suppressing close-in phase noise and broadband jitter. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar jitter-attenuating clock multiplier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5342C-D-GM1 | Same 2-output, 44-QFN package; supports full 1028 MHz output range but integer-only synthesis (no fractional) | Preferred where fixed-frequency ratios dominate (e.g., legacy SONET), avoiding fractional spurs | Select when absolute frequency flexibility is less critical than deterministic jitter performance at harmonically related outputs |
| LMK04832RHAT | 3-input, 12-output; dual-loop architecture; higher power; supports JESD204B subclass 1; no integrated crystal oscillator | Targets high-channel-count, multi-protocol systems (JESD204B + SyncE + PCIe) requiring deterministic latency | Choose when needing >2 outputs, JESD204B support, or separate VCXO integration; requires external loop filter and crystal |
Compared with SI5342D-B04119-GMR, Si5342C-D-GM1 trades fractional synthesis for wider output frequency coverage, while LMK04832RHAT adds channel count and protocol-specific features at the cost of board area, BOM complexity, and power. SI5342D-B04119-GMR remains optimal for compact, preconfigured 2-output SyncE/OTN edge applications.
Availability
SI5342D-B04119-GMR is available at Aetrix Electronics and suitable for OTN muxponders, Synchronous Ethernet line cards, broadcast video infrastructure, and test equipment requiring stable component supply with guaranteed long-term lifecycle support.
Supply support for SI5342D-B04119-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.
The Si5342 family is designed specifically for high-performance timing in telecom infrastructure-delivering ultra-low jitter, robust holdover, and flexible synthesis for SyncE, OTN, and broadcast video systems.
FAQ
What does the "D" in SI5342D-B04119-GMR indicate?
The "D" denotes the Si5342D variant, which supports up to 350 MHz output frequency with integer-only synthesis mode. This distinguishes it from Si5342A (1028 MHz, integer+fractional) and Si5342C (1028 MHz, integer-only). The "B04119" suffix indicates a factory-preprogrammed configuration generated using ClockBuilder Pro, with specific frequency plan and feature settings stored in OTP NVM.
Does SI5342D-B04119-GMR require an external crystal?
Yes, SI5342D-B04119-GMR requires a 25–54 MHz fundamental-mode crystal connected to XA/XB pins. Internal load capacitors eliminate need for external caps. For optimal jitter (≤90 fs), Skyworks recommends 48–54 MHz crystals; TCXOs are required only for SyncE pizza-box holdover compliance under strict wander limits.
Can SI5342D-B04119-GMR operate without I²C/SPI configuration?
Yes. SI5342D-B04119-GMR powers up with its factory-programmed configuration stored in OTP NVM, enabling immediate operation without host initialization. I²C/SPI is optional-used only for runtime reconfiguration, status monitoring, or updating non-volatile settings via ClockBuilder Pro.
How many input clocks can SI5342D-B04119-GMR monitor simultaneously?
SI5342D-B04119-GMR has four physical input terminals (IN0–IN3) and continuously monitors all four for validity (LOS/OOF). Automatic input selection prioritizes valid sources based on programmable priority order, with hitless or ramped switching between them-enabling seamless failover in carrier-grade systems.
Is SI5342D-B04119-GMR RoHS-compliant and lead-free?
Yes, SI5342D-B04119-GMR is Pb-free and RoHS-6 compliant per Skyworks' official documentation. The "GMR" suffix confirms green (halogen-free) packaging in a 44-QFN with NiPdAu lead finish, qualified for reflow soldering per JEDEC J-STD-020 moisture sensitivity level 3.
SI5342D-B04119-GMR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- *
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Divider/Multiplier:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- -
SI5342D-B04119-GMR FAQ
1.How can I place an order for SI5342D-B04119-GMR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5342D-B04119-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5342D-B04119-GMR reliable?
The price and inventory of SI5342D-B04119-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5342D-B04119-GMR is usually 5 days.
3.What payment methods are accepted for SI5342D-B04119-GMR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5342D-B04119-GMR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5342D-B04119-GMR?
SI5342D-B04119-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5342D-B04119-GMR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5342D-B04119-GMR?
For technical support, including SI5342D-B04119-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5342D-B04119-GMR requirements.
6.How does Aetrix verify that SI5342D-B04119-GMR is sourced from the original manufacturer or authorized distributors?
All SI5342D-B04119-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5342D-B04119-GMR meets industry standards.
7.What is the process for return or replacement of SI5342D-B04119-GMR?
All SI5342D-B04119-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5342D-B04119-GMR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5342D-B04119-GMR part is unused and in its original packaging.
Return procedure for SI5342D-B04119-GMR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI5342D-B04119-GMR Tags
-
CD74HCT4046AM96
Texas Instruments

-
MC14046BDWR2G
onsemi

-
501MILFT
Renesas
-
CD74HC7046AM
Texas Instruments
-
CDCVF2505PWR
Texas Instruments

-
RC19004A100GNL#KB0
Renesas
-
SI5351A-B-GTR
Skyworks Solutions Inc.

-
CY2305SXI-1T
Infineon Technologies

-
570BILFT
Renesas

-
CDCE913PWR
Texas Instruments

-
CY2305SXI-1HT
Infineon Technologies

-
DS1086LU+T
Analog Devices Inc./Maxim Integrated
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
