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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5342D-D06356-GMR

Name: SI5342D-D06356-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5342D-D06356-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5342D-D06356-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5342D-D06356-GMR.pdf

Description:: IC CLOCK MULTIPLIER ATTENUATOR

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Product details

Overview

SI5342D-D06356-GMR from Skyworks is a 4-input, 2-output jitter attenuating clock multiplier with DSPLL™ and MultiSynth™ architecture, delivering 90 fs rms integrated jitter, programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), and support for LVDS/LVPECL/LVCMOS/CML/HCSL outputs. It operates across –40 to +85 °C and meets ITU-T G.8262 EEC Option 1/2 for Synchronous Ethernet in carrier-grade line cards.

For engineers reviewing the SI5342D-D06356-GMR datasheet, SI5342D-D06356-GMR pinout, SI5342D-D06356-GMR application, or SI5342D-D06356-GMR equivalent, key selection considerations include its 2-output 44-QFN 7×7 mm package, 0.001–350 MHz output frequency range (integer-only synthesis), dual-mode input switching (hitless/ramped), and factory-programmed configuration for SyncE-compliant timing recovery in OTN and 10G/100G networking systems.

Technical Context

The SI5342D-D06356-GMR implements a fourth-generation DSPLL with fully integrated loop filter and digitally programmable loop bandwidth (0.1 Hz–4 kHz), enabling precise jitter filtering without external components. Its MultiSynth dividers support integer-only synthesis per the "D" variant designation, eliminating fractional-N artifacts in sensitive telecom timing paths.

It features automatic/manual input clock selection across four inputs (IN0–IN3), status monitoring (LOS/OOF/LOL), and holdover mode using averaged historical lock data (up to 120 s) referenced to a 25–54 MHz crystal on XA/XB. Core supply is 1.8 V ±5% (VDD), analog supply 3.3 V ±5% (VDDA), with independent 1.8/2.5/3.3 V output supply pins.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count	2 independent clock outputs with full crosspoint routing and programmable format
Jitter (rms)	90 fs over 12 kHz–20 MHz integration bandwidth - meets stringent SyncE EEC Option 1/2
Output frequency range	100 Hz–350 MHz differential; 100 Hz–250 MHz LVCMOS - integer-only synthesis per D variant
Jitter attenuation BW	Digitally programmable 0.1 Hz–4 kHz - enables optimization for wander vs. jitter trade-off in telecom
Input compatibility	Differential: 8 kHz–750 MHz; LVCMOS: 8 kHz–250 MHz - supports gapped clock locking
Crystal reference	25–54 MHz fundamental-mode crystal on XA/XB - internal load caps eliminate external tuning components
Supply voltages	VDD = 1.8 V ±5%; VDDA = 3.3 V ±5%; independent output supplies selectable at 1.8/2.5/3.3 V

Pinout & Package

SI5342D-D06356-GMR uses a 44-pin QFN package (7 mm × 7 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are validated per Skyworks Si5342 Rev D datasheet Section 9 (Pin Descriptions) and Figure 10.2 (package diagram).

Pin/Terminal	Circuit Role	Design Meaning
IN0–IN3	Differential/single-ended clock inputs	Four configurable inputs supporting hitless/ramped/glitchless switching; IN3 serves as FB_IN in zero-delay mode
OUT0, OUT1	Differential or LVCMOS clock outputs	Each independently configurable for LVDS/LVPECL/LVCMOS/CML/HCSL with programmable amplitude and common-mode voltage
XA, XB	Crytal oscillator terminals	Connect 25–54 MHz fundamental-mode crystal; internal 12 pF load caps eliminate external capacitors
VDD, VDDA	Digital/analog core supplies	VDD = 1.8 V ±5%; VDDA = 3.3 V ±5% - separate domains minimize noise coupling into DSPLL
SDA, SCL / MOSI, MISO, SCLK, CSb	I²C or SPI serial interface	Two-wire or four-wire programming interface for register access and NVM configuration
INTRb	Interrupt output	Open-drain status flag for LOS/OOF/LOL events - enables real-time fault monitoring without polling

Key Features

Feature	Design Value
Integer-only synthesis (D variant)	Eliminates fractional-N spurs and simplifies phase noise validation for SyncE compliance
Programmable jitter attenuation BW	0.1 Hz–4 kHz digital control enables optimized wander suppression in OTN applications
Hitless input switching	Maintains continuous phase alignment when switching between fractionally related clocks (e.g., 155.52 MHz ↔ 622.08 MHz)
Holdover with 120 s history buffer	Uses averaged locked-frequency data to minimize phase jump during input failure - critical for SONET/SDH continuity
In-circuit NVM programming	Factory preprogrammed SI5342D-D06356-GMR powers up with verified SyncE configuration - no boot-time initialization required

Applications

OTN Muxponder Timing Recovery	Carrier Ethernet Switch Clocking
Use Scenario: Recovering low-jitter 155.52 MHz/622.08 MHz clocks from degraded OTN client-side interfaces with high input jitter. IC Role / Device Role / Timing Role: Jitter attenuator and frequency translator that cleans and multiplies incoming gapped or noisy client clocks to meet ITU-T G.8262 EEC requirements. Use Value: Enables deterministic phase alignment and sub-100 fs jitter performance essential for OTN multiplexing without requiring external loop filters.	Use Scenario: Providing synchronized 100 MHz/125 MHz clocks to multiple switch ASICs and PHYs in a 10G/100G Carrier Ethernet aggregation platform. IC Role / Device Role / Timing Role: Dual-output clock multiplier generating independent, phase-aligned clocks with programmable skew for SERDES lane deskew. Use Value: Eliminates inter-chip skew and ensures IEEE 1588 PTP timestamp accuracy across distributed switch fabric.
Broadcast Video Synchronization	Test & Measurement Reference Clock
Use Scenario: Generating genlock-capable 27 MHz/74.25 MHz video clocks from SMPTE 2059-2 PTP grandmaster streams in IP-based broadcast infrastructure. IC Role / Device Role / Timing Role: Jitter attenuator operating in holdover mode during PTP packet loss, maintaining <±50 ppb frequency stability for frame-accurate video playout. Use Value: Ensures uninterrupted broadcast continuity with seamless holdover-to-lock transitions and <1 ns phase transient during recovery.	Use Scenario: Serving as ultra-low-jitter (<100 fs) reference source for high-resolution oscilloscopes and bit-error-rate testers requiring stable 10 MHz/100 MHz timing references. IC Role / Device Role / Timing Role: Precision clock multiplier converting oven-controlled crystal oscillator (OCXO) reference into multiple clean, isolated output frequencies. Use Value: Delivers lab-grade jitter performance without discrete PLL components - reduces layout sensitivity and accelerates test system qualification.

OTN Muxponder Timing Recovery

Carrier Ethernet Switch Clocking

Use Scenario: Recovering low-jitter 155.52 MHz/622.08 MHz clocks from degraded OTN client-side interfaces with high input jitter.

IC Role / Device Role / Timing Role: Jitter attenuator and frequency translator that cleans and multiplies incoming gapped or noisy client clocks to meet ITU-T G.8262 EEC requirements.

Use Value: Enables deterministic phase alignment and sub-100 fs jitter performance essential for OTN multiplexing without requiring external loop filters.

Use Scenario: Providing synchronized 100 MHz/125 MHz clocks to multiple switch ASICs and PHYs in a 10G/100G Carrier Ethernet aggregation platform.

IC Role / Device Role / Timing Role: Dual-output clock multiplier generating independent, phase-aligned clocks with programmable skew for SERDES lane deskew.

Use Value: Eliminates inter-chip skew and ensures IEEE 1588 PTP timestamp accuracy across distributed switch fabric.

Broadcast Video Synchronization

Test & Measurement Reference Clock

Use Scenario: Generating genlock-capable 27 MHz/74.25 MHz video clocks from SMPTE 2059-2 PTP grandmaster streams in IP-based broadcast infrastructure.

IC Role / Device Role / Timing Role: Jitter attenuator operating in holdover mode during PTP packet loss, maintaining <±50 ppb frequency stability for frame-accurate video playout.

Use Value: Ensures uninterrupted broadcast continuity with seamless holdover-to-lock transitions and <1 ns phase transient during recovery.

Use Scenario: Serving as ultra-low-jitter (<100 fs) reference source for high-resolution oscilloscopes and bit-error-rate testers requiring stable 10 MHz/100 MHz timing references.

IC Role / Device Role / Timing Role: Precision clock multiplier converting oven-controlled crystal oscillator (OCXO) reference into multiple clean, isolated output frequencies.

Use Value: Delivers lab-grade jitter performance without discrete PLL components - reduces layout sensitivity and accelerates test system qualification.

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5342C-D-GM1	Supports integer + fractional synthesis (wider output frequency flexibility up to 1028 MHz); same 2-output 44-QFN package	Required where non-integer ratios (e.g., 122.88 MHz from 10 MHz) are needed; not suitable for pure integer-only SyncE deployments	Select Si5342C-D-GM1 only if fractional-N capability is confirmed necessary - SI5342D-D06356-GMR avoids associated phase noise penalties
LMK04832ISQE/NOPB	2-input/14-output, dual-loop architecture; higher channel count but larger 64-QFN package; 110 fs rms jitter	Targeted at multi-ASIC timing distribution in radar or high-speed data acquisition - over-specified for 2-output SyncE line cards	Choose LMK04832ISQE/NOPB only when >2 outputs or dual-loop redundancy are required; SI5342D-D06356-GMR offers optimal BOM and footprint efficiency for 2-output use cases

Compared with Si5342C-D-GM1, SI5342D-D06356-GMR trades fractional synthesis flexibility for lower phase noise and deterministic integer-only behavior required by ITU-T G.8262. Versus LMK04832ISQE/NOPB, it delivers identical SyncE compliance in half the footprint and power, making it ideal for space-constrained OTN line card designs.

Availability

SI5342D-D06356-GMR is available at Aetrix Electronics and suitable for OTN muxponders, Carrier Ethernet switches, and broadcast video infrastructure requiring stable component supply with guaranteed long-term lifecycle support.

Supply support for SI5342D-D06356-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for communications, automotive, and industrial markets.

The Si5342 family is designed specifically for high-reliability jitter attenuation and clock multiplication in telecom infrastructure, with SI5342D-D06356-GMR optimized for integer-only SyncE-compliant timing recovery in 10G/100G line cards.

FAQ

What is the maximum output frequency supported by SI5342D-D06356-GMR?

The SI5342D-D06356-GMR supports a maximum differential output frequency of 350 MHz and a maximum LVCMOS output frequency of 250 MHz. This limit arises from its "D" variant designation, which restricts synthesis to integer-only modes - unlike "A" or "C" variants that support fractional-N up to 1028 MHz. The 350 MHz ceiling ensures robust jitter performance for Synchronous Ethernet and OTN applications where integer ratios dominate.

Does SI5342D-D06356-GMR require external loop filter components?

No, SI5342D-D06356-GMR integrates the entire DSPLL loop filter on-die, eliminating discrete capacitors and resistors. This removes layout sensitivity, prevents noise coupling from PCB traces, and guarantees consistent jitter attenuation performance across temperature and voltage. The digitally programmable loop bandwidth (0.1 Hz–4 kHz) is configured via I²C/SPI registers - no hardware changes are needed to retune filter response.

How does SI5342D-D06356-GMR handle input clock failures in telecom systems?

Upon input clock failure, SI5342D-D06356-GMR automatically enters holdover mode using up to 120 seconds of averaged historical lock data stored in on-chip memory. It calculates a final holdover frequency from a programmable window within that history, minimizing phase disturbance. The output remains stable and aligned to the external 25–54 MHz crystal reference, meeting ITU-T G.8262 wander requirements for SONET/SDH continuity.

Is SI5342D-D06356-GMR pin-compatible with other Si5342 variants?

Yes, all Si5342 variants - including SI5342D-D06356-GMR - share identical 44-QFN 7×7 mm packaging and pinout per Skyworks datasheet Figure 10.2. This allows drop-in replacement across A/B/C/D versions without PCB redesign. However, functional differences (e.g., integer-only vs. fractional synthesis) require firmware and register configuration updates to match the new variant's capabilities.

What crystal frequency is recommended for optimal jitter performance with SI5342D-D06356-GMR?

A 48–54 MHz fundamental-mode crystal is recommended for SI5342D-D06356-GMR to achieve best-in-class 90 fs rms jitter. Crystals in this range maximize DSPLL phase noise rejection while leveraging the device's internal 12 pF load capacitance - eliminating external tuning capacitors and reducing BOM count. Operation outside this range (e.g., 25 MHz) is supported but increases integrated jitter by ~15–25 fs due to oscillator phase noise contribution.

SI5342D-D06356-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5342D-D06356-GMR FAQ

1.How can I place an order for SI5342D-D06356-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5342D-D06356-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5342D-D06356-GMR reliable?

The price and inventory of SI5342D-D06356-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5342D-D06356-GMR is usually 5 days.

3.What payment methods are accepted for SI5342D-D06356-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5342D-D06356-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5342D-D06356-GMR?

SI5342D-D06356-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5342D-D06356-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5342D-D06356-GMR?

For technical support, including SI5342D-D06356-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5342D-D06356-GMR requirements.

6.How does Aetrix verify that SI5342D-D06356-GMR is sourced from the original manufacturer or authorized distributors?

All SI5342D-D06356-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5342D-D06356-GMR meets industry standards.

7.What is the process for return or replacement of SI5342D-D06356-GMR?

All SI5342D-D06356-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5342D-D06356-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5342D-D06356-GMR part is unused and in its original packaging.

Return procedure for SI5342D-D06356-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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